EP1889435A1 - Differentielle detektionseinheit für den zigbee ieee 802.15.4 standard - Google Patents
Differentielle detektionseinheit für den zigbee ieee 802.15.4 standardInfo
- Publication number
- EP1889435A1 EP1889435A1 EP06754003A EP06754003A EP1889435A1 EP 1889435 A1 EP1889435 A1 EP 1889435A1 EP 06754003 A EP06754003 A EP 06754003A EP 06754003 A EP06754003 A EP 06754003A EP 1889435 A1 EP1889435 A1 EP 1889435A1
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- European Patent Office
- Prior art keywords
- unit
- sequence
- derived
- complex
- chips
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/69—Spread spectrum techniques
- H04B1/707—Spread spectrum techniques using direct sequence modulation
Definitions
- the present invention relates to a method and a receiving unit for detecting data symbols contained in a received radio signal.
- the invention broadly relates to a transmitting receiving device and an integrated circuit having such a receiving unit.
- the invention is in the field of data transmission. Although applicable in principle to any digital communication systems, the present invention and the problem on which it is based are explained below on the basis of a "ZigBee" communication system according to IEEE 802.15.4.
- WPANs Wireless Personal Area Networks
- WLANs Wireless Local Area Networks
- the IEEE 802.15.4 standard specifies low-speed WPANs that can be programmed with raw data rates up to max. 250 kbit / s and fixed or mobile devices are suitable for applications in industrial monitoring and control, in sensor networks, in automation, as well as in the field of computer peripherals and for interactive games.
- extremely low energy consumption of the devices is of crucial importance for such applications. For example, battery life of several months to several years is the goal of this standard.
- PN pseudo-noise
- the "quasi-orthogonal" PIM sequences PO, P1, ..., P15 specified in the standard differ from each other by cyclic shifts and / or inversion of every other chip value (see IEEE std 802.15.4-2003, chapter 6.5.2.3) ,
- the PN sequences assigned to the consecutive symbols are concatenated and then ⁇ ffset QPSK modulated (quaternary ⁇ phase shift keying) by the half-sine pulse shaping PN-chips of even index (0, 2, 4, ...) the inphase (I) carrier and those odd-index PN chips (1, 3, 5, ...) are modulated onto the quadrature phase (Q) carrier.
- the quadrature-phase chips are delayed by one chip period TC in relation to the in-phase chips (see IEEE std 802.15.4-2003, chapter 6.5.2.4).
- a coherent receiving unit is known from the textbook “Nachrichtübertragung” by Karl-Dirk Kammeyer, 2nd edition, BG Teubner, Stuttgart, ISBN 3-519-16142-7 ( Figure 12.1.7 on page 417) On the one hand results from the required carrier control circuit with the associated high-rate (higher than the chip rate) multiplication of the received signal with the frequency and in-phase carrier oscillation and on the other hand from the complex complex signal processing with a high-rate complex matched filtering very high energy consumption.
- an incoherent receiving unit is still known ( Figure 12.3.7 on page 447). It has an FM discriminator, an integration unit and a so-called limiter and requires the processing of high-rate (higher than the chip rate) and partially complex-valued signals. This in turn is accompanied by a high implementation cost and high energy consumption. In addition, the performance (symbol error rate, etc.) of this receiving unit is insufficient in the demodulation of MSK signals.
- the object of the invention is to specify a detection method which makes energy-saving and simple implementations of transceivers, e.g. IEEE 802.15.4 and yet has high detection performance, i. a low error rate (symbol, bit, frame error rate etc.) even under disturbing influences such as channel distortions and / or noise. It is also the object of the invention to specify a corresponding receiving unit as well as a transmitting / receiving device and an integrated circuit.
- this object is achieved by a method, a receiving unit, a transmitting receiving device and an integrated circuit having the features of claims 1, 13, 22 and 23.
- the method according to the invention for the incoherent detection of data symbols contained in a received radio signal, said transmitting side each data symbol assigning a symbol-value-specific PN sequence consisting of PN chips consecutive in chip clock and offset-QPSK-modulating the PN sequences assigned to the data symbols, provides for a) converting (transforming) the received radio signal into a complex baseband signal sampled in the chip clock b) generate a demodulated signal by differentially demodulating the chip base sampled complex baseband signal, c) provide derived sequences, d) calculate correlation results by correlating the demodulated signal with the derived sequences, and e) the values of the data Derive nsymbole by evaluating the correlation results, i.
- each derived sequence is associated with a PN-sequence which can be assigned on the transmitting side and consists of derived chips whose values each correspond to a logical combination of respective PN chips of the PN-sequence assignable to the transmitting end, to which the derived sequence is assigned.
- the incoherent receiving unit comprises a) an inner
- Receiver for transferring the received radio signal into an infrared signal
- Chip clock sampled complex baseband signal is formed, b) connected to the inner receiver differential demodulator, the C) a sequence providing unit configured to provide derived sequences described above, d) a correlation unit connected to the sequence providing unit and the differential demodulator, for calculating of correlation results by correlating the demodulated signal with the derived sequences, and e) an evaluation unit connected to the correlation unit, which is designed to derive the values of the data symbols by evaluating the correlation results.
- the inventive transmitting / receiving device and the integrated circuit according to the invention each have such a receiving unit.
- the essence of the invention is to provide from the received radio signal a chip clock sampled baseband signal and to differentially demodulate it and subsequently to correlate with derivative sequences adapted to the differential demodulation.
- Such differential demodulation in the chip clock allows very simple and energy-saving implementations of the receiving unit or the integrated circuit and thus of the transmitting receiving device, since, on the one hand, no carrier phase control is required and, on the other hand, the entire digital signal processing (incl.) Of demodulation does not require any rates higher than the chip rate.
- the performance of the receiving unit according to the invention or of the method according to the invention is also very high, the error rate (symbol, bit, Frame error rate etc.) during detection even under disturbing influences such as channel distortions and noise are smaller than eg with receiver units with discriminator and limiter.
- advantageous embodiments and further developments of the invention can be found in the dependent claims and the description with reference to the drawing.
- the demodulated signal has soft information values. As a result, the error rate in the detection decreases, so that increases the performance of the method according to the invention or the receiving unit according to the invention.
- a frequency offset after the actual differential demodulation ie after multiplication of the instantaneous samples with the complex conjugate values of the samples of the chip clock baseband signal delayed by one chip period, respectively
- the implementation effort and the energy requirement is thereby further reduced because not multiplied by a "rotating pointer" in a higher clock, but only in the chip clock with a complex constant
- the differential demodulation or the differential demodulator is designed so that no complex multiplication, but only real-valued operations are performed. With only two real-valued multiplies and a real-valued addition, this makes extremely simple implementations with extremely low energy requirements possible, if a correction of the frequency offset can be dispensed with.
- the correlation calculated such that the demodulated signal in each case (ie per symbol period TS) is correlated with a number of (31) chips of the respective derived sequence, which is one less than the number of (32) chips in each of the transmitting side usable PN sequences.
- the demodulated signal is equalized and the correlation results calculated by correlating the equalized demodulated signal with the derived sequences, preferably the equalization in this case has a suppression of a DC component. Due to the equalization, the error rate (symbol, bit, frame error rate, etc.) decreases during the detection, so that the performance of the receiving unit according to the invention or of the method according to the invention increases.
- the derived chips (ie the chips of a derived sequence) having a first positive index (ie all chips except the first) each have a value which is an XOR of the PN chip (ie the chip of that PN sequence, which is associated with the derived sequence) with this first positive index with the index-wise (and thus temporally) each preceding PN chip is derivable.
- the index-wise (and time-wise) first derivative (zero-index) chip has a value derivable from an XOR of the index-wise first PN (zero-index) PN chip with the index-last PN chip.
- the sequence providing unit, the correlation unit and the evaluation unit can be realized in a very simple and energy-saving manner.
- the derived chips having an even-numbered index (0,2,4,...) each have a value which is assigned to the (logical) value of the respective XOR combination and the derived chips having an odd-numbered index (FIG. 1,3,5) each have a value associated with the inverted (logical) value of the respective XOR link.
- the logical values (0,1) are assigned antipodal values (+/- 1), eg the logical 1 the value +1 and the logical 0 the value -1.
- the correlation results are evaluated by first determining the index of the correlation result having the maximum value, and then assigning to that index the data symbol whose symbol value is assigned to the PN sequence assignable on the send side, which is the derived sequence is associated with precisely this index.
- the correlation results are evaluated by determining the maximum correlation value of the correlation results, adding a constant, multiplying the resulting sum by a factor and limiting the (product) values thus obtained to a predetermined value range.
- the signal quality parameter obtained in this way can advantageously be used by the upper layers of the communication system to increase the reliability of the data transmission.
- FIG. 1 shows an example of a "wireless personal area network” (WPAN) according to the IEEE standard 802.15.4 with transmission receiving devices according to the invention
- FIG. 2 shows an embodiment of an incoherent receiving unit (RX) according to the invention
- FIG. 6 shows realization examples of the differential demodulation step S2 of the method according to the invention according to FIG. 5;
- FIG. Fig. 7 realization example of the evaluation step S6 of the inventive method of FIG. 5.
- in the figures are the same and functionally identical elements and signals - unless otherwise indicated - provided with the same reference numerals.
- WPAN Wireless Personal Area Network
- TX transceiver devices
- the transmission receiving device 11 is a so-called full-function device which performs the function of the WPAN coordinator, while the transmitting / receiving devices 12, 13 are so-called sub-function devices which In addition to the star-shaped network topology illustrated in FIG.
- the standard also provides for so-called "peer-to-peer” topologies in which all fully functional te (one of which assuming the role of the WPAN coordinator) can communicate with all other full-function devices.
- the transmitting receiving devices 11-13 each comprise an antenna 14, a transmitting unit (transmitte TX) 15 connected to the antenna, a receiving unit (receiver, RX) 16 connected to the antenna, and a control unit (control) connected to the transmitting and receiving units unit, CTRL) 17 for
- Control of the transmitting and receiving units 15, 16. continue to include the
- Transceiver devices 11-13 each one not shown in Figure 1
- Energy supply unit in the form of a battery, etc. for powering the units 15-17, and possibly other components such as sensors,
- QPSK quadraturethane
- the inventive incoherent receiving unit 16 of each transceiver converts a radio signal received from its antenna 14 (and generated by the transmitting unit of another transceiver according to the IEEE 802.15.4 standard) into the transmitted data as error-free as possible by transmitting the Among other things, the radio signal is demodulated and the data is subsequently detected (decided).
- the transmitting unit 15 and the receiving unit 16 of a transmitting receiving device are in this case part of an integrated circuit (IC), eg an ASIC (application specific integrated circuit) (not shown in FIG. 1), while the control unit 17 is a microcontroller (likewise not shown) is realized.
- the transmitting receiving device can also have only one IC (for example embodied as ASIC) which performs the functions of the transmitting unit 15, the receiving unit 16 and the control unit 17.
- ASIC application specific integrated circuit
- FIG. 2 shows a block diagram of an incoherent receiving unit 16 according to the invention which has the following series-connected functional blocks: an inner receiver (iREC) 21, a differential demodulator (DEMOD) 22, a correlation unit (COR) 23 and an evaluation unit (EVAL) 24 the receiving unit 16 has a sequence providing unit (SEQ) 25, which is connected to the correlation unit 23, and optionally an equalizer (EQ) 26 between the demodulator 22 and the correlation unit 23.
- iREC inner receiver
- DEMOD differential demodulator
- COR correlation unit
- EVAL evaluation unit
- Each complex sample comprises a real part (in-phase component I) and an imaginary part (quadrature component Q), each having a bit width of e.g. have four bits.
- the complex baseband signal b may be subject to a more or less pronounced frequency offset.
- the inner receiver 21 also has a synchronization unit (SYNC) 27 which performs symbol and chip clock synchronization and preferably determines a complex factor fOFF required to correct the frequency offset.
- SYNC synchronization unit
- the chip clock baseband signal b is then converted by the differential demodulator 22 into a demodulated signal s having real-valued samples in the chip clock, preferably the differential demodulator 22 generates a demodulated signal s whose samples instead of so-called hard bits (ie two-stage, binary values) so-called soft information values (higher-level samples).
- the performance of the receiving unit 16 can be further improved; optionally, the differential demodulator 22 can also be advantageously used to correct a frequency offset.
- the individual functional blocks of the differential demodulator 22 and its mode of operation will be explained in more detail in connection with FIG.
- the demodulated signal s is then optionally equalized.
- the equalizer 26 may comprise a filter, eg a high-pass filter.
- the optionally equalized demodulated signal s or se present in the chip clock fc is then correlated in the correlation unit 23 with so-called derived sequences FO, F1, F2,... Provided by the sequence providing unit 25 and with reference to the table below be explained.
- the correlation unit the correlation results are calculated such that the demodulated signal is respectively correlated with a number of chips (31) of the respective derived sequence one less than the number of chips in each of the transmit-side usable PN sequences (32 ), so by dispensing with a chip in the correlation calculation - without significant losses in the performance of the detection - advantageously each data symbol independently of the previous symbol decided (detected), which further reduces the implementation cost of the receiving unit.
- the evaluation unit (EVAL) 24 the correlation results rsFO, rsFi, ... finally evaluated and the data symbols d ⁇ , dl, ... detected.
- the evaluation unit 24 preferably calculates a quality parameter (link quality indication, LQI), which indicates the quality of the communication connection.
- LQI link quality indication
- FIG. 3 shows two block diagrams of different embodiments of the differential demodulator (DEMOD) 22 from FIG. 2.
- the more complex implementation of FIG. 3 a is advantageous in cases where a frequency offset is to be corrected, while the simpler implementation according to FIG. 3 b is advantageous if one Compensation of the frequency offset not required and / or not desired.
- the differential demodulator 31 shown in FIG. 3a comprises a delay unit 32 connected to the inner receiver 21, a first complex multiplier 33 connected to the inner receiver 21 and the delay unit 32, a second complex connected to the first complex multiplier 33 and the inner receiver 21 Multiplier unit 34 and an imaginary dividing unit 35 connected to the second complex multiplying unit 34.
- the complex multiplier units 33, 34 perform complex multiplications, the first multiplier unit 33 multiplying the complex samples applied to the first input by the complex conjugate values of the complex samples applied to the second input, while the second multiplier unit 34 "superimposing" the adjacent complex samples on each other
- the imaginary dividing unit 35 finally suppresses the real part of the complex input and provides the imaginary part of the input at the output.
- the samples of the complex baseband signal b are denoted by x (k) + j * y (k) (see FIG. 3a), where x (k) is the real part (in-phase component I ) and y (k) represent the imaginary part (quadrature component Q) of the samples and k indicates a time index (index of the chip period).
- this unit contains only two multipliers with two inputs each for the real-valued multiplication of Real ⁇ d (k) ⁇ with lmag ⁇ fOFF ⁇ or imag ⁇ cKk) ⁇ with Real ⁇ fOFF ⁇ and a downstream one Adder for adding the real-valued multiplication results.
- a further simplification of the differential demodulator results if the correction of the frequency offset is to be dispensed with. The advantageous in this case, very simple implementation form is shown in Figure 3b.
- the differential demodulator 36 shown in FIG. 3b comprises a delay unit 32 connected to the inner receiver 21, two multipliers 37, 38 respectively connected to the inner receiver 21 and the delay unit 32 and a first adder 39 connected to the multipliers.
- the multipliers 37, 38 in contrast to the complex multiplier units 33, 34 of FIG. 3a, are purely real multipliers for the multiplication of real-valued samples.
- the following table shows both the PN sequences P0, P1,..., P15 to be used according to IEEE 802.15.4 and the derived sequences FO, F1,..., F15 assigned to the PN sequences according to the invention.
- a sequence supply is specified with a total of 16 PN sequences PO, P1,..., P15.
- Each PN sequence here comprises 32 so-called chips, each of which can assume a value of logical zero (0) or one (1).
- the first ten chips of the PN sequence P5 assume the values 001 1 0 1 0 1 00.
- the former are referred to as Pi ⁇ l chips.
- the bit pattern ⁇ 1 1 0 1 1 0 ⁇ occurring at the beginning of the PN sequence PO is in the PN sequence P1 from the PN chip P1C4, in the PN sequence P2 from P2c8, in P3 from P3C12, in P4 as of P4d6, ..., and finally in P7 from P7c28 - with cyclic extension.
- the PN sequences of the second group differ only by a cyclic shift of their chip values from each other.
- each PN sequence is assigned a non-identical derivative sequence adapted to the differential demodulation, the PN sequence PO, for example, the derived sequence FO listed in the table below PO, the PN sequence P1, the derived sequence Fi, etc
- the chips of the derived sequences can assume the anti-podal values +1 and -1, whereby in the table only the sign of these values is entered for reasons of clarity.
- the values of the derived chips are as follows from the values of the PN chips. For example, to form the value of the derived chip F0C2, which according to the
- Table is +1, the value of the one entered directly above it in the table is
- an XOR combination yields a value of logical 1 to which the antipodal value + 1 entered in the table for F0c2 is assigned.
- This derivation rule applies to all derived positive even index chips.
- the derived sequences of the first group differ from each other only by a cyclic shift of their chip values.
- the bit pattern ⁇ + + + ⁇ occurring at the beginning of the derived sequence FO is in the derived sequence F1 from the derived chip Fic4, in the derived sequence F2 from F2c8, in F3 from F3d2, in F4 from F4d6, ..., and finally in F7 from F7c28 - with cyclic expansion.
- the derived sequences of the second group differ only by a cyclic shift of their chip values from each other.
- each derived sequence of the first group there exists a derived sequence of the second group which differs only by an inversion of all its chip values.
- the deduced sequences FO and F8 in the table one finds that all chip values are inverted. Since this also applies to the sequence pairs F1 / F9, F2 / F10, etc., it should be noted that all derived sequences of the first group are contained in inverted form in the second group:
- the respective inverted sequences can also be used. This corresponds only to an exchanged assignment between the PN sequences and the derived sequences.
- the PN sequence PO is assigned the derived sequence F8 from the table, the PN sequence P1 the derived sequence F9 from the table, etc. This changed to order is to be considered in the correlation and / or the evaluation accordingly.
- the first chip of the derived sequences can advantageously be disregarded in the calculation of the correlation results so that the data symbols can be decided independently of the preceding data symbol in the evaluation unit 24. Without appreciable losses in the performance of the detection, the receiving unit can be realized so easily.
- FIG. 4 shows a block diagram of the evaluation unit (EVAU 24 of FIG. 2) having an index determination unit 41 connected to the correlation unit 23, an allocation unit 42 connected to the correlation unit 23, and preferably an LQI unit 43-46 connected to the correlation unit 23 (link qualityin
- the LQI unit has the following series-connected function blocks: a maximum-conversion unit 43 connected to the correlation unit 23, an adder unit 44, a third multiplier 45 and a value-restriction unit 46.
- the correlation results rsFO, rsFi, ..., rsFis calculated by the correlation unit 23 are evaluated in the index determination unit 41 by the index of the correlation result having the maximum value among all the correlation results rsFO, rsFi,..., ⁇ SF15, per symbol period TS determined and according to Figure 4 is output as the value of the index 'm.
- the maximum forming unit 43 of the LQI unit determines per symbol period TS the maximum correlation value rsFmax of all correlation results rsFO, rsFi,..., ⁇ SF15.
- the adder unit 44 optionally has an integration unit 47, but in any case a second adder 48, wherein the integration unit 47 adds or averages a plurality of maximum correlation values rsFmax, preferably determined in successive symbol periods, and the second adder 48 adds a constant -Kc Value + K subtracts to calculate the sum r4.
- the third multiplier 45 then multiplies the sum r4 by the factor fSKAL before the value restriction unit 46 restricts the third products r3 thus obtained to a predetermined value range (eg 0 ... 255) to obtain an LQI value as a measure of the quality of the communication connection provide.
- the constant -K and the factor fSKAL are chosen in this case so that the signal quality (LQ1) provided according to the above steps completely covers the given value range (eg O... 255) depending on the quality of the received radio signal r.
- the receiving unit according to the invention described above with reference to FIGS. 2 to 4, and thus also transmission receiving apparatuses having such a receiving unit, are characterized by very simple realizability, extremely low energy consumption and high performance (bit error rate or the like as a function of disturbing influences such as Noise and / or channel distortion).
- Investigations of the applicant require the digital parts of receiving units according to the invention - without synchronization unit - a hardware cost in the order of a few thousand gate equivalents (NAND gate with two inputs), in data transmission mode these digital parts of the receiving units according to the invention have a power requirement of the order of a few Milliwatts (mW).
- FIG. 5 shows a flow chart of the method according to the invention for incoherent detection.
- step S1 first the received radio signal r is converted into a complex baseband signal b with samples in chip clock fC, in step S2 the complex baseband signal b is differentially demodulated, in the optional step S3 the demodulated signal s is equalized and thus an equalized demodulated signal se is formed , in step S4, which can alternatively also be carried out before step S3 - in extreme cases even before step S1 the derived sequences FO, F1, F2,... described in more detail above are provided, in step S5 the demodulated signal s or the equalized demodulated signal se is correlated with the derived sequences FO 1 F1, F2,...
- step S6 the correlation results in step S6 are evaluated and the values of the data symbols d ⁇ , dl, d2,... Are derived.
- steps S1-S6 can be found in the above description of the operation of the receiving unit 16 or its functional blocks 21-26 with reference to FIGS. 1 and 2.
- FIG. 6 shows two flow diagrams of different implementation forms of the differential demodulation step S2 from FIG. 5.
- the first implementation form according to FIG. 6a is advantageous in cases where a frequency offset is to be corrected, while the second implementation according to FIG. 6b is advantageous if compensation of the frequency offset should not take place.
- a complex factor fOFF suitable for correcting a frequency offset is determined in step S2ai.
- This step takes place within the scope of step S1 of FIG. 5 (provision of b), but can also take place in the context of step S2 (however, step S2a4), in step S2a2 the sample values x (k) + jy (k In step S2a3, first complex products cKk) are calculated by dividing the conjugate complex values of the samples x (ki) -jy (kD delayed according to step S2a2 with the instantaneous samples x (k) of the complex chip clock baseband signal b Finally, in step S2a4, the demodulated signal s is formed by dividing (only the) imaginary parts of second complex products c2 (k) from the first complex products cKk) [S2a3l and the complex one Factor fOFF [S2ail be calculated.
- step S2b2 the samples x (k) + jy (k) of the complex chip clock baseband signal b are delayed in step S2a2 in FIG. 6a by one chip period TC, in step S2b2 first products rKk) are calculated by the real components the delayed samples x (kD with the imaginary parts of the In step S2b3, second products r2 (k) are calculated by multiplying the imaginary parts of the delayed samples y (ki) by the real parts of the undelayed samples x (k) of the complex baseband signal b are multiplied. Finally, in step S2b4, the demodulated signal s is formed by subtracting the second products r2 (k) from the first products rKk).
- FIG. 7a shows a flowchart of the evaluation step S6 from FIG. 5.
- step S6bi shows a further flow chart of the evaluation step S6 from FIG. 5, in which the signal quality is determined.
- step S6bi first the maximum value rsFmax of all correlation results rsFO, rsFi, rsF2,... Is determined for each symbol period TS.
- step S6b2 After optionally (not shown in FIG. 7b) several values rsFmax belonging to successive symbol periods have been added (accumulated, integrated), in step S6b2 the sum r4 is multiplied by adding a constant -K which is multiplied by the factor fSKAL in step S6b3 to calculate a third product r3.
- the signal quality parameter LQi (link quality indication) is finally determined in step S6b4, in which the values of the third product r3 are limited to a predetermined value range, such as 0 ... 255.
- the constant -K and the factor Gate fSKAL are chosen so that the signal quality LQl completely covers the given value range depending on the quality of the received radio signal r.
- the present invention has been described above with reference to exemplary embodiments, it is not restricted thereto but can be modified in many ways, the invention is not based on WPANs per se nor on WPANs according to IEEE 802.15.4 or the PN specifications specified there. Sequences (number and length of sequences, stage and value of the chips, etc.), rates and stages of the chips / symbols / bits, etc. limited. Also, the invention is not limited to the derived sequences given in the table above. For the relationship between the derived chips and the PN chips, various equivalent logical relationships can be given.
- control unit 21 internal receiver
- F5C0, F5C1, ... chips of the derived sequence F5, i, J 1 m,, n indices
- P5C0, P5C1, ... PN sequence chips P5 r Radio signal, received signal rKk), r2 (k) first or second products r3 third product r4 sum rsFO, rsFi, ... correlation results rsFmax maximum correlation result s demodulated signal; soft information values, equalized demodulated signal; equalized soft information values
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Abstract
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DE102005026091.8A DE102005026091B4 (de) | 2005-06-07 | 2005-06-07 | Verfahren und Empfangseinheit zur Detektion von Datensymbolen |
PCT/EP2006/005175 WO2006131244A1 (de) | 2005-06-07 | 2006-05-31 | Differentielle detektionseinheit für den zigbee ieee 802.15.4 standard |
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EP (1) | EP1889435A1 (de) |
CN (1) | CN101189846B (de) |
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BRPI0912392A2 (pt) * | 2008-05-06 | 2019-09-24 | Fmc Tech Inc | método e aparelho para o controle de um mancal através de um limite de pressão |
EP2467984B1 (de) * | 2009-08-13 | 2013-03-06 | Cascoda Limited | Drahtloser empfänger |
US8849226B2 (en) * | 2009-08-13 | 2014-09-30 | Cascoda Limited | Wireless receiver |
US9240911B1 (en) | 2014-05-02 | 2016-01-19 | L-3 Communications Corp. | Decoupled equalizer in a communications receiver |
CN108494713B (zh) * | 2018-02-11 | 2019-06-14 | 北京理工大学 | 一种基于多路差分的msk信号解调方法及*** |
CN109388882B (zh) * | 2018-10-08 | 2022-11-04 | 北京理工大学 | 一种适用于专用集成电路设计的交错匹配滤波方法 |
US20200186324A1 (en) * | 2018-12-05 | 2020-06-11 | Texas Instruments Incorporated | Low-complexity synchronization header detection |
CN111245758B (zh) * | 2019-12-30 | 2022-04-29 | 河南科技大学 | 一种用于泛在电力物联网的qpsk调制非相干检测方法 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0763919A2 (de) * | 1995-09-18 | 1997-03-19 | Mitsubishi Denki Kabushiki Kaisha | QPSK-Demodulator mit Frequenz- und Phasennachlauf |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09233138A (ja) * | 1996-02-22 | 1997-09-05 | Sony Corp | 情報伝送システムおよび情報受信装置、並びに情報伝送方法 |
US6393067B1 (en) * | 1996-03-06 | 2002-05-21 | Matsushita Electric Industrial Co., Ltd. | Differential detection receiver |
JP2000151317A (ja) * | 1998-11-10 | 2000-05-30 | Hitachi Ltd | 送信機および電力増幅器 |
FI112831B (fi) * | 1999-04-28 | 2004-01-15 | Nokia Corp | Menetelmä kanavaestimaatin muodostamiseksi ja vastaanotin |
US7586982B2 (en) * | 2003-05-06 | 2009-09-08 | Nokia Corporation | Kalman filter based method and apparatus for linear equalization of CDMA downlink channels |
US7477707B2 (en) * | 2003-07-10 | 2009-01-13 | Honeywell International Inc. | Computationally efficient demodulation for differential phase shift keying |
US7424047B2 (en) * | 2003-11-13 | 2008-09-09 | Uniband Electronic Corp. | Receiver based method for de-spreading of spread spectrum signal |
KR101056365B1 (ko) * | 2004-02-28 | 2011-08-11 | 삼성전자주식회사 | 비트 다운 스케일링 방법 및 장치, 지피에스 동기포착방법및 지피에스 수신장치 |
KR100800795B1 (ko) * | 2004-05-31 | 2008-02-04 | 삼성전자주식회사 | 통신 시스템에서 상향 링크 응답 정보 송/수신 방법 및 장치 |
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2005
- 2005-06-07 DE DE102005026091.8A patent/DE102005026091B4/de active Active
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2006
- 2006-05-31 WO PCT/EP2006/005175 patent/WO2006131244A1/de not_active Application Discontinuation
- 2006-05-31 CN CN2006800195450A patent/CN101189846B/zh active Active
- 2006-05-31 EP EP06754003A patent/EP1889435A1/de not_active Withdrawn
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2007
- 2007-12-07 US US11/953,007 patent/US8223888B2/en active Active
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2012
- 2012-06-13 US US13/495,697 patent/US8526540B2/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0763919A2 (de) * | 1995-09-18 | 1997-03-19 | Mitsubishi Denki Kabushiki Kaisha | QPSK-Demodulator mit Frequenz- und Phasennachlauf |
Non-Patent Citations (1)
Title |
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See also references of WO2006131244A1 * |
Also Published As
Publication number | Publication date |
---|---|
CN101189846B (zh) | 2012-01-11 |
CN101189846A (zh) | 2008-05-28 |
US20080165834A1 (en) | 2008-07-10 |
US8223888B2 (en) | 2012-07-17 |
US8526540B2 (en) | 2013-09-03 |
DE102005026091A1 (de) | 2006-12-14 |
DE102005026091B4 (de) | 2019-09-05 |
WO2006131244A1 (de) | 2006-12-14 |
US20120314815A1 (en) | 2012-12-13 |
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