EP1190376A1 - Device for modulating load in a self-powered integrated circuit - Google Patents

Device for modulating load in a self-powered integrated circuit

Info

Publication number
EP1190376A1
EP1190376A1 EP01919611A EP01919611A EP1190376A1 EP 1190376 A1 EP1190376 A1 EP 1190376A1 EP 01919611 A EP01919611 A EP 01919611A EP 01919611 A EP01919611 A EP 01919611A EP 1190376 A1 EP1190376 A1 EP 1190376A1
Authority
EP
European Patent Office
Prior art keywords
transistor
circuit
box
gnd
supply voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP01919611A
Other languages
German (de)
French (fr)
Inventor
Bertrand Gomez
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SA
Thales DIS France SA
Original Assignee
STMicroelectronics SA
Gemplus Card International SA
Gemplus SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SA, Gemplus Card International SA, Gemplus SA filed Critical STMicroelectronics SA
Publication of EP1190376A1 publication Critical patent/EP1190376A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/0723—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs

Definitions

  • the present invention relates to a charge modulation device in a remotely powered integrated circuit.
  • Such a device allows the transmission of data between a remotely powered integrated circuit and a source reader of an electromagnetic field, by variation of the equivalent charge of the integrated circuit, seen from the reader.
  • This invention is particularly applicable to smart cards, without. '' and electronic labels or badges.
  • an oscillating circuit of the LC type for example, is used for the regeneration of the power supply and the data transmission between the card and the reader.
  • the oscillating circuit can be partially or completely integrated into the integrated circuit, or offset to the outside.
  • the oscillating circuit placed in an electromagnetic field delivers on its terminals, an alternating signal at the same frequency as the signal emitted by the reader.
  • the amplitude of this voltage signal is maximum when the natural resonance frequency of the oscillating circuit is equal to the transmission frequency of the reader.
  • An integrated circuit for such applications usually includes a circuit for rectifying the alternating signal supplied by the oscillating circuit.
  • the function of the rectifier circuit is to connect this alternating voltage to a continuous load, corresponding to the load of the logic circuitry of the integrated circuit. In other words, this rectifier circuit converts the AC supply voltage into a DC supply voltage "of the logic circuitry of the integrated circuit.
  • Load modulation then consists in varying the impedance of the tuning circuit, seen by the reader, as a function of the data to be transmitted.
  • the integrated circuit for this purpose includes a load variation circuit, controlled by a logic modulation signal delivered by a data transmission stage of the integrated circuit.
  • the load variation circuit generally consists of one or more transistors connected between the output pads of the oscillating circuit, and controlled by the logic modulation signal.
  • FIG. 1 represents a first exemplary embodiment of a charge variation circuit in a remotely powered integrated circuit.
  • This integrated circuit conventionally comprises an oscillating circuit 1 which delivers an alternating voltage signal between its terminals A and B; a rectifier circuit 2 of this alternating voltage signal to supply the DC supply voltages Vdd and Gnd to the logic circuitry 3 of the integrated circuit.
  • the rectifier circuit has a diode bridge DO, Dl, D2, D3 and the logic circuitry is represented by its equivalent charge, with a resistor Re and a capacitor Ce in parallel between the supply voltages Vdd and Gnd .
  • the load variation circuit of the oscillating circuit is controlled by a binary signal of modulation, denoted mod, delivered by a data transmission stage ED provided in logic circuitry 3, not shown.
  • the load variation circuit 4 includes a switching transistor Tml, controlled on its gate by the modulation signal mod.
  • it is an N-type MOS transistor, connected between a modulation node Nm and the supply voltage Gnd.
  • the load variation circuit 4 further comprises two isolation transistors, one per terminal of the oscillating circuit, which protect the switching transistor Tml from excessively high voltages.
  • these are both MOS transistors of type N. Each is mounted on a diode with its grid and drain connected together.
  • the switching transistor Tml When the switching transistor Tml is controlled in the open state or blocked by the binary mod modulation signal, it is equivalent to a high resistance which is noted rdsoff. When the switching transistor is controlled in the closed or on state, it is equivalent to a low resistance which is noted rdson. The difference between the rdsoff and rdson resistors creates the load variation. The working pulse of the oscillating circuit 1 is unchanged.
  • FIG. 2 shows another embodiment of the load variation circuit 4.
  • the charge variation circuit comprises a capacitor Cm and a switching transistor Tm2 connected in series between the terminals A and B.
  • the switching transistor is an N type MOS transistor. It receives the binary mod modulation signal on its gate. Depending on the binary level of this mod signal, the switching transistor Tm2 puts or does not put the capacitor Cm in parallel on the oscillating circuit. Depending on whether the capacitor Cm is actually put in parallel, or not, the capacitive load and the working pulse of the oscillating circuit are varied.
  • quality coefficient is meant the overvoltage at its terminals at the oscillation frequency of the circuit. The current load due to the additional elements reduces the overvoltage and therefore the efficiency of the oscillating circuit.
  • An object of the invention is a load modulation device in a remotely powered circuit which does not have these various drawbacks.
  • the idea underlying the invention is to use the parasitic drain / substrate or source / substrate diode of the MOS transistors produced in a box.
  • the invention by applying the modulation to the well polarization of a connected MOS transistor by its drain or its source at a terminal of the oscillating circuit, one can make passing the parasitic diode drain box -or source box, which has the effect of drawing .the terminal considered at a given voltage level, which returns, seen of the reader, to affect the load of the oscillating circuit.
  • the invention therefore relates to a load modulation device in a remotely powered integrated circuit, a device for regenerating a first and a second supply voltage of said circuit comprising an oscillating circuit and at least one MOS transistor produced in a box on at least one terminal of the oscillating circuit, the drain or the source of said transistor being connected to the terminal considered, characterized in that the modulation device comprises means for polarizing said box at the first or at the second supply voltage according to the level of a binary modulation signal.
  • FIG. 3 shows a remotely powered integrated circuit comprising a charge variation circuit according to a first embodiment of the invention
  • FIG. 4 represents a variant of the load variation circuit shown in FIG. 3 -
  • Figure 5 shows.
  • a remotely powered integrated circuit. comprising a load variation circuit according to another example of implementation of the invention
  • FIG. 6 represents an electronic system using remotely powered integrated circuits.
  • an electronic system 10 for a smart card, electronic label or badge type application comprises a reader 11 ensuring inter alia the remote supply of smart cards or electronic labels 12 by emission of a field electromagnetic B.
  • These smart cards or electronic labels 12 comprise an integrated circuit of the remotely powered type 13.
  • the remotely powered integrated circuit shown in FIG. 3 comprises, as in the preceding figures, a device for regenerating power supplies comprising an oscillating circuit 1 and a rectifier circuit 2, an electronic circuit 3 supplied by the supply voltages Vdd and Gnd regenerated and a circuit 4 for varying the load of the oscillating circuit.
  • the rectifier circuit has a diode bridge structure corresponding to the structure
  • diodes are each made by a MOS transistor mounted as a diode, gate and drain connected together.
  • the diode DO is produced by an N-type MOS transistor, Ml, the source s of which is connected to the supply voltage Gnd and the gate g and the drain d are connected together to terminal A.
  • the diode Dl is produced by an N-type MOS transistor, Ml, the source s of which is connected to the supply voltage Gnd and the gate g and the drain d are connected together to terminal B.
  • the diode D2 is produced by a P-type MOS transistor, M2, the source s of which is connected to the supply voltage Vdd and the gate g and the drain d are connected together to terminal A.
  • the diode D3 is produced by a P-type MOS transistor , M3, whose source s is connected to the supply voltage Vdd and the gate g and the drain d are connected together to terminal B.
  • the substrate or the well of a transistor is biased at a suitable voltage, in general the source voltage, to prevent the parasitic drain / substrate or drain / well and source / substrate or source / well diodes from being on, which prevents leakage in the transistor.
  • a suitable voltage in general the source voltage
  • This polarization is shown in the figures by a "bulk" polarization connection, between the transistor channel and its source.
  • the MOS N transistors are produced in the substrate P and the MOS P transistors are produced in N type boxes.
  • the box polarization is used to maintain non-passing or to make the parasitic box diode of a MOS transistor pass through connected to a terminal of the oscillating circuit. In this way, if it is the drain of this transistor which is connected to a terminal of the oscillating circuit, it is possible to draw this terminal at the box bias voltage which makes the associated parasitic diode passable.
  • the equivalent load of the oscillating circuit is thus modified, seen from the reader.
  • the MOS transistors P M2 and M3 are produced in a box, preferably in the same box.
  • the drain of each of these transistors is connected to a terminal of the oscillating circuit.
  • the load variation circuit 4 then comprises means controlled by the binary modulation signal mod, for modifying the well bias voltage of these transistors M2 and M3.
  • these means consist of an inverter comprising a MOS transistor P T2 and an MOS transistor N Tl connected between the supply voltages Vdd and Gnd, the gates of which are connected in common receive the modulating binary signal mod and whose drains connected in common provide the output S of the inverter, connected to the bkp connection of box polarization.
  • the binary modulation signal is equal to "1"
  • the output S is drawn at the supply voltage Gnd.
  • at least one parasitic drain box diode is conducting, drawing the terminal associated with the supply voltage Gnd.
  • the binary modulation signal is "0"
  • the output S is drawn at the supply voltage Vdd.
  • the well of the transistors M2 and M3 is then biased at the supply voltage Vdd and no drain / well diode is conducting.
  • the transistor T1 is dimensioned so as to draw, more or less quickly, the box polarization connection at the supply voltage Gnd, depending on the modulation index sought.
  • a resistive element R is provided in series between the transistor Tl and the supply voltage Gnd, which also makes it possible to adapt the modulation index of the circuit 4.
  • This resistive element can be in practice produced by a pure resistance (diffusion, polysilicon for example), or by an equivalent circuit, for example a transistor circuit.
  • FIG. 4 a dual solution of the solution shown in FIG. 3 has been represented, corresponding to an integrated circuit produced on a type N substrate.
  • the MOS N transistors are produced in P type boxes. These boxes are normally biased at the supply voltage Gnd, typically by their source.
  • the load variation circuit allows then either polarize the well of the transistors MO and Ml in a normal manner, at the supply voltage Gnd, or polarize it at the supply voltage Vdd, as a function of the binary modulation signal mod.
  • the output S of the charge variation circuit is in this example connected to the bkn connection of box polarization of the transistors MO and Ml. If it includes an adaptation resistance Rm ′ of the modulation index, this resistance is then provided between the supply voltage Vdd and the transistor T2, to make the output S of the circuit rise more or less quickly at the voltage d Vdd power supply.
  • FIG. 4 Another example of a remote-powered integrated circuit with a load variation circuit according to the invention is shown in FIG. 4.
  • the difference with the solution shown in FIG. 3 resides in the MOS transistors of the rectifier circuit 2 which are mounted.
  • the transistors MO and M2 form a first inverter, with their gates connected together on terminal A and their drains connected together on terminal B.
  • Transistors Ml and M3 form another inverter with their gates connected together on terminal B and their drains connected together on terminal A.
  • the charge variation circuit according to the invention applies in the same way as in FIG. 3.
  • the connection of box polarization is connected to the output of the charge variation circuit, which has the same structure as in figure 3.
  • the invention applies equally well to configurations of the device for regenerating supply voltages Vdd and Gnd in which there would be a transistor produced in a box connected by its source to a terminal of the oscillating circuit.
  • the box source diode which makes it possible to apply the modulation according to the invention.
  • the charge variation circuit according to the invention preferably comprises at least one box transistor per terminal of the oscillating circuit.
  • it may include a box transistor on a single terminal, even if the efficiency of the dimming circuit is lower in this case.
  • a charge variation circuit according to the invention can be provided for modify the polarization voltage of the box according to the binary modulation signal mod.
  • the MOS transistors M2 and M3 of FIGS. 3 and 5 are each made in a separate box or in the same box. The same remark applies to the transistors MO and Ml of the figure.
  • the load variation device according to the invention is particularly easy to implement and does not add any load to the oscillating circuit. Thus, the quality coefficient of the oscillating circuit is the same with or without modulation.
  • the load variation circuit 4 does not have to withstand the large voltage differences which may occur at the terminals of the oscillating circuit. They are therefore of smaller dimensions, hence a substantial saving in silicon area for the integrated circuit.
  • the circuit 4 load variation will be placed upstream between the rectifier circuit 2 and the isolation device 5.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Amplifiers (AREA)
  • Electronic Switches (AREA)
  • Dc-Dc Converters (AREA)
  • Near-Field Transmission Systems (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

The invention concerns a self-powered integrated circuit, wherein a device regenerating supply voltages (Vdd, Gnd) comprise an oscillating circuit (1) at the terminals (A, B) and at least a MOS transistor provided in a housing on a terminal (A, B) at least of the oscillating circuit (1), whereof the drain or the source is connected to said terminal. A load modulating device comprises means (4) for polarising the housing of the transistor(s) (M2, M3), at the first supply voltage (Vdd) or at the second voltage (Gnd), in accordance with a logic modulation signal (mod).

Description

DISPOSITIF DE MODULATION DE CHARGE DANS UN CIRCUIT INTEGRE TELE-ALIMENTE LOAD MODULATION DEVICE IN AN INTEGRATED TELE-POWERED CIRCUIT
La présente invention concerne un dispositif de modulation de' charge dans un circuit intégré téléalimenté .The present invention relates to a charge modulation device in a remotely powered integrated circuit.
Un tel dispositif permet la transmission de données entre un circuit intégré télé-alimenté et un lecteur source d'un champ électromagnétique, par variation de la charge équivalente du circuit intégré, vue du lecteur.Such a device allows the transmission of data between a remotely powered integrated circuit and a source reader of an electromagnetic field, by variation of the equivalent charge of the integrated circuit, seen from the reader.
Cette invention s'applique notamment aux cartes à puce, sans . 'contact et aux étiquettes ou badges électroniques .This invention is particularly applicable to smart cards, without. '' and electronic labels or badges.
Dans de telles applications, un circuit oscillant, de type LC par exemple, est utilisé pour la régénération de l'alimentation et la transmission de données entre la carte et le lecteur. Le circuit oscillant peut être partiellement ou totalement intégré dans le circuit intégré, ou déporté à l'extérieur.In such applications, an oscillating circuit, of the LC type for example, is used for the regeneration of the power supply and the data transmission between the card and the reader. The oscillating circuit can be partially or completely integrated into the integrated circuit, or offset to the outside.
Le circuit oscillant placé dans un champ électromagnétique délivre sur ses bornes, un signal alternatif à la même fréquence que le signal émis par le lecteur. L'amplitude de ce signal de tension est maximale lorsque la fréquence propre de résonance du circuit oscillant est égale à la fréquence d'émission du lecteur. Un circuit intégré pour de telles applications comprend habituellement un circuit redresseur du signal alternatif fournit par le circuit oscillant. La fonction du circuit redresseur est de relier cette tension alternative à une charge continue, correspondant à la charge de la circuiterie logique du circuit intégre. Autrement dit, ce circuit redresseur convertit la tension alternative d'alimentation en une tension continue d'alimentation" de la circuiterie logique du circuit, intégré.The oscillating circuit placed in an electromagnetic field delivers on its terminals, an alternating signal at the same frequency as the signal emitted by the reader. The amplitude of this voltage signal is maximum when the natural resonance frequency of the oscillating circuit is equal to the transmission frequency of the reader. An integrated circuit for such applications usually includes a circuit for rectifying the alternating signal supplied by the oscillating circuit. The function of the rectifier circuit is to connect this alternating voltage to a continuous load, corresponding to the load of the logic circuitry of the integrated circuit. In other words, this rectifier circuit converts the AC supply voltage into a DC supply voltage "of the logic circuitry of the integrated circuit.
La modulation de charge consiste alors à faire varier l'impédance du circuit d'accord, vue par le lecteur, en fonction des données à transmettre.Load modulation then consists in varying the impedance of the tuning circuit, seen by the reader, as a function of the data to be transmitted.
Le circuit intégré comprend à cet effet un circuit de variation de charge, commandé par un signal logique de modulation délivré par un étage de transmission de données du circuit intégré. Le circuit de variation de charge consiste généralement en un ou plusieurs transistors connectés entre les plots de sortie du circuit oscillant, et commandés par le signal logique de modulation.The integrated circuit for this purpose includes a load variation circuit, controlled by a logic modulation signal delivered by a data transmission stage of the integrated circuit. The load variation circuit generally consists of one or more transistors connected between the output pads of the oscillating circuit, and controlled by the logic modulation signal.
La figure 1 représente un premier exemple de réalisation d'un circuit de variation de charge dans un circuit intégré télé-alimenté. Ce circuit intégré comprend de façon classique, un circuit oscillant 1 qui délivre un signal de tension alternatif entre ses bornes A et B ; un circuit redresseur 2 de ce signal de tension alternatif pour fournir les tensions d'alimentation continue Vdd et Gnd à la circuiterie logique 3 du circuit intégré. Dans l'exemple, le circuit redresseur est à pont de diodes DO, Dl, D2, D3 et la circuiterie logique est représentée par sa charge équivalente, avec une résistance Re et un condensateur Ce en parallèle entre les tensions d'alimentation Vdd et Gnd.FIG. 1 represents a first exemplary embodiment of a charge variation circuit in a remotely powered integrated circuit. This integrated circuit conventionally comprises an oscillating circuit 1 which delivers an alternating voltage signal between its terminals A and B; a rectifier circuit 2 of this alternating voltage signal to supply the DC supply voltages Vdd and Gnd to the logic circuitry 3 of the integrated circuit. In the example, the rectifier circuit has a diode bridge DO, Dl, D2, D3 and the logic circuitry is represented by its equivalent charge, with a resistor Re and a capacitor Ce in parallel between the supply voltages Vdd and Gnd .
Le circuit de variation de charge du circuit oscillant est commandé par un signal binaire de modulation, noté mod, délivré par un étage ED de transmission de données prévu dans la circuiterie logique 3, non- représenté.The load variation circuit of the oscillating circuit is controlled by a binary signal of modulation, denoted mod, delivered by a data transmission stage ED provided in logic circuitry 3, not shown.
Le circuit 4 de variation de charge comprend un transistor de commutation Tml, commandé sur sa grille par le signal de modulation mod. Dans l'exemple, c'est un transistor MOS de type N, connecté entre un nœud Nm de modulation et la tension d'alimentation Gnd. Le circuit 4 de variation de charge comprend en outre deux transistors d'isolation, un par borne du circuit oscillant, qui protègent le transistor de commutation Tml des tensions trop élevée. On a ainsi un transistor d'isolation Til, connecté entre la borne A et le nœud Nm et un transistor d'isolation Ti2, connecté entre la borne B et le nœud Nm. Dans l'exemple, ce sont tous deux des transistors MOS de type N. Chacun est monté en diode avec sa grille et son drain reliés ensemble.The load variation circuit 4 includes a switching transistor Tml, controlled on its gate by the modulation signal mod. In the example, it is an N-type MOS transistor, connected between a modulation node Nm and the supply voltage Gnd. The load variation circuit 4 further comprises two isolation transistors, one per terminal of the oscillating circuit, which protect the switching transistor Tml from excessively high voltages. There is thus an isolation transistor Til, connected between terminal A and the node Nm and an isolation transistor Ti2, connected between terminal B and the node Nm. In the example, these are both MOS transistors of type N. Each is mounted on a diode with its grid and drain connected together.
Lorsque le transistor de commutation Tml est commandé à l'état ouvert ou bloqué par le signal binaire de modulation mod, il est équivalent à une résistance élevée que l'on note rdsoff. Lorsque le transistor de commutation est commandé à l'état fermé ou passant, il est équivalent à une résistance faible que l'on note rdson. La différence entre les résistances rdsoff et rdson crée la variation de charge. La pulsation de travail du circuit oscillant 1 est inchangée.When the switching transistor Tml is controlled in the open state or blocked by the binary mod modulation signal, it is equivalent to a high resistance which is noted rdsoff. When the switching transistor is controlled in the closed or on state, it is equivalent to a low resistance which is noted rdson. The difference between the rdsoff and rdson resistors creates the load variation. The working pulse of the oscillating circuit 1 is unchanged.
La figure 2 représente un autre exemple de réalisation du circuit 4 de variation de charge. Dans cet exemple, le circuit de variation de charge comprend un condensateur Cm et un transistor de commutation Tm2 connectés en série entre les bornes A et B. Dans l'exemple, le transistor de commutation est un transistor MOS de type N. Il reçoit sur sa grille le signal binaire de modulation mod. En fonction du niveau binaire de ce -signal mod, le transistor de commutation Tm2 met ou ne met pas le condensateur Cm en parallèle sur le circuit oscillant. Selon que le condensateur Cm est effectivement mis en parallèle, ou non, on varie la charge capacitive et la pulsation de travail du circuit oscillant . Ces exemples de circuit de modulation de charge de l'état de la technique ont en commun de nécessiter la connexion d'éléments supplémentaires sur le circuit oscillant, qui viennent perturber le coefficient de qualité de ce circuit. On entend par coefficient de qualité, la surtension à ses bornes à la fréquence d'oscillation du circuit. La charge en courant due aux éléments supplémentaires réduit la surtension et donc, le rendement du circuit oscillant.FIG. 2 shows another embodiment of the load variation circuit 4. In this example, the charge variation circuit comprises a capacitor Cm and a switching transistor Tm2 connected in series between the terminals A and B. In for example, the switching transistor is an N type MOS transistor. It receives the binary mod modulation signal on its gate. Depending on the binary level of this mod signal, the switching transistor Tm2 puts or does not put the capacitor Cm in parallel on the oscillating circuit. Depending on whether the capacitor Cm is actually put in parallel, or not, the capacitive load and the working pulse of the oscillating circuit are varied. These examples of state-of-the-art charge modulation circuit have in common the need to connect additional elements to the oscillating circuit, which disturb the quality coefficient of this circuit. By quality coefficient is meant the overvoltage at its terminals at the oscillation frequency of the circuit. The current load due to the additional elements reduces the overvoltage and therefore the efficiency of the oscillating circuit.
En outre, ces éléments supplémentaires entraînent un surcoût en terme de surface d'implantation sur le circuit intégré. Ils doivent en effet être aptes à supporter de grandes variations de tension sur les bornes du circuit oscillant, qui peuvent atteindre 10 à 100 volts. Un objet de l'invention est un dispositif de modulation de charge dans un circuit télé-alimenté qui n'a pas ces différents inconvénients.In addition, these additional elements entail an additional cost in terms of implantation surface on the integrated circuit. They must indeed be able to withstand large voltage variations on the terminals of the oscillating circuit, which can reach 10 to 100 volts. An object of the invention is a load modulation device in a remotely powered circuit which does not have these various drawbacks.
L'idée à la base de l'invention est d'utiliser la diode parasite drain/substrat ou source/substrat des transistors MOS réalisés dans un caisson. Selon l'invention, en appliquant la modulation à la polarisation de caisson d'un transistor MOS connecté par son drain ou sa source à une borne du circuit oscillant, on peut rendre passant la diode parasite drain caisson -ou source caisson, ce qui a pour effet de tirer .la borne considérée à un niveau de tension donné, ce qui revient, vu du lecteur, à affecter la charge du circuit oscillant.The idea underlying the invention is to use the parasitic drain / substrate or source / substrate diode of the MOS transistors produced in a box. According to the invention, by applying the modulation to the well polarization of a connected MOS transistor by its drain or its source at a terminal of the oscillating circuit, one can make passing the parasitic diode drain box -or source box, which has the effect of drawing .the terminal considered at a given voltage level, which returns, seen of the reader, to affect the load of the oscillating circuit.
Telle que caractérisée, l'invention concerne donc un dispositif de modulation de charge dans un circuit intégré télé-alimenté, un dispositif de régénération d'une première et d'une deuxième tension d'alimentation dudit circuit comprenant un circuit oscillant et au moins un transistor MOS réalisé dans un caisson sur une borne au moins du circuit oscillant, le drain ou la source dudit transistor étant connecté à la borne considérée, caractérisé en ce que le dispositif de modulation comprend des moyens pour polariser ledit caisson à la première ou à la deuxième tension d'alimentation selon le niveau d'un signal binaire de modulation. D'autres caractéristiques ou avantages de l'invention sont détaillés dans la description suivante faite à titre indicatif et non limitatif de l'invention, et en référence aux dessins annexés dans lesquels : - les figures 1 et 2 déjà décrites représentent chacune un circuit intégré téléalimenté comprenant un circuit de variation de charge selon l'état de la technique ;As characterized, the invention therefore relates to a load modulation device in a remotely powered integrated circuit, a device for regenerating a first and a second supply voltage of said circuit comprising an oscillating circuit and at least one MOS transistor produced in a box on at least one terminal of the oscillating circuit, the drain or the source of said transistor being connected to the terminal considered, characterized in that the modulation device comprises means for polarizing said box at the first or at the second supply voltage according to the level of a binary modulation signal. Other characteristics or advantages of the invention are detailed in the following description given by way of indication and without limitation of the invention, and with reference to the appended drawings in which: - Figures 1 and 2 already described each represent an integrated circuit remotely powered including a charge variation circuit according to the state of the art;
- la figure 3 représente un circuit intégré télé-alimenté comprenant un circuit de variation de charge selon un premier exemple de mise en œuvre de l'invention ; la figure 4 représente une variante du circuit de variation de charge représenté à la figure 3 -; la figure 5 représente . un circuit intégré télé-alimenté. comprenant un circuit de variation de charge selon un autre exemple de mise en œuvre de l'invention; et la figure 6 représente un système électronique utilisant des circuits intégrés télé- alimentés.- Figure 3 shows a remotely powered integrated circuit comprising a charge variation circuit according to a first embodiment of the invention; FIG. 4 represents a variant of the load variation circuit shown in FIG. 3 -; Figure 5 shows. a remotely powered integrated circuit. comprising a load variation circuit according to another example of implementation of the invention; and FIG. 6 represents an electronic system using remotely powered integrated circuits.
Dans les figures, les mêmes éléments portent les mêmes références.In the figures, the same elements have the same references.
Comme représenté sur la figure 5, un système électronique 10 pour une application type carte à puce, étiquette ou badge électronique comprend un lecteur 11 assurant entre autre la télé-alimentation des cartes à puce ou d'étiquettes électroniques 12 par émission d'un champ électromagnétique B. Ces cartes à puce ou étiquettes électroniques 12 comprennent un circuit intégré du type télé-alimenté 13.As shown in FIG. 5, an electronic system 10 for a smart card, electronic label or badge type application comprises a reader 11 ensuring inter alia the remote supply of smart cards or electronic labels 12 by emission of a field electromagnetic B. These smart cards or electronic labels 12 comprise an integrated circuit of the remotely powered type 13.
Le circuit intégré télé-alimenté représenté sur la figure 3 comprend, comme dans les figures précédentes, un dispositif de régénération des alimentations comprenant un circuit oscillant 1 et un circuit redresseur 2, une circuiterie électronique 3 alimentée par les tensions d'alimentation Vdd et Gnd régénérées et un circuit 4 de variation de la charge du circuit oscillant .The remotely powered integrated circuit shown in FIG. 3 comprises, as in the preceding figures, a device for regenerating power supplies comprising an oscillating circuit 1 and a rectifier circuit 2, an electronic circuit 3 supplied by the supply voltages Vdd and Gnd regenerated and a circuit 4 for varying the load of the oscillating circuit.
Dans l'exemple, le circuit redresseur à une structure à pont de diodes correspondant à la structureIn the example, the rectifier circuit has a diode bridge structure corresponding to the structure
D0, Dl, D2, D3 représentée sur la figure 1. Dans la figure 3, ces diodes sont réalisées chacune par un transistor MOS monté en diode, grille et drain reliés ensemble.D0, Dl, D2, D3 shown in Figure 1. In Figure 3, these diodes are each made by a MOS transistor mounted as a diode, gate and drain connected together.
Plus précisément, la diode DO est réalisée par un transistor MOS de type N, Ml, dont la source s est connectée à la tension d'alimentation Gnd et la grille g et le drain d sont reliés ensemble à la borne A. De même, la diode Dl est réalisée par un transistor MOS de type N, Ml, dont la source s est connectée à la tension d'alimentation Gnd et la grille g et le drain d sont reliés ensemble à la borne B. La diode D2 est réalisée par un transistor MOS de type P, M2, dont la source s est connectée à la tension d'alimentation Vdd et la grille g et le drain d sont reliés ensemble à la borne A. La diode D3 est réalisée par un transistor MOS de type P, M3, dont la source s est connectée à la tension d'alimentation Vdd et la grille g et le drain d sont reliés ensemble à la borne B.More specifically, the diode DO is produced by an N-type MOS transistor, Ml, the source s of which is connected to the supply voltage Gnd and the gate g and the drain d are connected together to terminal A. Similarly, the diode Dl is produced by an N-type MOS transistor, Ml, the source s of which is connected to the supply voltage Gnd and the gate g and the drain d are connected together to terminal B. The diode D2 is produced by a P-type MOS transistor, M2, the source s of which is connected to the supply voltage Vdd and the gate g and the drain d are connected together to terminal A. The diode D3 is produced by a P-type MOS transistor , M3, whose source s is connected to the supply voltage Vdd and the gate g and the drain d are connected together to terminal B.
Habituellement, le substrat ou le caisson d'un transistor est polarisé à une tension adaptée, en général la tension de source, pour empêcher les diodes parasites drain/substrat ou drain/caisson et source/substrat ou source/caisson d'être passantes, ce qui permet d'éviter les fuites dans le transistor. Cette polarisation est matérialisée sur les figures par une connexion de polarisation "bulk", entre le canal du transistor et sa source.Usually, the substrate or the well of a transistor is biased at a suitable voltage, in general the source voltage, to prevent the parasitic drain / substrate or drain / well and source / substrate or source / well diodes from being on, which prevents leakage in the transistor. This polarization is shown in the figures by a "bulk" polarization connection, between the transistor channel and its source.
Dans un exemple de technologie MOS sur substrat P, les transistors MOS N sont réalisés dans le substrat P et les transistors MOS P sont réalisés dans des caissons de type N.In an example of MOS technology on substrate P, the MOS N transistors are produced in the substrate P and the MOS P transistors are produced in N type boxes.
Il est possible d'avoir une polarisation différente pour chaque caisson, en fonction des besoins, alors que la polarisation du substrat est la même pour tout le circuit intégré.It is possible to have a different polarization for each box, depending on the needs, while the polarization of the substrate is the same for the whole integrated circuit.
Dans l'invention, on utilise la polarisation de caisson pour maintenir non passante ou pour rendre passante la diode parasite de caisson d'un transistor MOS connecté à une borne du circuit oscillant. De cette façon, si c'est le drain de ce transistor qui est connecté à une borne du circuit oscillant, on peut tirer cette borne à la tension de polarisation de caisson qui rend la diode parasite associée passante. La charge équivalente du circuit oscillant est ainsi modifiée, vue du lecteur.In the invention, the box polarization is used to maintain non-passing or to make the parasitic box diode of a MOS transistor pass through connected to a terminal of the oscillating circuit. In this way, if it is the drain of this transistor which is connected to a terminal of the oscillating circuit, it is possible to draw this terminal at the box bias voltage which makes the associated parasitic diode passable. The equivalent load of the oscillating circuit is thus modified, seen from the reader.
Si on prend l'exemple représenté sur la figure 3, dans une technologie MOS sur substrat P, les transistors MOS P M2 et M3 sont réalisés dans un caisson, de préférence, dans le même caisson. Le drain de chacun de ces transistors est relié à une borne du circuit oscillant.If we take the example shown in FIG. 3, in a MOS technology on a substrate P, the MOS transistors P M2 and M3 are produced in a box, preferably in the same box. The drain of each of these transistors is connected to a terminal of the oscillating circuit.
Le circuit 4 de variation de charge selon l'invention comprend alors des moyens commandés par le signal binaire de modulation mod, pour modifier la tension de polarisation de caisson de ces transistors M2 et M3. Dans l'exemple, ces moyens consistent en un inverseur comprenant un transistor MOS P T2 et un transistor MOS N Tl connectés entre les tensions d'alimentation Vdd et Gnd, dont les grilles reliées en commun reçoivent le signal binaire de modulation mod et dont les drains reliés en commun fournissent la sortie S de l'inverseur, connectée à la connexion bkp de polarisation de caisson.The load variation circuit 4 according to the invention then comprises means controlled by the binary modulation signal mod, for modifying the well bias voltage of these transistors M2 and M3. In the example, these means consist of an inverter comprising a MOS transistor P T2 and an MOS transistor N Tl connected between the supply voltages Vdd and Gnd, the gates of which are connected in common receive the modulating binary signal mod and whose drains connected in common provide the output S of the inverter, connected to the bkp connection of box polarization.
Si le signal binaire de modulation vaut "1", c'est le transistor Tl du circuit de variation de charge qui est passant. La sortie S est tirée à la tension d'alimentation Gnd. Ainsi, selon le niveau du signal alternatif sur- les bornes A et B du circuit oscillant, une diode parasite drain caisson au moins est passante, tirant la borne associée à la tension d'alimentation Gnd.If the binary modulation signal is equal to "1", it is the transistor Tl of the charge variation circuit which is passing. The output S is drawn at the supply voltage Gnd. Thus, depending on the level of the alternating signal on the terminals A and B of the oscillating circuit, at least one parasitic drain box diode is conducting, drawing the terminal associated with the supply voltage Gnd.
Si le signal binaire de modulation vaut "0", c'est le transistor T2 du circuit de variation de charge qui est passant. La sortie S est tirée à la tension d'alimentation Vdd. Le caisson des transistors M2 et M3 est alors polarisé à la tension d'alimentation Vdd et aucune diode drain/caisson n'est passante.If the binary modulation signal is "0", it is the transistor T2 of the charge variation circuit which is conducting. The output S is drawn at the supply voltage Vdd. The well of the transistors M2 and M3 is then biased at the supply voltage Vdd and no drain / well diode is conducting.
Le transistor Tl est dimensionné pour tirer de façon plus ou moins rapide la connexion de polarisation de caisson à la tension d'alimentation Gnd, en fonction de l'indice de modulation recherché.The transistor T1 is dimensioned so as to draw, more or less quickly, the box polarization connection at the supply voltage Gnd, depending on the modulation index sought.
Dans une variante représentée sur la figure 3, on prévoit un élément résistif R en série entre le transistor Tl et la tension d'alimentation Gnd, ce qui permet aussi d'adapter l'indice de modulation du circuit 4. Cet élément résistif peut être en pratique réalisée par une résistance pure (diffusion, polysilicium par exemple) , ou par un circuit équivalent, par exemple un circuit à transistors. Sur la figure 4, on a représenté une solution duale de la solution représentée sur la figure 3, correspondant à un circuit intégré réalisé sur un substrat de type N. Dans cet exemple, les transistors MOS N sont réalisée dans des caissons de type P. Ces caissons sont normalement polarisés à la tension d'alimentation Gnd, typiquement par leur source. Le circuit de variation de charge selon l'invention permet alors soit de polariser de façon normale le caisson des transistors MO et Ml, à la tension d'alimentation Gnd, soit de le polariser à la tension d'alimentation Vdd, en fonction du signal binaire de modulation mod. La sortie S du circuit de variation de charge est dans cet exemple connectée à la connexion bkn de polarisation de caisson des transistors MO et Ml. Si il comprend une résistance d'adaptation Rm' de l'indice de modulation, cette résistance est alors prévue entre la tension d'alimentation Vdd et le transistor T2, pour faire monter plus ou moins rapidement la sortie S du circuit à la tension d'alimentation Vdd.In a variant shown in FIG. 3, a resistive element R is provided in series between the transistor Tl and the supply voltage Gnd, which also makes it possible to adapt the modulation index of the circuit 4. This resistive element can be in practice produced by a pure resistance (diffusion, polysilicon for example), or by an equivalent circuit, for example a transistor circuit. In FIG. 4, a dual solution of the solution shown in FIG. 3 has been represented, corresponding to an integrated circuit produced on a type N substrate. In this example, the MOS N transistors are produced in P type boxes. These boxes are normally biased at the supply voltage Gnd, typically by their source. The load variation circuit according to the invention allows then either polarize the well of the transistors MO and Ml in a normal manner, at the supply voltage Gnd, or polarize it at the supply voltage Vdd, as a function of the binary modulation signal mod. The output S of the charge variation circuit is in this example connected to the bkn connection of box polarization of the transistors MO and Ml. If it includes an adaptation resistance Rm ′ of the modulation index, this resistance is then provided between the supply voltage Vdd and the transistor T2, to make the output S of the circuit rise more or less quickly at the voltage d Vdd power supply.
Un autre exemple de circuit intégré telé-alimenté avec un circuit de variation de charge selon l'invention est représenté sur la figure 4. La différence avec la solution représentée sur la figure 3, réside dans les transistors MOS du circuit redresseur 2 qui sont montés différemment. Dans cet exemple, les transistors MO et M2 forment un premier inverseur, avec leurs grilles reliées ensemble sur la borne A et leurs drains reliés ensemble sur la borne B. Les transistors Ml et M3 forment un autre inverseur avec leurs grilles reliées ensemble sur la borne B et leurs drains reliés ensemble sur la borne A. On a ainsi une structure de redresseur à inverseurs rebouclés en entrée/sortie sur les bornes A et B du circuit oscillant, pour régénérer les tensions d'alimentation Vdd et Gnd.Another example of a remote-powered integrated circuit with a load variation circuit according to the invention is shown in FIG. 4. The difference with the solution shown in FIG. 3 resides in the MOS transistors of the rectifier circuit 2 which are mounted. differently. In this example, the transistors MO and M2 form a first inverter, with their gates connected together on terminal A and their drains connected together on terminal B. Transistors Ml and M3 form another inverter with their gates connected together on terminal B and their drains connected together on terminal A. There is thus a rectifier structure with inverters looped in input / output on terminals A and B of the oscillating circuit, to regenerate the supply voltages Vdd and Gnd.
Dans cet exemple, le circuit de variation de charge selon l'invention s'applique de la même façon que dans la figure 3. Pour des transistors M2 et M3 réalisés dans des caissons de type N, la connexion de polarisation de caisson est connectée à la sortie du circuit de variation de charge, qui a la même structure que dans la figure 3.In this example, the charge variation circuit according to the invention applies in the same way as in FIG. 3. For transistors M2 and M3 produced in N type boxes, the connection of box polarization is connected to the output of the charge variation circuit, which has the same structure as in figure 3.
L'invention s'applique aussi bien à des configurations du dispositif de régénération des tensions d'alimentation Vdd et Gnd dans lesquelles on aurait un transistor réalisé dans un caisson connecté par sa source à une borne du circuit oscillant. Dans ce cas, c'est la diode source caisson qui permet d'appliquer la modulation selon l'invention.The invention applies equally well to configurations of the device for regenerating supply voltages Vdd and Gnd in which there would be a transistor produced in a box connected by its source to a terminal of the oscillating circuit. In this case, it is the box source diode which makes it possible to apply the modulation according to the invention.
On notera aussi que le circuit de variation de charge selon l'invention comprend de préférence au moins un transistor à caisson par borne du circuit oscillant. Cependant, il peut comporter un transistor à caisson sur une seule borne, même si l'efficacité du circuit de variation est moindre dans ce cas.It will also be noted that the charge variation circuit according to the invention preferably comprises at least one box transistor per terminal of the oscillating circuit. However, it may include a box transistor on a single terminal, even if the efficiency of the dimming circuit is lower in this case.
Plus généralement, dès lors que sur une borne au moins du circuit oscillant, au moins un transistor MOS réalisé dans un caisson a son drain ou sa source connecté à la borne considérée, on peut prévoir un circuit de variation de charge selon l'invention pour modifier la tension de polarisation du caisson en fonction du signal binaire de modulation mod. On notera qu'il importe peu dans l'invention que les transistors MOS M2 et M3 des figures 3 et 5 soient réalisés chacun dans un caisson séparé ou dans un même caisson. La même remarque s'applique aux transistors MO et Ml de la figure . Le dispositif de variation de charge selon l'invention est particulièrement aisé à mettre en œuvre et ne rajoute aucune charge sur le circuit oscillant. Ainsi, le coefficient de qualité du circuit oscillant est le même avec ou sans modulation. En outre, le circuit 4 de -variation de charge n'a pas à supporter les écarts de tension importants qui peuvent se produire aux bornes du circuit oscillant. Ils sont donc de plus petites dimensions, d'où une économie substantielle de surface silicium pour le circuit intégré. Dans le cas, comme représenté sur les figures 3 à 5, où le circuit intégré comprend un dispositif 5 d'isolation connecté entre la sortie d'alimentation Vdd du circuit redresseur 2 et l'entrée correspondante sur la circuiterie interne 3, le circuit 4 de variation de charge sera- placé en amont, entre le circuit redresseur 2 et le dispositif 5 d'isolation. More generally, as soon as at least one terminal of the oscillating circuit, at least one MOS transistor produced in a well has its drain or its source connected to the terminal considered, a charge variation circuit according to the invention can be provided for modify the polarization voltage of the box according to the binary modulation signal mod. It will be noted that it does not matter in the invention that the MOS transistors M2 and M3 of FIGS. 3 and 5 are each made in a separate box or in the same box. The same remark applies to the transistors MO and Ml of the figure. The load variation device according to the invention is particularly easy to implement and does not add any load to the oscillating circuit. Thus, the quality coefficient of the oscillating circuit is the same with or without modulation. In addition, the load variation circuit 4 does not have to withstand the large voltage differences which may occur at the terminals of the oscillating circuit. They are therefore of smaller dimensions, hence a substantial saving in silicon area for the integrated circuit. In the case, as shown in FIGS. 3 to 5, where the integrated circuit comprises an isolation device 5 connected between the supply output Vdd of the rectifier circuit 2 and the corresponding input on the internal circuitry 3, the circuit 4 load variation will be placed upstream between the rectifier circuit 2 and the isolation device 5.

Claims

REVENDICATIONS
1. Dispositif de modulation de charge dans un circuit intégré télé-alimenté comportant un dispositif de régénération «d'une première et d'une deuxième tension d'alimentation (Vdd, Gnd) comprenant un circuit oscillant (1) et au moins un transistor MOS (M2, M3) réalisé dans un caisson sur une borne au moins (A, B) du circuit oscillant, le drain ou la source dudit transistor étant connecté à la borne considérée, caractérisé en ce que le dispositif de modulation comprend des moyens (4) pour polariser le caisson dudit transistor à la première ou à la deuxième tension d'alimentation (Vdd, Gnd) selon le niveau d'un signal binaire de modulation (mod) .1. Load modulation device in a remotely powered integrated circuit comprising a device for regenerating “a first and a second supply voltage (Vdd, Gnd) comprising an oscillating circuit (1) and at least one transistor MOS (M2, M3) produced in a box on at least one terminal (A, B) of the oscillating circuit, the drain or the source of said transistor being connected to the terminal considered, characterized in that the modulation device comprises means ( 4) to bias the well of said transistor to the first or to the second supply voltage (Vdd, Gnd) according to the level of a binary modulation signal (mod).
2. Dispositif de modulation selon la revendication 1, comprenant plus d'un transistor à caisson (M2, M3), caractérisé en ce que les dits transistors sont réalisés dans un caisson de même type (P) .2. Modulation device according to claim 1, comprising more than one box transistor (M2, M3), characterized in that said transistors are produced in a box of the same type (P).
3. Dispositif de modulation selon la revendication 1 ou 2, caractérisé en ce que le ou les transistors sont des transistors d'un circuit redresseur (2) de tension, connecté entre les bornes (A, B) du circuit oscillant (1) et qui fournit en sortie les première et deuxième tensions d'alimentation (Vdd, Gnd).3. Modulation device according to claim 1 or 2, characterized in that the one or more transistors are transistors of a rectifier circuit (2) of voltage, connected between the terminals (A, B) of the oscillating circuit (1) and which outputs the first and second supply voltages (Vdd, Gnd).
4. Dispositif de modulation de charge selon l'une des revendications précédentes, caractérisé en ce que les moyens de polarisation (4) comprennent un inverseur connecté entre la première et la deuxième tension d'alimentation (Vdd, Gnd), dont l'entrée de commande (E) reçoit le signal logique de modulation (mod) , fourni par un étage de transmission de données (ED) du circuit intégré, et dont la sortie (S) est reliée à une connexion de polarisation (bkp) de caisson du ou des transistors .4. Load modulation device according to one of the preceding claims, characterized in that the biasing means (4) comprise an inverter connected between the first and the second supply voltage (Vdd, Gnd), the input of which control (E) receives the logic modulation signal (mod), supplied by a data transmission stage (ED) of the integrated circuit, and the output (S) of which is connected to a polarization connection (bkp) of the box of the transistor (s).
5. Dispositif de modulation selon la revendication 4, caractérisé en ce que l'inverseur comprend un premier transistor (T2) pour tirer la sortie (S) au niveau de la tension d'alimentation (Vdd) apte à bloquer la diode drain caisson ou source caisson et un deuxième transistor (Tl) pour tirer la sortie au niveau de l'autre tension d'alimentation (Gnd), apte à rendre passante la diode considérée, les dimensions du dit deuxième transistor étant fonction de l'indice de modulation recherché.5. Modulation device according to claim 4, characterized in that the inverter comprises a first transistor (T2) for pulling the output (S) at the supply voltage (Vdd) capable of blocking the box drain diode or box source and a second transistor (Tl) for drawing the output at the other supply voltage (Gnd), capable of making the diode considered passable, the dimensions of said second transistor being a function of the desired modulation index .
6. Dispositif de régénération selon la revendication 5, caractérisé en ce que les moyens de polarisation comprennent en outre un élément résistif (R ) connectée entre ledit deuxième transistor (Tl) et la tension d'alimentation associée (Gnd), la résistivite de cet élément étant fonction de l'indice de modulation recherché.6. regeneration device according to claim 5, characterized in that the biasing means further comprise a resistive element (R) connected between said second transistor (Tl) and the associated supply voltage (Gnd), the resistivity of this element being a function of the modulation index sought.
7. Circuit intégré télé-alimenté comprenant un dispositif de modulation de charge selon l'une quelconque des revendications précédentes.7. remotely powered integrated circuit comprising a load modulation device according to any one of the preceding claims.
8. Carte à puce ou étiquette électronique comprenant un circuit intégré selon la revendication 7.8. Chip card or electronic label comprising an integrated circuit according to claim 7.
9. Système électronique comprenant un lecteur assurant la télé-alimentation de cartes à puce ou d'étiquettes électroniques selon la revendication 8. 9. Electronic system comprising a reader ensuring the remote supply of smart cards or electronic labels according to claim 8.
EP01919611A 2000-04-05 2001-04-02 Device for modulating load in a self-powered integrated circuit Withdrawn EP1190376A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0004355A FR2807586B1 (en) 2000-04-05 2000-04-05 LOAD MODULATION DEVICE IN AN INTEGRATED TELE-POWERED CIRCUIT
FR0004355 2000-04-05
PCT/FR2001/000983 WO2001075784A1 (en) 2000-04-05 2001-04-02 Device for modulating load in a self-powered integrated circuit

Publications (1)

Publication Number Publication Date
EP1190376A1 true EP1190376A1 (en) 2002-03-27

Family

ID=8848902

Family Applications (1)

Application Number Title Priority Date Filing Date
EP01919611A Withdrawn EP1190376A1 (en) 2000-04-05 2001-04-02 Device for modulating load in a self-powered integrated circuit

Country Status (6)

Country Link
US (1) US6667914B2 (en)
EP (1) EP1190376A1 (en)
CN (1) CN1222908C (en)
AU (1) AU4667201A (en)
FR (1) FR2807586B1 (en)
WO (1) WO2001075784A1 (en)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4519713B2 (en) * 2004-06-17 2010-08-04 株式会社東芝 Rectifier circuit and wireless communication device using the same
CN100466443C (en) * 2004-06-17 2009-03-04 株式会社东芝 Rectifier circuit and radio communication device
JP4257377B2 (en) * 2006-10-27 2009-04-22 株式会社東芝 Trigger signal generator
US20100252631A1 (en) * 2009-04-01 2010-10-07 Infineon Technologies Ag High speed contactless communication
WO2011124251A1 (en) * 2010-04-06 2011-10-13 Widex A/S Monitoring device and a method for wireless data and power transmission in a monitoring device
JP5779162B2 (en) 2012-09-28 2015-09-16 株式会社東芝 Rectifier circuit and wireless communication device using the same
CN103679259B (en) * 2014-01-08 2016-08-17 卓捷创芯科技（深圳）有限公司 A kind of rectification amplitude limiter circuit with multiple time constant and passive RF label
CN103714378B (en) * 2014-01-08 2016-09-07 卓捷创芯科技（深圳）有限公司 The intelligent EMS of a kind of passive RF label and energy management method
JP6289974B2 (en) * 2014-03-31 2018-03-07 ルネサスエレクトロニクス株式会社 Semiconductor device
US10312743B2 (en) * 2015-05-26 2019-06-04 King Abdullah University Of Science And Technology RF-to-DC power converters for wireless powering

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
AT395224B (en) * 1990-08-23 1992-10-27 Mikron Ges Fuer Integrierte Mi CONTACTLESS, INDUCTIVE DATA TRANSFER SYSTEM
US5491456A (en) * 1994-12-08 1996-02-13 Texas Instruments Incorporated Oscillator compensated for improved frequency stability
DE69533507D1 (en) * 1995-06-30 2004-10-21 St Microelectronics Srl Electronically driven switch, integrated circuit using it and electronic card
US6529127B2 (en) * 1997-07-11 2003-03-04 Microstrain, Inc. System for remote powering and communication with a network of addressable, multichannel sensing modules
JP3554160B2 (en) * 1997-11-13 2004-08-18 ローム株式会社 Information communication equipment
EP1040447B1 (en) * 1997-12-23 2002-01-16 EM Microelectronic-Marin SA Active transponder switchable into passive transponder

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO0175784A1 *

Also Published As

Publication number Publication date
US20030021158A1 (en) 2003-01-30
FR2807586A1 (en) 2001-10-12
WO2001075784A1 (en) 2001-10-11
AU4667201A (en) 2001-10-15
FR2807586B1 (en) 2002-07-05
US6667914B2 (en) 2003-12-23
CN1383523A (en) 2002-12-04
CN1222908C (en) 2005-10-12

Similar Documents

Publication Publication Date Title
EP0846273B1 (en) Radiofrequency interface device for a transponder
EP0551038B1 (en) General protection of an IC against overloading and electrostatic discharges
EP2098981B1 (en) Wireless communication device
FR2867927A1 (en) DATA TRANSMISSION UNIT HAVING A DATA TRANSMISSION INTERFACE AND METHOD FOR OPERATING THE DATA TRANSMITTING UNIT
FR2547457A1 (en) CARD WITH INTEGRATED CIRCUIT MODULE
FR2683947A1 (en) LOW VOLTAGE LOW VOLTAGE MONOLITHIC PROTECTION DIODE.
FR2752076A1 (en) ELECTRICAL SUPPLY SYSTEM FOR MICROCIRCUIT WITH MIXED OPERATION, WITH OR WITHOUT CONTACT
EP1190376A1 (en) Device for modulating load in a self-powered integrated circuit
FR2783942A1 (en) Voltage control circuit for contactless smart card includes switch providing short circuit or isolation between input and output nodes according to level of regulated voltage
EP0788047B1 (en) Device for current reference in an integrated circuit
EP0750244B1 (en) Negative voltage generating charge pump circuit
EP2264880A2 (en) Automatically controlled synchronous rectifier
FR2739990A1 (en) INTEGRATED CIRCUIT DEVICE WITH DIODE CHARACTERISTIC
FR2678451A1 (en) Floating-well CMOS output drive circuit
EP3082072A1 (en) Receiving unit of an rfid tag
EP0022015A1 (en) Amplifier arrangement and method of amplification for audio frequencies
EP1986136B1 (en) Transponder circuit with unit with double clock extractor
FR2737065A1 (en) SEMICONDUCTOR DEVICE INCLUDING A POWER AMPLIFIER AND MOBILE TELECOMMUNICATION APPARATUS INCLUDING SUCH A SEMICONDUCTOR DEVICE
FR2853479A1 (en) Remote control device for e.g. object identification application, has portable object equipped with antenna coil that is coupled inductively to another antenna coil of fixed station and including load impedance modulation circuit
EP1103915B1 (en) Regulated power suppy for remotly powered electronic devices
FR2835119A1 (en) WIDE DYNAMIC DEMODULATOR FOR CONTACTLESS CHIP CARDS OR LABELS
EP0915562A2 (en) MOS transistor differential amplifier
FR2837996A1 (en) MOS TRANSISTOR VOLTAGE CONVERTER
EP0762259B1 (en) Bias circuit for setting the average level of an alternating voltage
FR2762727A1 (en) IC power amplifier for generating high voltage required to control CRT

Legal Events

Date Code Title Description
PUAI Public reference made under article 153(3) epc to a published international application that has entered the european phase

Free format text: ORIGINAL CODE: 0009012

AK Designated contracting states

Kind code of ref document: A1

Designated state(s): AT BE CH CY DE DK ES FI FR GB GR IE IT LI LU MC NL PT SE TR

AX Request for extension of the european patent

Free format text: AL;LT;LV;MK;RO;SI

17P Request for examination filed

Effective date: 20020321

RAP1 Party data changed (applicant data changed or rights of an application transferred)

Owner name: GEMALTO SA

Owner name: STMICROELECTRONICS S.A.

GRAP Despatch of communication of intention to grant a patent

Free format text: ORIGINAL CODE: EPIDOSNIGR1

STAA Information on the status of an ep patent application or granted ep patent

Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN

18D Application deemed to be withdrawn

Effective date: 20090616