DE69514783T2 - Leseschaltung für serielle dichotomische Abfühlung von mehrschichtigen nichtflüchtigen Speicherzellen - Google Patents

Leseschaltung für serielle dichotomische Abfühlung von mehrschichtigen nichtflüchtigen Speicherzellen

Info

Publication number
DE69514783T2
DE69514783T2 DE69514783T DE69514783T DE69514783T2 DE 69514783 T2 DE69514783 T2 DE 69514783T2 DE 69514783 T DE69514783 T DE 69514783T DE 69514783 T DE69514783 T DE 69514783T DE 69514783 T2 DE69514783 T2 DE 69514783T2
Authority
DE
Germany
Prior art keywords
dichotomous
sensing
serial
memory cells
volatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69514783T
Other languages
English (en)
Other versions
DE69514783D1 (de
Inventor
Cristiano Calligaro
Vincenzo Daniele
Roberto Gastaldi
Alessandro Manstretta
Nicola Telecco
Guido Torelli
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
STMicroelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics SRL filed Critical STMicroelectronics SRL
Application granted granted Critical
Publication of DE69514783D1 publication Critical patent/DE69514783D1/de
Publication of DE69514783T2 publication Critical patent/DE69514783T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/563—Multilevel memory reading aspects
    • G11C2211/5632—Multilevel reading using successive approximation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
DE69514783T 1995-03-23 1995-03-23 Leseschaltung für serielle dichotomische Abfühlung von mehrschichtigen nichtflüchtigen Speicherzellen Expired - Fee Related DE69514783T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP95830110A EP0734024B1 (de) 1995-03-23 1995-03-23 Leseschaltung für serielle dichotomische Abfühlung von mehrschichtigen nichtflüchtigen Speicherzellen

Publications (2)

Publication Number Publication Date
DE69514783D1 DE69514783D1 (de) 2000-03-02
DE69514783T2 true DE69514783T2 (de) 2000-06-08

Family

ID=8221877

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69514783T Expired - Fee Related DE69514783T2 (de) 1995-03-23 1995-03-23 Leseschaltung für serielle dichotomische Abfühlung von mehrschichtigen nichtflüchtigen Speicherzellen

Country Status (4)

Country Link
US (2) US5673221A (de)
EP (1) EP0734024B1 (de)
JP (1) JP2857649B2 (de)
DE (1) DE69514783T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0811986B1 (de) * 1996-06-05 2003-03-12 STMicroelectronics S.r.l. Seitenmodusspeicher mit Mehrpegelspeicherzellen
KR100226769B1 (ko) * 1996-11-19 1999-10-15 김영환 다중 비트 셀의 데이타 센싱장치 및 방법
US6307406B1 (en) 1998-09-25 2001-10-23 Lucent Technologies, Inc. Current comparator for current mode circuits
JP3366264B2 (ja) * 1998-09-28 2003-01-14 エヌイーシーマイクロシステム株式会社 不揮発性メモリ、メモリ検査方法
CA2277717C (en) 1999-07-12 2006-12-05 Mosaid Technologies Incorporated Circuit and method for multiple match detection in content addressable memories
US6856568B1 (en) 2000-04-25 2005-02-15 Multi Level Memory Technology Refresh operations that change address mappings in a non-volatile memory
US6396744B1 (en) 2000-04-25 2002-05-28 Multi Level Memory Technology Flash memory with dynamic refresh
US7079422B1 (en) 2000-04-25 2006-07-18 Samsung Electronics Co., Ltd. Periodic refresh operations for non-volatile multiple-bit-per-cell memory
US7123508B1 (en) 2002-03-18 2006-10-17 T-Ram, Inc. Reference cells for TCCT based memory cells
US6940772B1 (en) 2002-03-18 2005-09-06 T-Ram, Inc Reference cells for TCCT based memory cells
EP1416496A1 (de) * 2002-11-04 2004-05-06 Dialog Semiconductor GmbH Multibit RAM Speicheranordnung
DE10323012B4 (de) * 2003-05-21 2005-06-02 Austriamicrosystems Ag Programmierbare, integrierte Schaltungsanordnung und Verfahren zur Programmierung einer integrierten Schaltungsanordnung
JP4130634B2 (ja) * 2004-01-20 2008-08-06 松下電器産業株式会社 半導体装置
ITMI20042538A1 (it) * 2004-12-29 2005-03-29 Atmel Corp Metodo e sistema per la riduzione del soft-writing in una memoria flash a livelli multipli
US7196928B2 (en) * 2005-04-05 2007-03-27 Sandisk Corporation Compensating for coupling during read operations of non-volatile memory
US7196946B2 (en) * 2005-04-05 2007-03-27 Sandisk Corporation Compensating for coupling in non-volatile storage
US7187585B2 (en) * 2005-04-05 2007-03-06 Sandisk Corporation Read operation for non-volatile storage that includes compensation for coupling
US8077521B2 (en) 2006-03-16 2011-12-13 Freescale Semiconductor, Inc. Bitline current generator for a non-volatile memory array and a non-volatile memory array
WO2007104336A1 (en) 2006-03-16 2007-09-20 Freescale Semiconductor, Inc. A non-volatile memory device and programmable voltage reference for a non-volatile memory device
US7952937B2 (en) 2006-03-16 2011-05-31 Freescale Semiconductor, Inc. Wordline driver for a non-volatile memory device, a non-volatile memory device and method
ITTO20070109A1 (it) * 2007-02-14 2008-08-15 St Microelectronics Srl Circuito e metodo di lettura per un dispositivo di memoria non volatile basati sulla generazione adattativa di una grandezza elettrica di riferimento
US8255623B2 (en) * 2007-09-24 2012-08-28 Nvidia Corporation Ordered storage structure providing enhanced access to stored items

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6254896A (ja) * 1985-09-02 1987-03-10 Seiko Epson Corp 多値レベル読取り専用メモリ
US5012448A (en) * 1985-12-13 1991-04-30 Ricoh Company, Ltd. Sense amplifier for a ROM having a multilevel memory cell
JPS6342100A (ja) * 1986-08-08 1988-02-23 Fujitsu Ltd ３値レベルｒｏｍ
FR2630573B1 (fr) * 1988-04-26 1990-07-13 Sgs Thomson Microelectronics Memoire programmable electriquement avec plusieurs bits d'information par cellule
EP0724266B1 (de) * 1995-01-27 2001-12-12 STMicroelectronics S.r.l. Schnittweises Annäherungsverfahren zum Abtasten von nichtflüchtigen Mehrfachniveauspeicherzellen und dementsprechende Abtastschaltung

Also Published As

Publication number Publication date
JPH08339692A (ja) 1996-12-24
EP0734024B1 (de) 2000-01-26
EP0734024A1 (de) 1996-09-25
DE69514783D1 (de) 2000-03-02
US5673221A (en) 1997-09-30
USRE38166E1 (en) 2003-07-01
JP2857649B2 (ja) 1999-02-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee