DE69223824D1 - Direktzugriffspeicheranordnung mit "Flash"-Schreibmodus, durchgeführt für ausgewählte Speicherzellenmatrizen - Google Patents
Direktzugriffspeicheranordnung mit "Flash"-Schreibmodus, durchgeführt für ausgewählte SpeicherzellenmatrizenInfo
- Publication number
- DE69223824D1 DE69223824D1 DE69223824T DE69223824T DE69223824D1 DE 69223824 D1 DE69223824 D1 DE 69223824D1 DE 69223824 T DE69223824 T DE 69223824T DE 69223824 T DE69223824 T DE 69223824T DE 69223824 D1 DE69223824 D1 DE 69223824D1
- Authority
- DE
- Germany
- Prior art keywords
- flash
- random access
- cell arrays
- write mode
- mode random
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
- G11C7/1084—Data input buffers, e.g. comprising level conversion circuits, circuits for adapting load
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4091—Sense or sense/refresh amplifiers, or associated sense circuitry, e.g. for coupled bit-line precharging, equalising or isolating
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4096—Input/output [I/O] data management or control circuits, e.g. reading or writing circuits, I/O drivers or bit-line switches
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Databases & Information Systems (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3050501A JPH04268287A (ja) | 1991-02-22 | 1991-02-22 | 半導体メモリ回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69223824D1 true DE69223824D1 (de) | 1998-02-12 |
DE69223824T2 DE69223824T2 (de) | 1998-04-23 |
Family
ID=12860701
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69223824T Expired - Fee Related DE69223824T2 (de) | 1991-02-22 | 1992-02-20 | Direktzugriffspeicheranordnung mit "Flash"-Schreibmodus, durchgeführt für ausgewählte Speicherzellenmatrizen |
Country Status (5)
Country | Link |
---|---|
US (1) | US5285292A (de) |
EP (1) | EP0500097B1 (de) |
JP (1) | JPH04268287A (de) |
KR (1) | KR950008444B1 (de) |
DE (1) | DE69223824T2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5392241A (en) * | 1993-12-10 | 1995-02-21 | International Business Machines Corporation | Semiconductor memory circuit with block overwrite |
US5473765A (en) * | 1994-01-24 | 1995-12-05 | 3Com Corporation | Apparatus for using flash memory as a floppy disk emulator in a computer system |
US6711048B2 (en) * | 2001-04-25 | 2004-03-23 | Pien Chien | 2-port memory device |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4567578A (en) * | 1982-09-08 | 1986-01-28 | Harris Corporation | Cache memory flush scheme |
JPS62150590A (ja) * | 1985-12-25 | 1987-07-04 | Hitachi Ltd | ダイナミツク型ram |
US4873664A (en) * | 1987-02-12 | 1989-10-10 | Ramtron Corporation | Self restoring ferroelectric memory |
EP0293933B1 (de) * | 1987-06-04 | 1993-10-13 | Nec Corporation | Dynamische Speicherschaltung mit einem Abfühlschema |
JPH0770212B2 (ja) * | 1988-07-19 | 1995-07-31 | 日本電気株式会社 | 半導体メモリ回路 |
JPH0283892A (ja) * | 1988-09-20 | 1990-03-23 | Fujitsu Ltd | 半導体記憶装置 |
JPH0713877B2 (ja) * | 1988-10-19 | 1995-02-15 | 株式会社東芝 | 半導体メモリ |
GB8906354D0 (en) * | 1989-03-20 | 1989-05-04 | Inmos Ltd | Memory accessing |
JP3006014B2 (ja) * | 1990-02-13 | 2000-02-07 | 日本電気株式会社 | 半導体メモリ |
JP2669133B2 (ja) * | 1990-09-30 | 1997-10-27 | 日本電気株式会社 | 半導体記憶装置 |
-
1991
- 1991-02-22 JP JP3050501A patent/JPH04268287A/ja active Pending
-
1992
- 1992-02-20 DE DE69223824T patent/DE69223824T2/de not_active Expired - Fee Related
- 1992-02-20 EP EP92102835A patent/EP0500097B1/de not_active Expired - Lifetime
- 1992-02-20 KR KR1019920002534A patent/KR950008444B1/ko not_active IP Right Cessation
- 1992-02-21 US US07/838,841 patent/US5285292A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR920017110A (ko) | 1992-09-26 |
EP0500097A2 (de) | 1992-08-26 |
KR950008444B1 (ko) | 1995-07-31 |
EP0500097B1 (de) | 1998-01-07 |
JPH04268287A (ja) | 1992-09-24 |
US5285292A (en) | 1994-02-08 |
DE69223824T2 (de) | 1998-04-23 |
EP0500097A3 (de) | 1994-01-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC CORP., TOKIO/TOKYO, JP Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |