DE68925181D1 - Digitales Speichersystem - Google Patents
Digitales SpeichersystemInfo
- Publication number
- DE68925181D1 DE68925181D1 DE68925181T DE68925181T DE68925181D1 DE 68925181 D1 DE68925181 D1 DE 68925181D1 DE 68925181 T DE68925181 T DE 68925181T DE 68925181 T DE68925181 T DE 68925181T DE 68925181 D1 DE68925181 D1 DE 68925181D1
- Authority
- DE
- Germany
- Prior art keywords
- storage system
- digital storage
- digital
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
- G11C7/065—Differential amplifiers of latching type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
- G11C11/419—Read-write [R-W] circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/262,402 US4951252A (en) | 1988-10-25 | 1988-10-25 | Digital memory system |
Publications (2)
Publication Number | Publication Date |
---|---|
DE68925181D1 true DE68925181D1 (de) | 1996-02-01 |
DE68925181T2 DE68925181T2 (de) | 1996-05-02 |
Family
ID=22997345
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE68925181T Expired - Fee Related DE68925181T2 (de) | 1988-10-25 | 1989-10-17 | Digitales Speichersystem |
Country Status (4)
Country | Link |
---|---|
US (1) | US4951252A (de) |
EP (1) | EP0366332B1 (de) |
JP (1) | JP2752197B2 (de) |
DE (1) | DE68925181T2 (de) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0793033B2 (ja) * | 1989-08-24 | 1995-10-09 | 日本電気株式会社 | センスアンプ |
US5430677A (en) * | 1991-02-11 | 1995-07-04 | Intel Corporation | Architecture for reading information from a memory array |
US5285408A (en) * | 1992-09-15 | 1994-02-08 | Micron Semiconductor, Inc. | Method and apparatus for providing a faster ones voltage level restore operation in a dram |
DE69526336D1 (de) * | 1995-04-28 | 2002-05-16 | St Microelectronics Srl | Leseschaltung für Speicherzellen mit niedriger Versorgungsspannung |
JP3967493B2 (ja) * | 1999-06-18 | 2007-08-29 | 株式会社東芝 | 半導体記憶装置 |
US7110311B2 (en) * | 2004-06-15 | 2006-09-19 | Atmel Corporation | Sense amplifier for reduced sense delay in low power mode |
US7161861B2 (en) * | 2004-11-15 | 2007-01-09 | Infineon Technologies Ag | Sense amplifier bitline boost circuit |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2309616C2 (de) * | 1973-02-27 | 1982-11-11 | Ibm Deutschland Gmbh, 7000 Stuttgart | Halbleiterspeicherschaltung |
JPS58102389A (ja) * | 1981-12-12 | 1983-06-17 | Nippon Telegr & Teleph Corp <Ntt> | 記憶回路 |
JPS58179990A (ja) * | 1982-04-15 | 1983-10-21 | Toshiba Corp | センス増幅回路 |
JPH0632221B2 (ja) * | 1985-03-12 | 1994-04-27 | 富士通株式会社 | メモリ回路 |
US4665508A (en) * | 1985-05-23 | 1987-05-12 | Texas Instruments Incorporated | Gallium arsenide MESFET memory |
JP2559028B2 (ja) * | 1986-03-20 | 1996-11-27 | 富士通株式会社 | 半導体記憶装置 |
JPS62252597A (ja) * | 1986-04-24 | 1987-11-04 | Sony Corp | センスアンプ |
-
1988
- 1988-10-25 US US07/262,402 patent/US4951252A/en not_active Expired - Lifetime
-
1989
- 1989-10-17 DE DE68925181T patent/DE68925181T2/de not_active Expired - Fee Related
- 1989-10-17 EP EP89310644A patent/EP0366332B1/de not_active Expired - Lifetime
- 1989-10-24 JP JP27700289A patent/JP2752197B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
EP0366332B1 (de) | 1995-12-20 |
JP2752197B2 (ja) | 1998-05-18 |
EP0366332A3 (de) | 1992-03-18 |
EP0366332A2 (de) | 1990-05-02 |
JPH02244493A (ja) | 1990-09-28 |
DE68925181T2 (de) | 1996-05-02 |
US4951252A (en) | 1990-08-21 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |