DE60215090D1 - Verfahren und Vorrichtung zum Testen von Halbleiterwafern - Google Patents

Verfahren und Vorrichtung zum Testen von Halbleiterwafern

Info

Publication number
DE60215090D1
DE60215090D1 DE60215090T DE60215090T DE60215090D1 DE 60215090 D1 DE60215090 D1 DE 60215090D1 DE 60215090 T DE60215090 T DE 60215090T DE 60215090 T DE60215090 T DE 60215090T DE 60215090 D1 DE60215090 D1 DE 60215090D1
Authority
DE
Germany
Prior art keywords
location
semiconductor layer
base structure
sample chuck
semiconductor wafers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60215090T
Other languages
English (en)
Inventor
William J Alexander
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Solid State Measurements Inc
Original Assignee
Solid State Measurements Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Solid State Measurements Inc filed Critical Solid State Measurements Inc
Application granted granted Critical
Publication of DE60215090D1 publication Critical patent/DE60215090D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851—Testing of integrated circuits [IC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
DE60215090T 2001-08-22 2002-08-22 Verfahren und Vorrichtung zum Testen von Halbleiterwafern Expired - Lifetime DE60215090D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US31406501P 2001-08-22 2001-08-22
US10/215,383 US6851096B2 (en) 2001-08-22 2002-08-08 Method and apparatus for testing semiconductor wafers

Publications (1)

Publication Number Publication Date
DE60215090D1 true DE60215090D1 (de) 2006-11-16

Family

ID=26909979

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60215090T Expired - Lifetime DE60215090D1 (de) 2001-08-22 2002-08-22 Verfahren und Vorrichtung zum Testen von Halbleiterwafern

Country Status (6)

Country Link
US (1) US6851096B2 (de)
EP (1) EP1286389B1 (de)
JP (1) JP4163911B2 (de)
AT (1) ATE341834T1 (de)
DE (1) DE60215090D1 (de)
TW (1) TWI276190B (de)

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6445202B1 (en) 1999-06-30 2002-09-03 Cascade Microtech, Inc. Probe station thermal chuck with shielding for capacitive current
US6914423B2 (en) 2000-09-05 2005-07-05 Cascade Microtech, Inc. Probe station
US6965226B2 (en) 2000-09-05 2005-11-15 Cascade Microtech, Inc. Chuck for holding a device under test
US7492172B2 (en) 2003-05-23 2009-02-17 Cascade Microtech, Inc. Chuck for holding a device under test
JP4051418B2 (ja) * 2003-05-29 2008-02-27 Ｔｄｋ株式会社 磁気ヘッドのスメア検出方法及び装置
US7250626B2 (en) 2003-10-22 2007-07-31 Cascade Microtech, Inc. Probe testing structure
US7187188B2 (en) 2003-12-24 2007-03-06 Cascade Microtech, Inc. Chuck with integrated wafer support
US7656172B2 (en) 2005-01-31 2010-02-02 Cascade Microtech, Inc. System for testing semiconductors
US7535247B2 (en) 2005-01-31 2009-05-19 Cascade Microtech, Inc. Interface for testing semiconductors
JP2007059704A (ja) * 2005-08-25 2007-03-08 Sumco Corp 貼合せ基板の製造方法及び貼合せ基板
US7733106B2 (en) * 2005-09-19 2010-06-08 Formfactor, Inc. Apparatus and method of testing singulated dies
US7511510B2 (en) * 2005-11-30 2009-03-31 International Business Machines Corporation Nanoscale fault isolation and measurement system
KR100763532B1 (ko) * 2006-08-17 2007-10-05 삼성전자주식회사 웨이퍼 지지장치, 웨이퍼 노광 장치 및 웨이퍼 지지방법
US7999563B2 (en) 2008-06-24 2011-08-16 Cascade Microtech, Inc. Chuck for supporting and retaining a test substrate and a calibration substrate
US8319503B2 (en) 2008-11-24 2012-11-27 Cascade Microtech, Inc. Test apparatus for measuring a characteristic of a device under test
KR101520457B1 (ko) * 2009-02-12 2015-05-18 삼성전자주식회사 웨이퍼 검사 방법 및 웨이퍼 검사 장비
WO2010140642A1 (en) * 2009-06-02 2010-12-09 Tokyo Electron Limited Probe card
US8581217B2 (en) 2010-10-08 2013-11-12 Advanced Ion Beam Technology, Inc. Method for monitoring ion implantation
WO2012057991A2 (en) * 2010-10-29 2012-05-03 Applied Materials, Inc. Apparatus and method for testing back-contact solar cells
US9136243B2 (en) * 2013-12-03 2015-09-15 Kulicke And Soffa Industries, Inc. Systems and methods for determining and adjusting a level of parallelism related to bonding of semiconductor elements

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
BE759342A (fr) * 1969-11-24 1971-05-24 Westinghouse Electric Corp Appareil et methode pour la determination automatique de la resistance d'etalement, la resistivite et la concentration d'impuretes dans des corps semi-conducteurs
US4931962A (en) * 1988-05-13 1990-06-05 Ade Corporation Fixture and nonrepeatable error compensation system
DE69133413D1 (de) * 1990-05-07 2004-10-21 Canon Kk Substratträger des Vakuumtyps
US5798286A (en) * 1995-09-22 1998-08-25 Tessera, Inc. Connecting multiple microelectronic elements with lead deformation
US6057171A (en) * 1997-09-25 2000-05-02 Frequency Technology, Inc. Methods for determining on-chip interconnect process parameters
US6741093B2 (en) * 2000-10-19 2004-05-25 Solid State Measurements, Inc. Method of determining one or more properties of a semiconductor wafer
US6429145B1 (en) * 2001-01-26 2002-08-06 International Business Machines Corporation Method of determining electrical properties of silicon-on-insulator wafers

Also Published As

Publication number Publication date
US20030071631A1 (en) 2003-04-17
TWI276190B (en) 2007-03-11
EP1286389A3 (de) 2005-01-12
US6851096B2 (en) 2005-02-01
ATE341834T1 (de) 2006-10-15
EP1286389A2 (de) 2003-02-26
JP2003100822A (ja) 2003-04-04
JP4163911B2 (ja) 2008-10-08
EP1286389B1 (de) 2006-10-04

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Legal Events

Date Code Title Description
8332 No legal effect for de