DE60038996D1 - Herstellungsverfahren für Halbleiterbauelement mit isoliertem Gate - Google Patents

Herstellungsverfahren für Halbleiterbauelement mit isoliertem Gate

Info

Publication number
DE60038996D1
DE60038996D1 DE60038996T DE60038996T DE60038996D1 DE 60038996 D1 DE60038996 D1 DE 60038996D1 DE 60038996 T DE60038996 T DE 60038996T DE 60038996 T DE60038996 T DE 60038996T DE 60038996 D1 DE60038996 D1 DE 60038996D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
insulated gate
gate semiconductor
insulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60038996T
Other languages
English (en)
Inventor
Makoto Kitabatake
Masao Uchida
Kunimasa Takahashi
Takeshi Uenoyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Application granted granted Critical
Publication of DE60038996D1 publication Critical patent/DE60038996D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/049—Conductor-insulator-semiconductor electrodes, e.g. MIS contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
DE60038996T 1999-02-23 2000-02-22 Herstellungsverfahren für Halbleiterbauelement mit isoliertem Gate Expired - Lifetime DE60038996D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4437099 1999-02-23

Publications (1)

Publication Number Publication Date
DE60038996D1 true DE60038996D1 (de) 2008-07-10

Family

ID=12689639

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60038996T Expired - Lifetime DE60038996D1 (de) 1999-02-23 2000-02-22 Herstellungsverfahren für Halbleiterbauelement mit isoliertem Gate

Country Status (4)

Country Link
US (2) US6228720B1 (de)
EP (1) EP1032048B1 (de)
JP (1) JP2012089873A (de)
DE (1) DE60038996D1 (de)

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US6528373B2 (en) * 2001-02-12 2003-03-04 Cree, Inc. Layered dielectric on silicon carbide semiconductor structures
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US7012005B2 (en) * 2002-06-25 2006-03-14 Siliconix Incorporated Self-aligned differential oxidation in trenches by ion implantation
US7022378B2 (en) * 2002-08-30 2006-04-04 Cree, Inc. Nitrogen passivation of interface states in SiO2/SiC structures
US7221010B2 (en) 2002-12-20 2007-05-22 Cree, Inc. Vertical JFET limited silicon carbide power metal-oxide semiconductor field effect transistors
US6986972B1 (en) * 2003-02-04 2006-01-17 Lsi Logic Corporation Alternating aperture phase-shift mask fabrication method
JP4483179B2 (ja) * 2003-03-03 2010-06-16 株式会社デンソー 半導体装置の製造方法
US7074643B2 (en) * 2003-04-24 2006-07-11 Cree, Inc. Silicon carbide power devices with self-aligned source and well regions and methods of fabricating same
US6979863B2 (en) * 2003-04-24 2005-12-27 Cree, Inc. Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same
SE527205C2 (sv) * 2004-04-14 2006-01-17 Denso Corp Förfarande för tillverkning av halvledaranordning med kanal i halvledarsubstrat av kiselkarbid
US7176104B1 (en) * 2004-06-08 2007-02-13 Integrated Device Technology, Inc. Method for forming shallow trench isolation structure with deep oxide region
US7118970B2 (en) * 2004-06-22 2006-10-10 Cree, Inc. Methods of fabricating silicon carbide devices with hybrid well regions
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US20060261346A1 (en) * 2005-05-18 2006-11-23 Sei-Hyung Ryu High voltage silicon carbide devices having bi-directional blocking capabilities and methods of fabricating the same
US7391057B2 (en) * 2005-05-18 2008-06-24 Cree, Inc. High voltage silicon carbide devices having bi-directional blocking capabilities
US7615801B2 (en) * 2005-05-18 2009-11-10 Cree, Inc. High voltage silicon carbide devices having bi-directional blocking capabilities
US7414268B2 (en) 2005-05-18 2008-08-19 Cree, Inc. High voltage silicon carbide MOS-bipolar devices having bi-directional blocking capabilities
US7528040B2 (en) 2005-05-24 2009-05-05 Cree, Inc. Methods of fabricating silicon carbide devices having smooth channels
US7727904B2 (en) 2005-09-16 2010-06-01 Cree, Inc. Methods of forming SiC MOSFETs with high inversion layer mobility
JP5228291B2 (ja) * 2006-07-06 2013-07-03 日産自動車株式会社 半導体装置の製造方法
US8432012B2 (en) 2006-08-01 2013-04-30 Cree, Inc. Semiconductor devices including schottky diodes having overlapping doped regions and methods of fabricating same
US7728402B2 (en) * 2006-08-01 2010-06-01 Cree, Inc. Semiconductor devices including schottky diodes with controlled breakdown
EP2631951B1 (de) * 2006-08-17 2017-10-11 Cree, Inc. Bipolare Hochleistungstransistoren mit isoliertem Gatter
JP4046140B1 (ja) * 2006-11-29 2008-02-13 住友電気工業株式会社 炭化珪素半導体装置の製造方法
US8835987B2 (en) * 2007-02-27 2014-09-16 Cree, Inc. Insulated gate bipolar transistors including current suppressing layers
US8067776B2 (en) * 2007-06-08 2011-11-29 Nissan Motor Co., Ltd. Method of manufacturing semiconductor device and semiconductor device manufactured thereof
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US8188538B2 (en) 2008-12-25 2012-05-29 Rohm Co., Ltd. Semiconductor device and method of manufacturing semiconductor device
JP5588670B2 (ja) 2008-12-25 2014-09-10 ローム株式会社 半導体装置
US8288220B2 (en) * 2009-03-27 2012-10-16 Cree, Inc. Methods of forming semiconductor devices including epitaxial layers and related structures
US8735906B2 (en) 2009-04-13 2014-05-27 Rohm Co., Ltd. Semiconductor device and method of manufacturing semiconductor device
US8294507B2 (en) 2009-05-08 2012-10-23 Cree, Inc. Wide bandgap bipolar turn-off thyristor having non-negative temperature coefficient and related control circuits
US8193848B2 (en) 2009-06-02 2012-06-05 Cree, Inc. Power switching devices having controllable surge current capabilities
US8629509B2 (en) * 2009-06-02 2014-01-14 Cree, Inc. High voltage insulated gate bipolar transistors with minority carrier diverter
US8541787B2 (en) * 2009-07-15 2013-09-24 Cree, Inc. High breakdown voltage wide band-gap MOS-gated bipolar junction transistors with avalanche capability
US8354690B2 (en) 2009-08-31 2013-01-15 Cree, Inc. Solid-state pinch off thyristor circuits
JP2011134910A (ja) 2009-12-24 2011-07-07 Rohm Co Ltd ＳｉＣ電界効果トランジスタ
US9117739B2 (en) 2010-03-08 2015-08-25 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
US8415671B2 (en) 2010-04-16 2013-04-09 Cree, Inc. Wide band-gap MOSFETs having a heterojunction under gate trenches thereof and related methods of forming such devices
JP5395309B2 (ja) 2011-03-23 2014-01-22 パナソニック株式会社 半導体装置およびその製造方法
US9142662B2 (en) 2011-05-06 2015-09-22 Cree, Inc. Field effect transistor devices with low source resistance
US9029945B2 (en) 2011-05-06 2015-05-12 Cree, Inc. Field effect transistor devices with low source resistance
EP2725622B1 (de) 2011-06-27 2019-10-30 Panasonic Intellectual Property Management Co., Ltd. Siliziumcarbid-halbleiterelement und herstellungsverfahren dafür
US8563987B2 (en) 2011-06-28 2013-10-22 Panasonic Corporation Semiconductor device and method for fabricating the device
US9984894B2 (en) 2011-08-03 2018-05-29 Cree, Inc. Forming SiC MOSFETs with high channel mobility by treating the oxide interface with cesium ions
US9640617B2 (en) 2011-09-11 2017-05-02 Cree, Inc. High performance power module
WO2013036370A1 (en) 2011-09-11 2013-03-14 Cree, Inc. High current density power module comprising transistors with improved layout
US8618582B2 (en) 2011-09-11 2013-12-31 Cree, Inc. Edge termination structure employing recesses for edge termination elements
US8680587B2 (en) 2011-09-11 2014-03-25 Cree, Inc. Schottky diode
US9373617B2 (en) 2011-09-11 2016-06-21 Cree, Inc. High current, low switching loss SiC power module
US8664665B2 (en) 2011-09-11 2014-03-04 Cree, Inc. Schottky diode employing recesses for elements of junction barrier array
JP5209152B1 (ja) 2011-09-22 2013-06-12 パナソニック株式会社 炭化珪素半導体素子およびその製造方法
US11721547B2 (en) * 2013-03-14 2023-08-08 Infineon Technologies Ag Method for manufacturing a silicon carbide substrate for an electrical silicon carbide device, a silicon carbide substrate and an electrical silicon carbide device
JP2016164906A (ja) * 2015-03-06 2016-09-08 豊田合成株式会社 半導体装置およびその製造方法ならびに電力変換装置
US9935005B2 (en) * 2015-11-13 2018-04-03 Applied Materials, Inc. Techniques for filling a structure using selective surface modification
JP2018147984A (ja) * 2017-03-03 2018-09-20 株式会社東芝 半導体装置の製造方法及び製造装置
CN108155231B (zh) * 2017-12-22 2021-07-27 广东美的制冷设备有限公司 绝缘栅双极晶体管及其栅极制作方法、ipm模块及空调器
CN108766887B (zh) * 2018-05-25 2019-07-30 中国科学院微电子研究所 基于两步微波等离子体氧化的凹槽mosfet器件的制造方法
CN112864249A (zh) * 2021-01-11 2021-05-28 江苏东海半导体科技有限公司 低栅漏电荷的沟槽型功率半导体器件及其制备方法

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Also Published As

Publication number Publication date
US20010053561A1 (en) 2001-12-20
EP1032048A1 (de) 2000-08-30
EP1032048B1 (de) 2008-05-28
JP2012089873A (ja) 2012-05-10
US6228720B1 (en) 2001-05-08

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: PANASONIC CORP., KADOMA, OSAKA, JP

8364 No opposition during term of opposition