DE3889245D1 - Integrierter und kontrollierter Leistungs-MOSFET. - Google Patents
Integrierter und kontrollierter Leistungs-MOSFET.Info
- Publication number
- DE3889245D1 DE3889245D1 DE3889245T DE3889245T DE3889245D1 DE 3889245 D1 DE3889245 D1 DE 3889245D1 DE 3889245 T DE3889245 T DE 3889245T DE 3889245 T DE3889245 T DE 3889245T DE 3889245 D1 DE3889245 D1 DE 3889245D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated
- power mosfet
- controlled power
- controlled
- mosfet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
- H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
- H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
- H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62029553A JPS63198367A (ja) | 1987-02-13 | 1987-02-13 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3889245D1 true DE3889245D1 (de) | 1994-06-01 |
DE3889245T2 DE3889245T2 (de) | 1994-09-01 |
Family
ID=12279334
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE3889245T Expired - Lifetime DE3889245T2 (de) | 1987-02-13 | 1988-02-11 | Integrierter und kontrollierter Leistungs-MOSFET. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4879584A (de) |
EP (1) | EP0282734B1 (de) |
JP (1) | JPS63198367A (de) |
DE (1) | DE3889245T2 (de) |
Families Citing this family (57)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0618255B2 (ja) * | 1984-04-04 | 1994-03-09 | 株式会社東芝 | 半導体装置 |
JPS6473669A (en) * | 1987-09-14 | 1989-03-17 | Fujitsu Ltd | Semiconductor integrated circuit |
KR900001062B1 (ko) * | 1987-09-15 | 1990-02-26 | 강진구 | 반도체 바이 씨 모오스 장치의 제조방법 |
IT1217323B (it) * | 1987-12-22 | 1990-03-22 | Sgs Microelettronica Spa | Struttura integrata di transistor bipolare di potenza di alta tensione e di transistor mos di potenza di bassa tensione nella configurazione"emitter switching"e relativo processo di fabbricazione |
USRE35642E (en) * | 1987-12-22 | 1997-10-28 | Sgs-Thomson Microelectronics, S.R.L. | Integrated high-voltage bipolar power transistor and low voltage MOS power transistor structure in the emitter switching configuration and relative manufacturing process |
US5512774A (en) * | 1988-02-08 | 1996-04-30 | Kabushiki Kaisha Toshiba | Dielectrically isolated substrate and semiconductor device using the same |
US5332920A (en) * | 1988-02-08 | 1994-07-26 | Kabushiki Kaisha Toshiba | Dielectrically isolated high and low voltage substrate regions |
JPH0831473B2 (ja) * | 1988-05-20 | 1996-03-27 | 富士通株式会社 | 半導体装置 |
JPH02143454A (ja) * | 1988-11-25 | 1990-06-01 | Hitachi Ltd | 半導体デバイス |
US5416354A (en) * | 1989-01-06 | 1995-05-16 | Unitrode Corporation | Inverted epitaxial process semiconductor devices |
JP2737334B2 (ja) * | 1989-01-23 | 1998-04-08 | モトローラ・インコーポレーテッド | 電力集積回路用基板電力供給接点 |
US5181095A (en) * | 1989-02-10 | 1993-01-19 | Texas Instruments Incorporated | Complementary bipolar and MOS transistor having power and logic structures on the same integrated circuit substrate |
IT1228900B (it) * | 1989-02-27 | 1991-07-09 | Sgs Thomson Microelectronics | Struttura integrata monolitica per sistema di pilotaggio a due stadi con componente circuitale traslatore di livello del segnale di pilotaggio per transistori di potenza. |
EP0397014A3 (de) * | 1989-05-10 | 1991-02-06 | National Semiconductor Corporation | Aluminium-/Bor-dotierte P-Wanne |
US5212109A (en) * | 1989-05-24 | 1993-05-18 | Nissan Motor Co., Ltd. | Method for forming PN junction isolation regions by forming buried regions of doped polycrystalline or amorphous semiconductor |
US5128823A (en) * | 1989-06-14 | 1992-07-07 | Nippondenso Co., Ltd. | Power semiconductor apparatus |
US5218224A (en) * | 1989-06-14 | 1993-06-08 | Kabushiki Kaisha Toshiba | Semiconductor device including inversion preventing layers having a plurality of impurity concentration peaks in direction of depth |
US5070382A (en) * | 1989-08-18 | 1991-12-03 | Motorola, Inc. | Semiconductor structure for high power integrated circuits |
JP2835116B2 (ja) * | 1989-09-29 | 1998-12-14 | 株式会社東芝 | 電力用icおよびその製造方法 |
JPH0824146B2 (ja) * | 1989-10-19 | 1996-03-06 | 株式会社東芝 | Mos型集積回路 |
JP2572658B2 (ja) * | 1990-02-23 | 1997-01-16 | 日本モトローラ株式会社 | インテリジェントパワー半導体装置の製造方法 |
DE69131441T2 (de) * | 1990-04-13 | 1999-12-16 | Kabushiki Kaisha Toshiba, Kawasaki | Methode zur Verhinderung von einer Spannungsschwankung in einem Halbleiterbauelement |
IT1241050B (it) * | 1990-04-20 | 1993-12-29 | Cons Ric Microelettronica | Processo di formazione di una regione sepolta di drain o di collettore in dispositivi monolitici a semiconduttore. |
IT1244239B (it) * | 1990-05-31 | 1994-07-08 | Sgs Thomson Microelectronics | Terminazione dello stadio di potenza di un dispositivo monolitico a semicondutture e relativo processo di fabbricazione |
JP3190057B2 (ja) * | 1990-07-02 | 2001-07-16 | 株式会社東芝 | 複合集積回路装置 |
JP2965783B2 (ja) * | 1991-07-17 | 1999-10-18 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
EP0565807A1 (de) * | 1992-04-17 | 1993-10-20 | STMicroelectronics S.r.l. | MOS-Leistungstransistorbauelement |
KR0127282B1 (ko) * | 1992-05-18 | 1998-04-02 | 도요다 요시또시 | 반도체 장치 |
JP2773611B2 (ja) * | 1993-11-17 | 1998-07-09 | 株式会社デンソー | 絶縁物分離半導体装置 |
EP0709890B1 (de) * | 1994-10-27 | 1999-09-08 | Co.Ri.M.Me. Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | Treiberschaltung für elektronische Halbleiterbauelemente mit wenigstens einem Leistungstransistor |
US5495123A (en) * | 1994-10-31 | 1996-02-27 | Sgs-Thomson Microelectronics, Inc. | Structure to protect against below ground current injection |
US5834826A (en) * | 1997-05-08 | 1998-11-10 | Stmicroelectronics, Inc. | Protection against adverse parasitic effects in junction-isolated integrated circuits |
DE19805786A1 (de) * | 1998-02-12 | 1999-08-26 | Siemens Ag | Halbleiterbauelement mit Struktur zur Vermeidung von Querströmen |
US7644282B2 (en) | 1998-05-28 | 2010-01-05 | Verance Corporation | Pre-processed information embedding system |
US6912315B1 (en) | 1998-05-28 | 2005-06-28 | Verance Corporation | Pre-processed information embedding system |
DE69834321T2 (de) * | 1998-07-31 | 2006-09-14 | Freescale Semiconductor, Inc., Austin | Halbleiterstruktur für Treiberschaltkreise mit Pegelverschiebung |
EP0981163A1 (de) * | 1998-08-14 | 2000-02-23 | STMicroelectronics S.r.l. | Halbleiter-Leistungsbauelement mit isoliertem Schaltkreis und Herstellungsverfahren |
KR100281908B1 (ko) * | 1998-11-20 | 2001-02-15 | 김덕중 | 반도체소자 및 그 제조방법 |
US6204529B1 (en) * | 1999-08-27 | 2001-03-20 | Hsing Lan Lung | 8 bit per cell non-volatile semiconductor memory structure utilizing trench technology and dielectric floating gate |
US6737957B1 (en) | 2000-02-16 | 2004-05-18 | Verance Corporation | Remote control signaling using audio watermarks |
WO2004036352A2 (en) | 2002-10-15 | 2004-04-29 | Verance Corporation | Media monitoring, management and information system |
US20060239501A1 (en) | 2005-04-26 | 2006-10-26 | Verance Corporation | Security enhancements of digital watermarks for multi-media content |
US8020004B2 (en) | 2005-07-01 | 2011-09-13 | Verance Corporation | Forensic marking using a common customization function |
US7514754B2 (en) * | 2007-01-19 | 2009-04-07 | Episil Technologies Inc. | Complementary metal-oxide-semiconductor transistor for avoiding a latch-up problem |
US7700405B2 (en) * | 2007-02-28 | 2010-04-20 | Freescale Semiconductor, Inc. | Microelectronic assembly with improved isolation voltage performance and a method for forming the same |
FR2960097A1 (fr) * | 2010-05-11 | 2011-11-18 | St Microelectronics Tours Sas | Composant de protection bidirectionnel |
US8838977B2 (en) | 2010-09-16 | 2014-09-16 | Verance Corporation | Watermark extraction and content screening in a networked environment |
US8923548B2 (en) | 2011-11-03 | 2014-12-30 | Verance Corporation | Extraction of embedded watermarks from a host content using a plurality of tentative watermarks |
US9547753B2 (en) | 2011-12-13 | 2017-01-17 | Verance Corporation | Coordinated watermarking |
US9323902B2 (en) | 2011-12-13 | 2016-04-26 | Verance Corporation | Conditional access using embedded watermarks |
US9571606B2 (en) | 2012-08-31 | 2017-02-14 | Verance Corporation | Social media viewing system |
US9106964B2 (en) | 2012-09-13 | 2015-08-11 | Verance Corporation | Enhanced content distribution using advertisements |
US8869222B2 (en) | 2012-09-13 | 2014-10-21 | Verance Corporation | Second screen content |
WO2014153199A1 (en) | 2013-03-14 | 2014-09-25 | Verance Corporation | Transactional video marking system |
US9251549B2 (en) | 2013-07-23 | 2016-02-02 | Verance Corporation | Watermark extractor enhancements based on payload ranking |
US9208334B2 (en) | 2013-10-25 | 2015-12-08 | Verance Corporation | Content management using multiple abstraction layers |
WO2015138798A1 (en) | 2014-03-13 | 2015-09-17 | Verance Corporation | Interactive content acquisition using embedded codes |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4046605A (en) * | 1974-01-14 | 1977-09-06 | National Semiconductor Corporation | Method of electrically isolating individual semiconductor circuits in a wafer |
JPS5553462A (en) * | 1978-10-13 | 1980-04-18 | Int Rectifier Corp | Mosfet element |
US4546370A (en) * | 1979-02-15 | 1985-10-08 | Texas Instruments Incorporated | Monolithic integration of logic, control and high voltage interface circuitry |
JPS5742164A (en) * | 1980-08-27 | 1982-03-09 | Hitachi Ltd | Semiconductor device |
JPS58206153A (ja) * | 1982-05-27 | 1983-12-01 | Seiko Instr & Electronics Ltd | 半導体集積回路 |
JPS5947757A (ja) * | 1982-09-10 | 1984-03-17 | Hitachi Ltd | 半導体集積回路装置とその製造法 |
US4609413A (en) * | 1983-11-18 | 1986-09-02 | Motorola, Inc. | Method for manufacturing and epitaxially isolated semiconductor utilizing etch and refill technique |
-
1987
- 1987-02-13 JP JP62029553A patent/JPS63198367A/ja active Granted
-
1988
- 1988-02-10 US US07/154,275 patent/US4879584A/en not_active Ceased
- 1988-02-11 DE DE3889245T patent/DE3889245T2/de not_active Expired - Lifetime
- 1988-02-11 EP EP88101996A patent/EP0282734B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0282734A1 (de) | 1988-09-21 |
EP0282734B1 (de) | 1994-04-27 |
DE3889245T2 (de) | 1994-09-01 |
JPS63198367A (ja) | 1988-08-17 |
US4879584A (en) | 1989-11-07 |
JPH0365025B2 (de) | 1991-10-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) |