US5133062A
(en)
*
|
1986-03-06 |
1992-07-21 |
Advanced Micro Devices, Inc. |
RAM buffer controller for providing simulated first-in-first-out (FIFO) buffers in a random access memory
|
US5093807A
(en)
*
|
1987-12-23 |
1992-03-03 |
Texas Instruments Incorporated |
Video frame storage system
|
US5129090A
(en)
*
|
1988-05-26 |
1992-07-07 |
Ibm Corporation |
System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration
|
US5125083A
(en)
*
|
1989-02-03 |
1992-06-23 |
Digital Equipment Corporation |
Method and apparatus for resolving a variable number of potential memory access conflicts in a pipelined computer system
|
EP0425990B1
(de)
*
|
1989-10-23 |
1998-07-22 |
Mitsubishi Denki Kabushiki Kaisha |
Zellenvermittlungseinrichtung
|
US5056010A
(en)
*
|
1989-10-30 |
1991-10-08 |
Industrial Technology Research Institute |
Pointer based DMA controller
|
JP2997005B2
(ja)
*
|
1990-04-12 |
2000-01-11 |
キヤノン株式会社 |
出力装置
|
IL96808A
(en)
|
1990-04-18 |
1996-03-31 |
Rambus Inc |
Introductory / Origin Circuit Agreed Using High-Performance Brokerage
|
US6751696B2
(en)
|
1990-04-18 |
2004-06-15 |
Rambus Inc. |
Memory device having a programmable register
|
US6324120B2
(en)
|
1990-04-18 |
2001-11-27 |
Rambus Inc. |
Memory device having a variable data output length
|
EP0453863A2
(de)
*
|
1990-04-27 |
1991-10-30 |
National Semiconductor Corporation |
Verfahren und Gerät zur Ausführung einer Mediumzugriffssteuerung/Wirtsystemschnittstelle
|
JPH0619759B2
(ja)
*
|
1990-05-21 |
1994-03-16 |
富士ゼロックス株式会社 |
マルチプロセッサシステムにおける相互通信方法
|
CA2045756C
(en)
*
|
1990-06-29 |
1996-08-20 |
Gregg Bouchard |
Combined queue for invalidates and return data in multiprocessor system
|
US5265229A
(en)
*
|
1990-07-02 |
1993-11-23 |
Digital Equipment Corporation |
Single load, multiple issue queue with error recovery capability
|
GB9019026D0
(en)
*
|
1990-08-31 |
1990-10-17 |
Ncr Co |
Work station including a direct memory access controller
|
GB9019001D0
(en)
*
|
1990-08-31 |
1990-10-17 |
Ncr Co |
Work station including a direct memory access controller and interfacing means to microchannel means
|
JPH0810445B2
(ja)
*
|
1990-09-21 |
1996-01-31 |
インターナショナル・ビジネス・マシーンズ・コーポレイション |
動的バス調停方法及び装置
|
US5742761A
(en)
*
|
1991-03-29 |
1998-04-21 |
International Business Machines Corporation |
Apparatus for adapting message protocols for a switch network and a bus
|
US5495474A
(en)
*
|
1991-03-29 |
1996-02-27 |
International Business Machines Corp. |
Switch-based microchannel planar apparatus
|
JP3180362B2
(ja)
*
|
1991-04-04 |
2001-06-25 |
日本電気株式会社 |
情報処理装置
|
JP2703417B2
(ja)
*
|
1991-04-05 |
1998-01-26 |
富士通株式会社 |
受信バッファ
|
JP2671699B2
(ja)
*
|
1991-11-15 |
1997-10-29 |
三菱電機株式会社 |
セル交換装置
|
US5398235A
(en)
*
|
1991-11-15 |
1995-03-14 |
Mitsubishi Denki Kabushiki Kaisha |
Cell exchanging apparatus
|
JP2728155B2
(ja)
*
|
1991-12-19 |
1998-03-18 |
三菱電機株式会社 |
通信制御装置
|
US5448714A
(en)
*
|
1992-01-02 |
1995-09-05 |
Integrated Device Technology, Inc. |
Sequential-access and random-access dual-port memory buffer
|
US5444853A
(en)
*
|
1992-03-31 |
1995-08-22 |
Seiko Epson Corporation |
System and method for transferring data between a plurality of virtual FIFO's and a peripheral via a hardware FIFO and selectively updating control information associated with the virtual FIFO's
|
US5289577A
(en)
*
|
1992-06-04 |
1994-02-22 |
International Business Machines Incorporated |
Process-pipeline architecture for image/video processing
|
US5450599A
(en)
*
|
1992-06-04 |
1995-09-12 |
International Business Machines Corporation |
Sequential pipelined processing for the compression and decompression of image data
|
US6263374B1
(en)
|
1992-09-17 |
2001-07-17 |
International Business Machines Corporation |
Apparatus for coupling a bus-based architecture to a switch network
|
DE69433229T2
(de)
*
|
1993-02-15 |
2004-08-12 |
Mitsubishi Denki K.K. |
ATM-Schalter
|
US5619646A
(en)
*
|
1994-09-27 |
1997-04-08 |
International Business Machines Corporation |
Method and system for dynamically appending a data block to a variable length transmit list while transmitting another data block over a serial bus
|
US6374313B1
(en)
*
|
1994-09-30 |
2002-04-16 |
Cirrus Logic, Inc. |
FIFO and method of operating same which inhibits output transitions when the last cell is read or when the FIFO is erased
|
KR960035283A
(ko)
*
|
1995-03-23 |
1996-10-24 |
김주용 |
이중 채널 선입 선출 회로
|
US5765200A
(en)
*
|
1995-06-07 |
1998-06-09 |
International Business Machines Corporation |
Logical positioning within a storage device by a storage controller
|
JP3486498B2
(ja)
|
1996-01-10 |
2004-01-13 |
キヤノン株式会社 |
バッファ管理方法及びそれを用いた印刷装置
|
US5949440A
(en)
*
|
1996-04-30 |
1999-09-07 |
Hewlett Packard Compnay |
Method and apparatus for processing graphics primitives in multiple modes using reconfigurable hardware
|
US6003098A
(en)
*
|
1996-04-30 |
1999-12-14 |
Hewlett-Packard Company |
Graphic accelerator architecture using two graphics processing units for processing aspects of pre-rasterized graphics primitives and a control circuitry for relaying pass-through information
|
US5819113A
(en)
*
|
1996-06-06 |
1998-10-06 |
Advanced Micro Devices, Inc. |
Method of identifying end of pocket by writing the address of last data into the first location of the memory
|
JP3175620B2
(ja)
*
|
1996-06-21 |
2001-06-11 |
セイコーエプソン株式会社 |
印刷装置
|
US5963716A
(en)
*
|
1996-12-02 |
1999-10-05 |
Hewlett-Packard Company |
Bi-directional data stream decompression
|
KR100194634B1
(ko)
*
|
1996-12-11 |
1999-06-15 |
이계철 |
선입선출에서 읽기-쓰기 포인터의 오류검출 및 자동복구장치
|
US5909704A
(en)
*
|
1997-01-09 |
1999-06-01 |
Raytheon Company |
High speed address generator
|
US6230245B1
(en)
|
1997-02-11 |
2001-05-08 |
Micron Technology, Inc. |
Method and apparatus for generating a variable sequence of memory device command signals
|
US6175894B1
(en)
*
|
1997-03-05 |
2001-01-16 |
Micron Technology, Inc. |
Memory device command buffer apparatus and method and memory devices and computer systems using same
|
US6359899B1
(en)
*
|
1997-05-28 |
2002-03-19 |
Lucent Technologies Inc. |
Priority access for real-time traffic in contention-based networks
|
US5996043A
(en)
|
1997-06-13 |
1999-11-30 |
Micron Technology, Inc. |
Two step memory device command buffer apparatus and method and memory devices and computer systems using same
|
US6484244B1
(en)
|
1997-06-17 |
2002-11-19 |
Micron Technology, Inc. |
Method and system for storing and processing multiple memory commands
|
GB2331896B
(en)
*
|
1997-11-27 |
2000-03-29 |
Connell Anne O |
Last-in first out data stacks and processing data using such data stacks
|
US6202119B1
(en)
|
1997-12-19 |
2001-03-13 |
Micron Technology, Inc. |
Method and system for processing pipelined memory commands
|
US6175905B1
(en)
|
1998-07-30 |
2001-01-16 |
Micron Technology, Inc. |
Method and system for bypassing pipelines in a pipelined memory command generator
|
US6430666B1
(en)
*
|
1998-08-24 |
2002-08-06 |
Motorola, Inc. |
Linked list memory and method therefor
|
US6178488B1
(en)
|
1998-08-27 |
2001-01-23 |
Micron Technology, Inc. |
Method and apparatus for processing pipelined memory commands
|
US6154796A
(en)
*
|
1998-09-03 |
2000-11-28 |
Advanced Micro Devices, Inc. |
Apparatus and method in a network interface device for storing receiving frame status in a holding register
|
JP3765931B2
(ja)
*
|
1998-10-15 |
2006-04-12 |
富士通株式会社 |
バッファ制御方法及びバッファ制御装置
|
US6304936B1
(en)
*
|
1998-10-30 |
2001-10-16 |
Hewlett-Packard Company |
One-to-many bus bridge using independently and simultaneously selectable logical FIFOS
|
US6269413B1
(en)
*
|
1998-10-30 |
2001-07-31 |
Hewlett Packard Company |
System with multiple dynamically-sized logical FIFOs sharing single memory and with read/write pointers independently selectable and simultaneously responsive to respective read/write FIFO selections
|
US6381659B2
(en)
*
|
1999-01-19 |
2002-04-30 |
Maxtor Corporation |
Method and circuit for controlling a first-in-first-out (FIFO) buffer using a bank of FIFO address registers capturing and saving beginning and ending write-pointer addresses
|
US6735207B1
(en)
*
|
2000-06-13 |
2004-05-11 |
Cisco Technology, Inc. |
Apparatus and method for reducing queuing memory access cycles using a distributed queue structure
|
DE10050980A1
(de)
*
|
2000-10-13 |
2002-05-02 |
Systemonic Ag |
Speicherkonfiguration mit I/O-Unterstützung
|
JP2008135047A
(ja)
*
|
2000-11-06 |
2008-06-12 |
Matsushita Electric Ind Co Ltd |
マルチプロセッサ用インタフェース
|
GB2382899B
(en)
|
2000-12-29 |
2003-12-17 |
Zarlink Semiconductor Ltd |
A data queue system
|
GB0031761D0
(en)
*
|
2000-12-29 |
2001-02-07 |
Mitel Semiconductor Ltd |
Data queues
|
DE10108922B4
(de)
*
|
2001-02-23 |
2013-01-31 |
Rohde & Schwarz Gmbh & Co. Kg |
Elektronische Speicheranordnung
|
US6952756B1
(en)
*
|
2001-05-08 |
2005-10-04 |
Lewiz Communications |
Method and apparatus for speculative loading of a memory
|
US7194088B2
(en)
*
|
2001-06-08 |
2007-03-20 |
Corrent Corporation |
Method and system for a full-adder post processor for modulo arithmetic
|
US7646782B1
(en)
*
|
2001-07-30 |
2010-01-12 |
Primrose Donald R |
Data link/physical layer packet buffering and flushing
|
US6941393B2
(en)
*
|
2002-03-05 |
2005-09-06 |
Agilent Technologies, Inc. |
Pushback FIFO
|
US6996657B1
(en)
*
|
2002-03-21 |
2006-02-07 |
Advanced Micro Devices, Inc. |
Apparatus for providing packets in a peripheral interface circuit of an I/O node of a computer system
|
US7293132B2
(en)
*
|
2003-10-08 |
2007-11-06 |
Samsung Electronics Co., Ltd. |
Apparatus and method for efficient data storage using a FIFO memory
|
JP2014026388A
(ja)
*
|
2012-07-25 |
2014-02-06 |
Toshiba Corp |
記憶装置、コントローラ、および書き込み制御方法
|
US9385032B2
(en)
|
2013-03-15 |
2016-07-05 |
Gsi Technology, Inc. |
Systems and methods involving data bus inversion memory circuitry, configuration and/or operation
|
WO2014146012A2
(en)
|
2013-03-15 |
2014-09-18 |
Gsi Technology, Inc. |
Systems and methods involving data bus inversion memory circuitry, configuration and /or operation including data signals grouped into 10 bits and/or other features
|
US11003616B1
(en)
*
|
2017-06-27 |
2021-05-11 |
Amazon Technologies, Inc |
Data transfer using point-to-point interconnect
|