DE3278182D1 - Method for manufacturing a mask type read only memory - Google Patents

Method for manufacturing a mask type read only memory

Info

Publication number
DE3278182D1
DE3278182D1 DE8282304312T DE3278182T DE3278182D1 DE 3278182 D1 DE3278182 D1 DE 3278182D1 DE 8282304312 T DE8282304312 T DE 8282304312T DE 3278182 T DE3278182 T DE 3278182T DE 3278182 D1 DE3278182 D1 DE 3278182D1
Authority
DE
Germany
Prior art keywords
memory
manufacturing
mask type
type read
read
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8282304312T
Other languages
English (en)
Inventor
Yoshihisa Shiotari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=14985006&utm_source=***_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=DE3278182(D1) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3278182D1 publication Critical patent/DE3278182D1/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H01L21/2652—Through-implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/27—ROM only
    • H10B20/30—ROM only having the source region and the drain region on the same level, e.g. lateral transistors
    • H10B20/38—Doping programmed, e.g. mask ROM
    • H10B20/383—Channel doping programmed

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
DE8282304312T 1981-08-17 1982-08-16 Method for manufacturing a mask type read only memory Expired DE3278182D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56128450A JPS5830154A (ja) 1981-08-17 1981-08-17 固定記憶半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
DE3278182D1 true DE3278182D1 (en) 1988-04-07

Family

ID=14985006

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8282304312T Expired DE3278182D1 (en) 1981-08-17 1982-08-16 Method for manufacturing a mask type read only memory

Country Status (4)

Country Link
US (1) US4467520A (de)
EP (1) EP0073130B2 (de)
JP (1) JPS5830154A (de)
DE (1) DE3278182D1 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4536944A (en) * 1982-12-29 1985-08-27 International Business Machines Corporation Method of making ROM/PLA semiconductor device by late stage personalization
US4513494A (en) * 1983-07-19 1985-04-30 American Microsystems, Incorporated Late mask process for programming read only memories
JPS60174682A (ja) * 1984-02-20 1985-09-07 Tsukahara Kogyo Kk 弾力性を有する多孔性印材の製造方法
JPS61287164A (ja) * 1985-06-13 1986-12-17 Ricoh Co Ltd 半導体メモリ装置
JPH06104358B2 (ja) * 1985-06-24 1994-12-21 塚原工業株式会社 インキ吸蔵型印判材の製造方法
JPS6292362A (ja) * 1985-10-17 1987-04-27 Toshiba Corp 半導体装置の製造方法
JP2723147B2 (ja) * 1986-06-25 1998-03-09 株式会社日立製作所 半導体集積回路装置の製造方法
JPS6381948A (ja) * 1986-09-26 1988-04-12 Toshiba Corp 多層配線半導体装置
US5019878A (en) * 1989-03-31 1991-05-28 Texas Instruments Incorporated Programmable interconnect or cell using silicided MOS transistors
US5068696A (en) * 1989-03-31 1991-11-26 Texas Instruments Incorporated Programmable interconnect or cell using silicided MOS transistors
US5091328A (en) * 1989-11-21 1992-02-25 National Semiconductor Corporation Method of late programming MOS devices
IT1239989B (it) * 1990-03-30 1993-11-27 Sgs Thomson Microelectronics Struttura di cella programmata,a bassa capacita' e ad elevata tensione di rottura, per circuiti di memoria a sola lettura
US5486487A (en) * 1990-03-30 1996-01-23 Sgs-Thomson Microelectronics S.R.L. Method for adjusting the threshold of a read-only memory to achieve low capacitance and high breakdown voltage
JPH0487370A (ja) * 1990-07-30 1992-03-19 Sharp Corp 半導体装置の製造方法
US5200355A (en) * 1990-12-10 1993-04-06 Samsung Electronics Co., Ltd. Method for manufacturing a mask read only memory device
JP2604071B2 (ja) * 1991-05-14 1997-04-23 株式会社東芝 半導体装置の製造方法
US5432103A (en) * 1992-06-22 1995-07-11 National Semiconductor Corporation Method of making semiconductor ROM cell programmed using source mask
KR0140691B1 (ko) * 1992-08-20 1998-06-01 문정환 반도체 장치의 마스크롬 제조방법
JP3177036B2 (ja) * 1992-12-24 2001-06-18 三菱鉛筆株式会社 連続気泡を有するスポンジゴム印字体の製造方法
US5592012A (en) * 1993-04-06 1997-01-07 Sharp Kabushiki Kaisha Multivalued semiconductor read only storage device and method of driving the device and method of manufacturing the device
US5429974A (en) * 1993-10-22 1995-07-04 United Microelectronics Corporation Post passivation mask ROM programming method
US5514609A (en) * 1994-05-13 1996-05-07 Mosel Vitelic, Inc. Through glass ROM code implant to reduce product delivering time
US5796149A (en) * 1994-09-09 1998-08-18 Nippon Steel Corporation Semiconductor memory using different concentration impurity diffused layers
US5514610A (en) * 1995-03-17 1996-05-07 Taiwan Semiconductor Manufacturing Company Method of making an optimized code ion implantation procedure for read only memory devices
GB2300983A (en) * 1995-05-13 1996-11-20 Holtek Microelectronics Inc Flexible CMOS IC layout method
US5693551A (en) * 1995-09-19 1997-12-02 United Microelectronics, Corporation Method for fabricating a tri-state read-only memory device
IT1288720B1 (it) * 1996-10-01 1998-09-24 Skf Ind Spa Mozzo o gruppo mozzo ruota che permette un migliore montaggio e smontaggio di un organo frenante.
IT1289781B1 (it) * 1996-12-20 1998-10-16 Skf Ind Spa Unita' mozzo-ruota, in particolare per un autoveicolo.
US6238983B1 (en) * 1999-08-30 2001-05-29 Taiwan Semiconductor Manufacturing Company Alignment dip back oxide and code implant through poly to approach the depletion mode device character

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3914855A (en) * 1974-05-09 1975-10-28 Bell Telephone Labor Inc Methods for making MOS read-only memories
JPS5851427B2 (ja) * 1975-09-04 1983-11-16 株式会社日立製作所 絶縁ゲ−ト型リ−ド・オンリ−・メモリの製造方法
JPS5333076A (en) * 1976-09-09 1978-03-28 Toshiba Corp Production of mos type integrated circuit
JPS5375781U (de) * 1976-11-29 1978-06-24
US4108686A (en) * 1977-07-22 1978-08-22 Rca Corp. Method of making an insulated gate field effect transistor by implanted double counterdoping
US4384399A (en) * 1978-03-20 1983-05-24 Texas Instruments Incorporated Method of making a metal programmable MOS read only memory device
DE2909197A1 (de) * 1978-03-20 1979-10-04 Texas Instruments Inc Verfahren zur herstellung eines festspeichers und festspeichermatrix
US4364167A (en) * 1979-11-28 1982-12-21 General Motors Corporation Programming an IGFET read-only-memory
US4336647A (en) * 1979-12-21 1982-06-29 Texas Instruments Incorporated Method of making implant programmable N-channel read only memory
US4356042A (en) * 1980-11-07 1982-10-26 Mostek Corporation Method for fabricating a semiconductor read only memory
US4406049A (en) * 1980-12-11 1983-09-27 Rockwell International Corporation Very high density cells comprising a ROM and method of manufacturing same
US4380866A (en) * 1981-05-04 1983-04-26 Motorola, Inc. Method of programming ROM by offset masking of selected gates
US4365405A (en) * 1981-05-28 1982-12-28 General Motors Corporation Method of late programming read only memory devices
US4364165A (en) * 1981-05-28 1982-12-21 General Motors Corporation Late programming using a silicon nitride interlayer

Also Published As

Publication number Publication date
JPS5830154A (ja) 1983-02-22
US4467520A (en) 1984-08-28
EP0073130A2 (de) 1983-03-02
EP0073130B1 (de) 1988-03-02
EP0073130A3 (en) 1985-01-16
JPH0328832B2 (de) 1991-04-22
EP0073130B2 (de) 1993-05-12

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Legal Events

Date Code Title Description
8363 Opposition against the patent
8366 Restricted maintained after opposition proceedings
8339 Ceased/non-payment of the annual fee