DE3175508D1 - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- DE3175508D1 DE3175508D1 DE8181100131T DE3175508T DE3175508D1 DE 3175508 D1 DE3175508 D1 DE 3175508D1 DE 8181100131 T DE8181100131 T DE 8181100131T DE 3175508 T DE3175508 T DE 3175508T DE 3175508 D1 DE3175508 D1 DE 3175508D1
- Authority
- DE
- Germany
- Prior art keywords
- memory device
- semiconductor memory
- semiconductor
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
- G11C11/4125—Cells incorporating circuit means for protecting against loss of information
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/005—Circuit means for protection against loss of information of semiconductor storage devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
- G11C5/025—Geometric lay-out considerations of storage- and peripheral-blocks in a semiconductor storage device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
- H01L23/556—Protection against radiation, e.g. light or electromagnetic waves against alpha rays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Ceramic Engineering (AREA)
- Health & Medical Sciences (AREA)
- Electromagnetism (AREA)
- Toxicology (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP287180A JPS56100463A (en) | 1980-01-14 | 1980-01-14 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3175508D1 true DE3175508D1 (en) | 1986-11-27 |
Family
ID=11541408
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8181100131T Expired DE3175508D1 (en) | 1980-01-14 | 1981-01-09 | Semiconductor memory device |
Country Status (4)
Country | Link |
---|---|
US (1) | US4604639A (de) |
EP (1) | EP0032695B1 (de) |
JP (1) | JPS56100463A (de) |
DE (1) | DE3175508D1 (de) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0087979B1 (de) * | 1982-03-03 | 1989-09-06 | Fujitsu Limited | Halbleiter-Speichervorrichtung |
US4621345A (en) * | 1984-12-17 | 1986-11-04 | International Business Machines Corporation | Soft error protection circuit for a storage cell |
JPS62150879A (ja) * | 1985-12-25 | 1987-07-04 | Mitsubishi Electric Corp | 半導体記憶装置 |
JPH0766659B2 (ja) * | 1986-01-30 | 1995-07-19 | 三菱電機株式会社 | 半導体記憶装置 |
US4884238A (en) * | 1988-03-09 | 1989-11-28 | Honeywell Inc. | Read-only memory |
US4852060A (en) * | 1988-03-31 | 1989-07-25 | International Business Machines Corporation | Soft error resistant data storage cells |
US4866498A (en) * | 1988-04-20 | 1989-09-12 | The United States Department Of Energy | Integrated circuit with dissipative layer for photogenerated carriers |
US5087951A (en) * | 1988-05-02 | 1992-02-11 | Micron Technology | Semiconductor memory device transistor and cell structure |
US5266821A (en) * | 1988-05-31 | 1993-11-30 | Micron Technology, Inc. | Chip decoupling capacitor |
US6124625A (en) | 1988-05-31 | 2000-09-26 | Micron Technology, Inc. | Chip decoupling capacitor |
US5687109A (en) | 1988-05-31 | 1997-11-11 | Micron Technology, Inc. | Integrated circuit module having on-chip surge capacitors |
US5032892A (en) * | 1988-05-31 | 1991-07-16 | Micron Technology, Inc. | Depletion mode chip decoupling capacitor |
JP2927463B2 (ja) * | 1989-09-28 | 1999-07-28 | 株式会社日立製作所 | 半導体記憶装置 |
US5691652A (en) * | 1996-02-20 | 1997-11-25 | Hewlett-Packard Co. | Completion detection as a means for improving alpha soft-error resistance |
JPH11274424A (ja) * | 1998-03-23 | 1999-10-08 | Matsushita Electric Ind Co Ltd | 半導体装置 |
US6114756A (en) | 1998-04-01 | 2000-09-05 | Micron Technology, Inc. | Interdigitated capacitor design for integrated circuit leadframes |
US6414391B1 (en) * | 1998-06-30 | 2002-07-02 | Micron Technology, Inc. | Module assembly for stacked BGA packages with a common bus bar in the assembly |
US6755700B2 (en) * | 2002-11-12 | 2004-06-29 | Modevation Enterprises Inc. | Reset speed control for watercraft |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3387286A (en) * | 1967-07-14 | 1968-06-04 | Ibm | Field-effect transistor memory |
US3893146A (en) * | 1973-12-26 | 1975-07-01 | Teletype Corp | Semiconductor capacitor structure and memory cell, and method of making |
US4012757A (en) * | 1975-05-05 | 1977-03-15 | Intel Corporation | Contactless random-access memory cell and cell pair |
JPS5853512B2 (ja) * | 1976-02-13 | 1983-11-29 | 株式会社東芝 | 半導体記憶装置の製造方法 |
US4112575A (en) * | 1976-12-20 | 1978-09-12 | Texas Instruments Incorporated | Fabrication methods for the high capacity ram cell |
US4240097A (en) * | 1977-05-31 | 1980-12-16 | Texas Instruments Incorporated | Field-effect transistor structure in multilevel polycrystalline silicon |
JPS5591145A (en) * | 1978-12-28 | 1980-07-10 | Narumi China Corp | Production of ceramic package |
JPS5942983B2 (ja) * | 1979-04-18 | 1984-10-18 | 富士通株式会社 | 半導体装置 |
US4376983A (en) * | 1980-03-21 | 1983-03-15 | Texas Instruments Incorporated | High density dynamic memory cell |
-
1980
- 1980-01-14 JP JP287180A patent/JPS56100463A/ja active Granted
-
1981
- 1981-01-09 DE DE8181100131T patent/DE3175508D1/de not_active Expired
- 1981-01-09 EP EP81100131A patent/EP0032695B1/de not_active Expired
-
1983
- 1983-12-23 US US06/564,370 patent/US4604639A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0032695A2 (de) | 1981-07-29 |
EP0032695B1 (de) | 1986-10-22 |
JPH0252427B2 (de) | 1990-11-13 |
EP0032695A3 (en) | 1983-02-16 |
US4604639A (en) | 1986-08-05 |
JPS56100463A (en) | 1981-08-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8320 | Willingness to grant licences declared (paragraph 23) |