DE3062660D1 - System for selecting word lines in a bipolar ram - Google Patents

System for selecting word lines in a bipolar ram

Info

Publication number
DE3062660D1
DE3062660D1 DE8080300458T DE3062660T DE3062660D1 DE 3062660 D1 DE3062660 D1 DE 3062660D1 DE 8080300458 T DE8080300458 T DE 8080300458T DE 3062660 T DE3062660 T DE 3062660T DE 3062660 D1 DE3062660 D1 DE 3062660D1
Authority
DE
Germany
Prior art keywords
word lines
selecting word
bipolar ram
bipolar
ram
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE8080300458T
Other languages
English (en)
Inventor
Yukio Takahashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3062660D1 publication Critical patent/DE3062660D1/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4116—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access via separately connected emittors of said transistors or via multiple emittors, e.g. T2L, ECL
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/411—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only
    • G11C11/4113—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using bipolar transistors only with at least one cell access to base or collector of at least one of said transistors, e.g. via access diodes, access transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
    • G11C11/415—Address circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Static Random-Access Memory (AREA)
DE8080300458T 1979-02-28 1980-02-18 System for selecting word lines in a bipolar ram Expired DE3062660D1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54023086A JPS5833634B2 (ja) 1979-02-28 1979-02-28 メモリセルアレイの駆動方式

Publications (1)

Publication Number Publication Date
DE3062660D1 true DE3062660D1 (en) 1983-05-19

Family

ID=12100607

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8080300458T Expired DE3062660D1 (en) 1979-02-28 1980-02-18 System for selecting word lines in a bipolar ram

Country Status (4)

Country Link
US (1) US4348747A (de)
EP (1) EP0019988B1 (de)
JP (1) JPS5833634B2 (de)
DE (1) DE3062660D1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56112122A (en) * 1980-02-08 1981-09-04 Fujitsu Ltd Decoder circuit
JPS598913B2 (ja) * 1980-04-01 1984-02-28 富士通株式会社 記憶装置
JPS6010400B2 (ja) * 1980-10-09 1985-03-16 富士通株式会社 半導体集積回路装置
JPS5841597B2 (ja) * 1980-12-24 1983-09-13 富士通株式会社 半導体メモリディスチャ−ジ回路
JPH0831278B2 (ja) * 1981-03-09 1996-03-27 富士通株式会社 メモリ回路
DE3227121A1 (de) * 1982-07-20 1984-01-26 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum lesen bipolarer speicherzellen
JPS6080195A (ja) * 1983-10-07 1985-05-08 Fujitsu Ltd 半導体記憶装置
JPS60254484A (ja) * 1984-05-31 1985-12-16 Fujitsu Ltd ２段デコーダ回路
US4613774A (en) * 1984-07-09 1986-09-23 Advanced Micro Devices, Inc. Unitary multiplexer-decoder circuit
JPS61104394A (ja) * 1984-10-22 1986-05-22 Mitsubishi Electric Corp 半導体記憶装置
JPS62202537A (ja) * 1986-02-19 1987-09-07 Hitachi Ltd 半導体集積回路装置
JP2793296B2 (ja) * 1989-11-10 1998-09-03 株式会社東芝 半導体装置
CA2042432A1 (en) * 1990-05-31 1991-12-01 Robert M. Reinschmidt Memory selection circuit
JP2754906B2 (ja) * 1990-11-06 1998-05-20 日本電気株式会社 半導体集積回路
US5285118A (en) * 1992-07-16 1994-02-08 International Business Machines Corporation Complementary current tree decoder
US5276363A (en) * 1992-08-13 1994-01-04 International Business Machines Corporation Zero power decoder/driver
US6452858B1 (en) 1999-11-05 2002-09-17 Hitachi, Ltd. Semiconductor device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1162109A (en) * 1966-12-22 1969-08-20 Ibm Semi Conductor Data and Storage Devices and Data Stores Employing Such Devices
US3541531A (en) * 1967-02-07 1970-11-17 Bell Telephone Labor Inc Semiconductive memory array wherein operating power is supplied via information paths
US3703709A (en) * 1969-05-24 1972-11-21 Nippon Electric Co High speed associative memory circuits
US3636377A (en) * 1970-07-21 1972-01-18 Semi Conductor Electronic Memo Bipolar semiconductor random access memory
US3703711A (en) * 1971-01-04 1972-11-21 Honeywell Inf Systems Memory cell with voltage limiting at transistor control terminals
US3736574A (en) * 1971-12-30 1973-05-29 Ibm Pseudo-hierarchy memory system
US3916394A (en) * 1974-12-09 1975-10-28 Honeywell Inf Systems High-speed random access memory
JPS5341968A (en) * 1976-09-29 1978-04-15 Hitachi Ltd Semiconductor circuit
JPS5375828A (en) * 1976-12-17 1978-07-05 Hitachi Ltd Semiconductor circuit
DE2658523A1 (de) * 1976-12-23 1978-06-29 Siemens Ag Halbleiterspeicher
DE2740565B1 (de) * 1977-09-08 1978-10-19 Siemens Ag Schreib-Lese-Ansteueranordnung fuer einen Bipolarhalbleiterspeicher
US4172291A (en) * 1978-08-07 1979-10-23 Fairchild Camera And Instrument Corp. Preset circuit for information storage devices

Also Published As

Publication number Publication date
JPS5833634B2 (ja) 1983-07-21
EP0019988B1 (de) 1983-04-13
JPS55117789A (en) 1980-09-10
EP0019988A1 (de) 1980-12-10
US4348747A (en) 1982-09-07

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Legal Events

Date Code Title Description
8339 Ceased/non-payment of the annual fee