CN221200189U - Liquid crystal display panel having a light shielding layer - Google Patents

Abstract

The utility model provides a liquid crystal display panel; according to the liquid crystal display panel, the transparent conducting layer is arranged between the thin film transistor array layer and the pixel electrode layer, the transparent conducting layer can shield parasitic capacitance between the pixel electrode layer and other wiring lines, and the transparent conducting layer can form storage capacitance with the pixel electrode, so that shielding electrodes and common wiring lines are not required to be arranged, the space occupied by shielding metal and common wiring lines is reduced, the aperture opening ratio of the liquid crystal display panel is improved, and the blocking structure is arranged between color resistors of different filtering colors through the blocking structure, so that color cast caused by overlapping between adjacent color resistors can be avoided, and the display effect is improved.

Description

Liquid crystal display panel having a light shielding layer

Technical Field

The utility model relates to the technical field of display, in particular to a liquid crystal display panel.

Background

TFT-LCD (thin film transistor-liquid CRYSTAL DISPLAY, thin film transistor liquid crystal display) is widely used due to advantages of long lifetime, mature technology, low price, and the like. In order to shield parasitic capacitance between a pixel electrode and other wirings, a first shielding metal and a second shielding metal are respectively arranged on a grid metal layer and a pixel electrode layer, and due to the fact that corresponding areas of the first shielding metal and the second shielding metal cannot transmit light, a non-light-transmitting area between adjacent pixels is large, the aperture ratio of a display panel is low, and in order to form capacitance, common wirings are formed on the grid metal layer, the non-light-transmitting area between the adjacent pixels is further increased, and the aperture ratio of the display panel is reduced.

Therefore, the prior liquid crystal display device has the technical problem that the opening ratio of the display panel is low due to the large occupied space of shielding metal and common wiring.

Disclosure of utility model

The embodiment of the utility model provides a liquid crystal display panel, which is used for solving the technical problem that the opening ratio of the display panel is low due to the fact that the occupation space of shielding metal and public wiring is large in the conventional liquid crystal display device.

An embodiment of the present utility model provides a liquid crystal display panel including:

the array substrate comprises a first substrate, a thin film transistor array layer, a transparent conducting layer and a pixel electrode layer, wherein the thin film transistor array layer is arranged on one side of the first substrate, the transparent conducting layer is arranged on one side of the thin film transistor array layer, which is far away from the first substrate, and the pixel electrode layer is arranged on one side of the transparent conducting layer, which is far away from the thin film transistor array layer;

the opposite side substrate comprises a second substrate, and the second substrate is arranged on one side of the pixel electrode layer far away from the thin film transistor array layer;

The liquid crystal display panel further comprises a color resistance layer and a blocking structure, the color resistance layer is arranged on one side, far away from the first substrate, of the thin film transistor array layer, or the color resistance layer is arranged on one side, close to the array substrate, of the second substrate, the color resistance layer comprises color resistances of a plurality of different filtering colors, spaces exist between the color resistances of the different filtering colors, and the blocking structure is arranged between the color resistances of the different filtering colors.

In some embodiments, the thickness of the barrier structure is greater than or equal to the thickness of the color barrier layer.

In some embodiments, the blocking structure includes a first blocking structure and a second blocking structure, the first blocking structure having a thickness greater than a thickness of the second blocking structure.

In some embodiments, the counter substrate further includes a common electrode layer disposed at a side of the second substrate adjacent to the pixel electrode layer.

In some embodiments, the color resistance layer is disposed between the thin film transistor array layer and the pixel electrode layer, the pixel electrode layer includes a plurality of pixel electrodes, one pixel electrode corresponds to one color resistance, and a width of the blocking structure is less than or equal to a pitch between adjacent pixel electrodes.

In some embodiments, the color resist layer is disposed between the thin film transistor array layer and the transparent conductive layer, or the color resist layer is disposed between the transparent conductive layer and the pixel electrode layer.

In some embodiments, the color resist layer is disposed on a side of the common electrode layer away from the pixel electrode layer, and the liquid crystal display panel further includes a first alignment layer and a second alignment layer, where the first alignment layer is disposed between the pixel electrode layer and the second alignment layer.

In some embodiments, the pixel electrode layer includes a plurality of pixel electrodes, a distance between adjacent pixel electrodes is greater than a width of the blocking structure, and the blocking structure is disposed between corresponding regions of the adjacent pixel electrodes.

In some embodiments, the array substrate further includes a common electrode layer disposed between the transparent conductive layer and the pixel electrode layer.

In some embodiments, the pixel electrode layer includes a plurality of pixel electrodes, each pixel electrode includes a main electrode, the thin film transistor array layer includes a data line, a projection of the data line on the first substrate coincides with a projection of the main electrode on the first substrate, and a distance between two adjacent columns of the pixel electrodes ranges from 3 micrometers to 15 micrometers.

The beneficial effects are that: the utility model provides a liquid crystal display panel; the liquid crystal display panel comprises an array substrate and an opposite side substrate, wherein the array substrate comprises a first substrate, a thin film transistor array layer, a transparent conducting layer and a pixel electrode layer, the thin film transistor array layer is arranged on one side of the first substrate, the transparent conducting layer is arranged on one side of the thin film transistor array layer, which is far away from the first substrate, the pixel electrode layer is arranged on one side of the transparent conducting layer, which is far away from the thin film transistor array layer, the opposite side substrate comprises a second substrate, which is arranged on one side of the pixel electrode layer, which is far away from the thin film transistor array layer, wherein the liquid crystal display panel further comprises a color resistance layer and a blocking structure, the color resistance layer is arranged on one side of the thin film transistor array layer, which is far away from the first substrate, or the color resistance layer is close to one side of the array substrate, the color resistance layer comprises a plurality of color resistances of different filtering colors, and a space exists between the color resistances of the different filtering colors, and the blocking structure is arranged between the color resistances of the different filtering colors. According to the utility model, the transparent conductive layer is arranged between the thin film transistor array layer and the pixel electrode layer, the transparent conductive layer can shield parasitic capacitance between the pixel electrode layer and other wirings, and the transparent conductive layer can form a storage capacitance with the pixel electrode, so that shielding electrodes and common wirings are not required to be arranged, the space occupied by shielding metal and common wirings is reduced, the aperture ratio of the liquid crystal display panel is improved, and the blocking structure is arranged between color resistors of different filtering colors, so that color cast caused by overlapping between adjacent color resistors can be avoided, and the display effect is improved.

Drawings

The technical solution and other advantageous effects of the present utility model will be made apparent by the following detailed description of the specific embodiments of the present utility model with reference to the accompanying drawings.

Fig. 1 is a laminated view of film layers of a conventional liquid crystal display panel.

Fig. 2 is a sectional view of a conventional liquid crystal display panel.

Fig. 3 is a schematic diagram of a first stacked layer of a lcd panel according to an embodiment of the utility model.

Fig. 4 is a schematic cross-sectional view of a liquid crystal display panel according to an embodiment of the utility model.

Fig. 5 is a schematic cross-sectional view of a second type of lcd panel according to an embodiment of the utility model.

Fig. 6 is a schematic cross-sectional view of a third embodiment of a liquid crystal display panel.

Fig. 7 is a schematic diagram of a second stacked layer of the lcd panel according to an embodiment of the utility model.

Fig. 8 is a schematic diagram of a fourth stacked layer of a lcd panel according to an embodiment of the utility model.

Fig. 9 is a schematic diagram of color shift of a liquid crystal display panel according to an embodiment of the present utility model.

Fig. 10 is a schematic diagram of a blocking structure and a setting position of a pixel unit according to an embodiment of the present utility model.

Detailed Description

The technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. It will be apparent that the described embodiments are only some, but not all, embodiments of the utility model. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to fall within the scope of the utility model.

In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings are merely for convenience in describing the present utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be configured and operated in a specific orientation, and thus should not be construed as limiting the present utility model. Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include one or more of the described features. In the description of the present utility model, the meaning of "a plurality" is two or more, unless explicitly defined otherwise.

In the description of the present utility model, it should be noted that, unless explicitly specified and limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, and may be either fixedly connected, detachably connected, or integrally connected, for example; can be mechanically connected, electrically connected or can be communicated with each other; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. The specific meaning of the above terms in the present utility model can be understood by those of ordinary skill in the art according to the specific circumstances.

In the present utility model, unless expressly stated or limited otherwise, a first feature "above" or "below" a second feature may include both the first and second features being in direct contact, as well as the first and second features not being in direct contact but being in contact with each other through additional features therebetween. Moreover, a first feature being "above," "over" and "on" a second feature includes the first feature being directly above and obliquely above the second feature, or simply indicating that the first feature is higher in level than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly under and obliquely below the second feature, or simply means that the first feature is less level than the second feature.

The following disclosure provides many different embodiments, or examples, for implementing different features of the utility model. In order to simplify the present disclosure, components and arrangements of specific examples are described below. They are, of course, merely examples and are not intended to limit the utility model. Furthermore, the present utility model may repeat reference numerals and/or letters in the various examples, which are for the purpose of brevity and clarity, and which do not themselves indicate the relationship between the various embodiments and/or arrangements discussed. In addition, the present utility model provides examples of various specific processes and materials, but one of ordinary skill in the art will recognize the application of other processes and/or the use of other materials.

As shown in fig. 1 and 2, in order to shield parasitic capacitance between the pixel electrode 141 and other wirings, as shown in fig. 1 and 2, a first shielding metal 111 is disposed on the gate metal layer 11, and a second shielding metal 142 is disposed on the pixel electrode layer 14, so that the second shielding metal 142 can shield parasitic capacitance between the data line 131 and the pixel electrode 141, the first shielding metal 111 can shield parasitic capacitance between the pixel electrode 141 and other wirings, and can shield light, but as the first shielding metal 111 and the data line 131 are opaque, a non-light-transmitting area between adjacent pixels is larger, as shown in fig. 2, a width of the first shielding metal 111 is 4.75 micrometers, a width of the data line 131 is 5 micrometers, a distance between the first shielding metal 111 and the data line 131 is 3 micrometers, for example, a non-light-transmitting area between adjacent pixels is 18.5 micrometers, and a non-light-transmitting area between adjacent pixels is formed, and the non-transmitting area between adjacent pixels is further reduced, as shown in fig. 2, the non-light-transmitting area between adjacent pixels is formed, and the non-transmitting area is reduced. Therefore, the prior liquid crystal display device has the technical problem that the opening ratio of the display panel is low due to the large occupied space of shielding metal and common wiring.

The embodiment of the utility model aims at the technical problems and provides a liquid crystal display panel and a liquid crystal display device, which are used for relieving the technical problems.

As shown in fig. 3 to 6, an embodiment of the present utility model provides a liquid crystal display panel 2, which includes:

An array substrate 51 including a first substrate 21, a thin film transistor array layer 22, a transparent conductive layer 23, and a pixel electrode layer 26, the thin film transistor array layer 22 being disposed on a side of the first substrate 21, the transparent conductive layer 23 being disposed on a side of the thin film transistor array layer 22 away from the first substrate 21, the pixel electrode layer 26 being disposed on a side of the transparent conductive layer 23 away from the thin film transistor array layer 22;

A counter substrate 52 including a second substrate 35, the second substrate 35 being disposed on a side of the pixel electrode layer 26 remote from the thin film transistor array layer 22;

The liquid crystal display panel 2 further includes a color blocking layer 27 and a blocking structure 24, the color blocking layer 27 is disposed on a side of the thin film transistor array layer 22 away from the first substrate 21, or the color blocking layer 27 is disposed on a side of the second substrate 35 close to the array substrate 51, the color blocking layer 27 includes color blocks (such as a red color block 271, a green color block 272 and a blue color block 273) of a plurality of different filtering colors, a space exists between the color blocks of different filtering colors, and the blocking structure 24 is disposed between the color blocks of different filtering colors.

According to the embodiment of the utility model, the transparent conductive layer 23 is arranged between the thin film transistor array layer 22 and the pixel electrode layer 26, the transparent conductive layer 23 can shield parasitic capacitance between the pixel electrode layer 26 and other wirings, and the transparent conductive layer 23 can form a storage capacitance with the pixel electrode 261, so that shielding electrodes and common wirings are not required to be arranged, the space occupied by shielding metal and the common wirings is reduced, the aperture ratio of the liquid crystal display panel is improved, and the blocking structure is arranged between color resistors of different filtering colors, so that color cast caused by overlapping between adjacent color resistors can be avoided, and the display effect is improved.

Specifically, as shown in fig. 2 and 3, it can be seen that by arranging the transparent electrode layer 23, the transparent electrode layer 23 is arranged between the pixel electrode layer 26 and the thin film transistor array layer 22, and the projection of the transparent electrode layer 23 on the first substrate covers the projection of the pixel electrode 261 on the first substrate, the transparent electrode layer 23 can shield the space between the pixel electrode 261 and other wirings, and the transparent electrode layer 23 can form a storage capacitor with the pixel electrode 261, so that the shielding electrode and the common wiring are not required to be arranged, and accordingly, the space between the pixel electrodes can be reduced, thereby improving the aperture ratio.

As shown in fig. 2, since the first shielding metal and the second shielding metal are not required, the space between the pixel electrode 261 and the data line 224a may be reduced, it may be seen that the space between the pixel electrode 261 and the data line 224a may be reduced to 1.4 micrometers, and since the pixel space may be greatly reduced, the width of the trace may be correspondingly increased to reduce the impedance, for example, the width of the data line 224a may be increased to 6 micrometers, the width of the pixel electrode 261 may also be increased, so that the space between the right side of the pixel electrode 261 and the data line 224a is 14 micrometers, but it may be seen that the space between two adjacent pixel electrodes is 8.8 micrometers, the width of the non-light-transmitting region between the pixels is reduced, the aperture ratio of the display panel is increased, and the signal crosstalk may be improved.

Specifically, taking a 65 inch 8K display device as an example, the aperture ratio can be improved by 20%.

Specifically, as shown in fig. 7 and 8, in order to further increase the aperture ratio, the data line 224a may be disposed under the main electrode of the pixel electrode 261, and it may be understood that, in order to input a signal to the transparent conductive layer 23, the transparent conductive layer 23 may be connected to a metal trace of the gate layer 221 (not shown in fig. 3 and 7).

As shown in fig. 4 and 8, it can be seen that the embodiment of the utility model reduces the interval between pixels and improves the aperture ratio of the pixels by arranging the transparent electrode layer. It will be appreciated that when a COA (Color On Array) substrate is used, there will be an overlap between adjacent Color resistors, as shown in fig. 9, since the pitch between adjacent pixel electrodes 261 is reduced, for example, the pitch between adjacent pixel electrodes 261 is in the range of 3 micrometers to 15 micrometers, which results in a reduced width of the overlapping region between adjacent Color resistors, and the formation process of the Color resistors has a certain error fluctuation, as shown in fig. 9, which results in the red Color resistor 271 extending into the blue sub-pixel corresponding to the blue Color resistor 273, which results in Color shift when the blue sub-pixel emits light. In view of the above problems, the present utility model is to prevent the color shift problem of the liquid crystal display panel by providing the blocking structure 24 and separating the adjacent color resistors by the blocking structure 24 as shown in fig. 5 and 6.

In particular, the above embodiment is described taking the transparent conductive layer corresponding to the pixel electrode arrangement as an example, but the embodiment of the utility model is not limited thereto, and the transparent conductive layer may be arranged entirely.

In some embodiments, the filtering colors of the same column of color resistors are the same, and the filtering colors of two adjacent color resistors in the same row are different, so that a blocking structure is not required to be arranged between the same column of color resistors by making the filtering colors of the same column of color resistors the same.

Specifically, no blocking structure is arranged between the color resistances of the same filtering color.

In some embodiments, as shown in fig. 5, the thickness H1 of the barrier structure 24 is greater than or equal to the thickness H2 of the color resist layer 27. By making the thickness of the blocking structure greater than or equal to the thickness of the color blocking layer, the color blocking overlapping of the color blocking layer across the blocking structure can be prevented, resulting in color shift of the liquid crystal display panel.

Specifically, the thickness of the blocking structure is equal to that of the color resistance layer, so that the upper surfaces of the blocking structure and the color resistance layer are flat, and the subsequent film layer can be conveniently prepared. By making the thickness of the blocking structure larger than that of the color blocking layer, the color deviation problem caused by color blocking overflow and color blocking overlapping can be further avoided.

Specifically, the above embodiment is described taking an example in which the color resist layer is disposed on the array side, and correspondingly, the common electrode layer may be disposed on the opposite substrate, and the black matrix may be disposed on the opposite substrate, so that the black matrix is disposed corresponding to the blocking structure, or the black matrix is not disposed, so that the blocking structure is used as the light shielding structure.

In some embodiments, as shown in fig. 6, the barrier structure 24 includes a first barrier structure 241 and a second barrier structure 242, the thickness H3 of the first barrier structure 241 being greater than the thickness H4 of the second barrier structure 242; by making the blocking structure 24 include the first blocking structure 241 and the second blocking structure 242, the thickness of the first blocking structure 241 is greater than that of the second blocking structure 242, the first blocking structure 241 can be used as a supporting column to support the liquid crystal box, no additional supporting column is required, process steps are reduced, and the preparation efficiency of the liquid crystal display panel is improved.

In some embodiments, as shown in fig. 6, the opposite substrate 52 further includes a common electrode layer 32, and the common electrode layer 32 is disposed on a side of the second substrate 35 adjacent to the pixel electrode layer 26. For the liquid crystal display panel with the vertical alignment structure, the transparent conductive layer 23 is arranged between the thin film transistor array layer 22 and the pixel electrode layer 26, the transparent conductive layer 23 can shield parasitic capacitance between the pixel electrode layer 26 and other wirings, and the transparent conductive layer 23 can form storage capacitance with the pixel electrode 261, so that shielding electrodes and common wirings are not required to be arranged, the space occupied by shielding metal and the common wirings is reduced, the aperture ratio of the liquid crystal display panel is improved, and the blocking structure is arranged between color resistances of different filtering colors, so that color deviation caused by overlapping between adjacent color resistances can be avoided, and the display effect is improved.

In some embodiments, as shown in fig. 5, the color resistance layer 27 is disposed between the thin film transistor array layer 22 and the pixel electrode layer 26, the pixel electrode layer 26 includes a plurality of pixel electrodes 261, one of the pixel electrodes 261 corresponds to one of the color resistances (e.g., one of the pixel electrodes 261 corresponds to one of the red color resistances 271, one of the pixel electrodes 261 corresponds to one of the green color resistances 272), and the width L1 of the blocking structure 24 is smaller than or equal to the spacing L2 between adjacent pixel electrodes 261. By arranging the color resist layer 27 between the thin film transistor array layer 22 and the pixel electrode layer 26, the width of the blocking structure 24 is smaller than or equal to the interval between the adjacent pixel electrodes 261, the blocking structure 24 is prevented from influencing the aperture ratio of the liquid crystal display panel, color cast of the liquid crystal display panel is prevented by arranging the blocking structure, and the display effect is improved.

Specifically, as shown in fig. 5, since the blocking structure 24 is disposed in the area corresponding to the adjacent pixel electrodes, the width of the blocking structure 24 can be smaller than the interval between the adjacent pixel electrodes, so as to avoid the decrease of the aperture ratio of the liquid crystal display panel, and the crosstalk between the adjacent color resistors can not occur due to the blocking effect of the blocking structure 24, so as to avoid the color shift of the liquid crystal display panel.

In some embodiments, the color resist layer 27 is disposed between the thin film transistor array layer 22 and the transparent conductive layer 23, or as shown in fig. 5, the color resist layer 27 is disposed between the transparent conductive layer 23 and the pixel electrode layer 26, and the storage capacitance can be adjusted by disposing the color resist layer between the thin film transistor array layer 22 and the transparent conductive layer 23, or disposing the color resist layer 27 between the transparent conductive layer 23 and the pixel electrode layer 26, so that the color resist layer can reduce the parasitic capacitance between the film layers.

Specifically, fig. 5 shows that the color resist layer 27 is disposed between the transparent conductive layer 23 and the pixel electrode layer 26, and the flat layer 25 is disposed between the color resist layer 27 and the pixel electrode layer 26, and it is understood that the pixel electrode layer has good coverage, and the pixel electrode layer 26 may be directly contacted with the color resist layer without disposing the flat layer between the color resist layer and the pixel electrode layer 26. Similarly, when the color resist layer is disposed between the thin film transistor array layer 22 and the transparent conductive layer 23, the color resist layer may be in direct contact with the transparent conductive layer.

Specifically, the connection manner of the pixel electrode 261 and the source drain electrode layer 224 is not shown in fig. 5, and it is understood that, as shown in fig. 3, each pixel includes a thin film transistor array region and a pixel light emitting region, and the pixel electrode may be connected to the source drain electrode layer in the thin film transistor array region.

In some embodiments, as shown in fig. 6, the color resist layer 27 is disposed on a side of the common electrode layer 32 remote from the pixel electrode layer 26. Through making the color resistance layer set up in the public electrode layer one side of keeping away from the pixel electrode layer, make the barrier structure set up between the color resistance layer, can avoid adjacent color to hinder between the crosstalk, avoid liquid crystal display panel to appear the color cast, improve the display effect.

In some embodiments, as shown in fig. 6, the liquid crystal display panel 2 further includes a first alignment layer 31 and a second alignment layer 34, wherein the first alignment layer 31 is disposed between the pixel electrode layer 26 and the second alignment layer 34;

Wherein the common electrode layer 32 is in contact with the first alignment layer 31. By making the barrier structure 24 include the first barrier structure 241 and the second barrier structure 242, and making the common electrode layer 32 contact with the first alignment layer, the first barrier structure 241 can be used as a support column to support the liquid crystal cell, so that no additional support column is required, process steps are reduced, and the preparation efficiency of the liquid crystal display panel is improved.

Specifically, as shown in fig. 6, it can be seen that the first blocking structure 241 extends toward the pixel electrode layer 26, so that the common electrode layer 32 contacts the first alignment layer 31, and the first blocking structure 241 supports the liquid crystal cell without providing an additional support column. Meanwhile, the second blocking structure 242 may serve as a sub-supporting column.

In some embodiments, as shown in fig. 6, the second alignment layer 34 is formed with a via hole through which the common electrode layer 32 is in contact with the first alignment layer 31. By forming the second alignment layer to have a via hole, and making the common electrode layer contact with the first alignment layer through the via hole, the supporting effect of the first barrier structure 241 on the liquid crystal cell by the common electrode layer 32 can be improved.

Specifically, the above embodiment is described taking the example that the second alignment layer 34 is formed with the via hole as an example, but the embodiment of the present utility model is not limited thereto, and the second alignment layer 34 may not be formed with the via hole, so that the first alignment layer and the second alignment layer are directly contacted.

In some embodiments, as shown in fig. 6, the pixel electrode layer 26 includes a plurality of pixel electrodes 261, a distance L2 between adjacent pixel electrodes 261 is greater than a width L1 of the barrier structure 24, and the barrier structure 24 is disposed between corresponding regions of adjacent pixel electrodes 261. The distance between the adjacent pixel electrodes is larger than the width of the blocking structure, so that when the blocking structure supports the liquid crystal box, signal abnormality caused by direct contact between the common electrode and the pixel electrodes is avoided, and the yield of the liquid crystal display panel is improved.

Specifically, as shown in fig. 6, the width of the first blocking structure 241 is taken as the width of the blocking structure 24, but the embodiment of the utility model is not limited thereto, for example, when the widths of the first blocking structure 241 and the second blocking structure 242 are different, the interval between the adjacent pixel electrodes may be larger than the width of the first blocking structure, and the interval between the adjacent pixel electrodes may be larger than the width of the second blocking structure.

In some embodiments, the array substrate further includes a common electrode layer disposed between the transparent conductive layer and the pixel electrode layer. For the liquid crystal display panel with the common electrode layer and the pixel electrode layer arranged on the same side, the transparent conductive layer 23 is arranged between the thin film transistor array layer 22 and the pixel electrode layer 26, the transparent conductive layer 23 can shield parasitic capacitance between the pixel electrode layer 26 and other wires, and the transparent conductive layer 23 can form storage capacitance with the pixel electrode 261, so that shielding electrodes and common wires do not need to be arranged, the space occupied by shielding metal and the common wires is reduced, the aperture ratio of the liquid crystal display panel is improved, and the blocking structure is arranged between color resistors of different filtering colors by arranging the blocking structure, so that color deviation caused by overlapping between adjacent color resistors can be avoided, and the display effect is improved.

In some embodiments, the pixel electrode layer 26 includes a plurality of pixel electrodes 261, each pixel electrode 261 includes a main electrode, the thin film transistor array layer 22 includes a data line 224a, and a projection of the data line 224a on the first substrate 21 coincides with a projection of the main electrode on the first substrate 21, and a pitch between two adjacent columns of the pixel electrodes 261 ranges from 3 micrometers to 15 micrometers. The projection of the data line on the first substrate is vertically overlapped with the projection of the pixel electrode on the first substrate, so that the distance range between adjacent pixel electrodes can be reduced to 3-15 micrometers, and the aperture opening ratio is improved.

In some embodiments, as shown in fig. 10, the liquid crystal display panel 2 includes a plurality of pixel units 41 arranged in an array, and the blocking structure 24 is disposed between two adjacent columns of pixel units 41. By arranging the blocking structure 24 between two adjacent columns of pixel units, color resistances corresponding to the two adjacent columns of pixel units can be separated, crosstalk between the two adjacent columns of color resistances is avoided, and the display effect of the liquid crystal display panel is improved.

Specifically, the blocking structure may be disposed between two adjacent columns of pixel units when the light emission colors of the same column of pixels are identical, but the embodiment of the present utility model is not limited thereto, for example, the blocking structure may be disposed between two adjacent rows of pixel units when the light emission colors of the same row of pixels are identical.

In some embodiments, the material of the barrier structure includes an organic photoresist, but the material of the barrier structure may be an inorganic material prior to this in embodiments of the present utility model.

In some embodiments, the material of the blocking structure is a transparent material, but embodiments of the present utility model are not limited thereto, for example, in order to avoid light crosstalk between adjacent color resistors, the blocking structure may be made of a light shielding material.

In particular, the embodiment of the present utility model is described by taking a pixel structure as an example of a four-domain structure, but the embodiment of the present utility model is not limited thereto, and for example, the pixel structure may be a two-domain structure or an eight-domain structure.

In some embodiments, as shown in fig. 6, the thin film transistor array layer 22 includes a gate layer 221, a gate insulating layer 222, an active layer 223, a source drain layer 224, and an interlayer insulating layer 225.

In some embodiments, as shown in fig. 6, the color resist layer 27 includes a red color resist 271, a green color resist 272, and a blue color resist 273. However, embodiments of the present utility model are not limited thereto, and the color resist layer may further include white color resist.

In some embodiments, as shown in fig. 6, the liquid crystal display panel 2 further includes a liquid crystal layer 33.

Meanwhile, an embodiment of the present utility model provides a liquid crystal display device including the liquid crystal display panel according to any one of the above embodiments.

As can be seen from the above embodiments:

The embodiment of the utility model provides a liquid crystal display panel and a liquid crystal display device; the liquid crystal display panel comprises an array substrate and an opposite side substrate, wherein the array substrate comprises a first substrate, a thin film transistor array layer, a transparent conducting layer and a pixel electrode layer, the thin film transistor array layer is arranged on one side of the first substrate, the transparent conducting layer is arranged on one side of the thin film transistor array layer, which is far away from the first substrate, the pixel electrode layer is arranged on one side of the transparent conducting layer, which is far away from the thin film transistor array layer, the opposite side substrate comprises a second substrate, which is arranged on one side of the pixel electrode layer, which is far away from the thin film transistor array layer, wherein the liquid crystal display panel further comprises a color resistance layer and a blocking structure, the color resistance layer is arranged on one side of the thin film transistor array layer, which is far away from the first substrate, or the color resistance layer is close to one side of the array substrate, the color resistance layer comprises a plurality of color resistances of different filtering colors, and a space exists between the color resistances of the different filtering colors, and the blocking structure is arranged between the color resistances of the different filtering colors. According to the utility model, the transparent conductive layer is arranged between the thin film transistor array layer and the pixel electrode layer, the transparent conductive layer can shield parasitic capacitance between the pixel electrode layer and other wirings, and the transparent conductive layer can form a storage capacitance with the pixel electrode, so that shielding electrodes and common wirings are not required to be arranged, the space occupied by shielding metal and common wirings is reduced, the aperture ratio of the liquid crystal display panel is improved, and the blocking structure is arranged between color resistors of different filtering colors, so that color cast caused by overlapping between adjacent color resistors can be avoided, and the display effect is improved.

In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.

The above describes in detail a liquid crystal display panel and a liquid crystal display device provided by the embodiments of the present utility model, and specific examples are applied to illustrate the principles and embodiments of the present utility model, and the description of the above embodiments is only for helping to understand the technical solution and core ideas of the present utility model; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the utility model.

Claims (10)

1. A liquid crystal display panel, comprising:

the array substrate comprises a first substrate, a thin film transistor array layer, a transparent conducting layer and a pixel electrode layer, wherein the thin film transistor array layer is arranged on one side of the first substrate, the transparent conducting layer is arranged on one side of the thin film transistor array layer, which is far away from the first substrate, and the pixel electrode layer is arranged on one side of the transparent conducting layer, which is far away from the thin film transistor array layer;

the opposite side substrate comprises a second substrate, and the second substrate is arranged on one side of the pixel electrode layer far away from the thin film transistor array layer;

The liquid crystal display panel further comprises a color resistance layer and a blocking structure, the color resistance layer is arranged on one side, far away from the first substrate, of the thin film transistor array layer, or the color resistance layer is arranged on one side, close to the array substrate, of the second substrate, the color resistance layer comprises color resistances of a plurality of different filtering colors, spaces exist between the color resistances of the different filtering colors, and the blocking structure is arranged between the color resistances of the different filtering colors.

2. The liquid crystal display panel of claim 1, wherein a thickness of the barrier structure is greater than or equal to a thickness of the color barrier layer.

3. The liquid crystal display panel of claim 1, wherein the barrier structure comprises a first barrier structure and a second barrier structure, the first barrier structure having a thickness greater than a thickness of the second barrier structure.

4. The liquid crystal display panel of claim 1, wherein the counter substrate further comprises a common electrode layer disposed on a side of the second substrate adjacent to the pixel electrode layer.

5. The liquid crystal display panel of claim 4, wherein the color resist layer is disposed between the thin film transistor array layer and the pixel electrode layer, the pixel electrode layer includes a plurality of pixel electrodes, one of the pixel electrodes corresponds to one of the color resists, and a width of the barrier structure is less than or equal to a pitch between adjacent pixel electrodes.

6. The liquid crystal display panel according to claim 5, wherein the color resist layer is disposed between the thin film transistor array layer and the transparent conductive layer, or between the transparent conductive layer and the pixel electrode layer.

7. The liquid crystal display panel of claim 4, wherein the color resist layer is disposed on a side of the common electrode layer away from the pixel electrode layer, the liquid crystal display panel further comprising a first alignment layer and a second alignment layer, the first alignment layer disposed between the pixel electrode layer and the second alignment layer.

8. The liquid crystal display panel of claim 7, wherein the pixel electrode layer includes a plurality of pixel electrodes, a spacing between adjacent pixel electrodes is greater than a width of the blocking structure, and the blocking structure is disposed between corresponding regions of adjacent pixel electrodes.

9. The liquid crystal display panel of claim 1, wherein the array substrate further comprises a common electrode layer disposed between the transparent conductive layer and the pixel electrode layer.

10. The liquid crystal display panel of claim 1, wherein the pixel electrode layer comprises a plurality of pixel electrodes, each pixel electrode comprises a main electrode, the thin film transistor array layer comprises a data line, a projection of the data line on the first substrate coincides with a projection of the main electrode on the first substrate, and a distance between two adjacent columns of the pixel electrodes ranges from 3 micrometers to 15 micrometers.