CN219420570U - Slope compensation circuit for switching power supply - Google Patents
Slope compensation circuit for switching power supply Download PDFInfo
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- CN219420570U CN219420570U CN202320517727.1U CN202320517727U CN219420570U CN 219420570 U CN219420570 U CN 219420570U CN 202320517727 U CN202320517727 U CN 202320517727U CN 219420570 U CN219420570 U CN 219420570U
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- Prior art keywords
- capacitor
- current mirror
- power supply
- switching power
- slope compensation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
The utility model relates to the technical field of slope compensation, and discloses a slope compensation circuit for a switching power supply, which comprises a current mirror unit, a control switch K1, a capacitor C1 and a resistor R1, wherein the current mirror unit is connected with the control switch K1; the current mirror unit comprises a main current mirror branch and a slave current mirror branch, the slave current mirror branch mirrors the current of the main current mirror branch and inputs charging current to a capacitor C1, and the capacitor C1 is grounded through a resistor R1; the control switch K1 is connected with the capacitor C1 in parallel; in practical use, an external signal is input to the non-grounded end of the resistor R1, when the control switch K1 is not conducted, the charging current charges the capacitor C1, and the voltage at one end of the capacitor C1 is the voltage superposition of the voltage of the capacitor C1 and the voltage of the external signal, so that the compensated signal can be obtained only by electrically connecting an external comparator with one end of the capacitor C1, and the structure of a circuit required by the generation of the compensation signal in the switching power supply is simplified.
Description
Technical Field
The utility model relates to the technical field of slope compensation, in particular to a slope compensation circuit for a switching power supply.
Background
In order to avoid the unstable output of the switching power supply when the duty ratio of the output of the switching power supply increases, a slope compensation circuit is added to the switching power supply to perform signal compensation, and the output of the switching power supply is adjusted by the slope compensation circuit, for example, in a control circuit and a control method for the switching power supply disclosed in the patent document CN105356729a, the signal compensation is performed by using the slope compensation circuit, and referring to fig. 3 of the patent document, the slope compensation circuit includes a current source I1, a capacitor C1, a resistor R1 and a first switching tube Q1, and a compensation signal generated by the slope compensation circuit and a signal Vc are added by a second adder 304 and then input to a comparator C1. Although the slope compensation circuit of the patent document can realize slope compensation, the structure is complex, the compensated signal can be input into the comparator C1 only after being overlapped by the second adder, and the compensation amount can be adjusted only by adjusting the capacitance value of the capacitor C1, so that the applicability is poor.
Disclosure of Invention
In view of the shortcomings of the background art, the utility model provides a slope compensation circuit for a switching power supply, and aims to solve the technical problems that the existing slope compensation circuit only provides a compensation signal, cannot realize superposition output of the compensation signal and an external signal and has poor applicability.
In order to solve the technical problems, the utility model provides the following technical scheme: a slope compensation circuit for a switching power supply comprises a current mirror unit, a control switch K1, a capacitor C1 and a resistor R1; the current mirror unit comprises a main current mirror branch and a slave current mirror branch, wherein the slave current mirror branch is used for mirroring the current of the main current mirror branch and inputting charging current to one end of a capacitor C1, and the other end of the capacitor C1 is grounded through a resistor R1; the control switch comprises an input end, an output end and a control end, wherein the input end is electrically connected with one end of the capacitor C1, the output end is electrically connected with the other end of the capacitor C1, the input end is conducted with the output end when the control end inputs a control signal in a first level state, and the input end is disconnected with the output end when the control end inputs a control signal in a second level state.
In some embodiments, the master current mirror branch includes a PMOS tube P1, and the slave current mirror branch includes a PMOS tube P2; the source of the PMOS tube P1 and the source of the PMOS tube P2 are configured to input a working power supply, the grid electrode of the PMOS tube P1 is respectively and electrically connected with the drain electrode of the PMOS tube P1 and the grid electrode of the PMOS tube P2, the drain electrode of the PMOS tube P2 is electrically connected with one end of the capacitor C1, and charging current is input to one end of the capacitor C1.
In a certain embodiment, the gate lengths of the PMOS transistor P1 and the PMOS transistor P2 are the same, and the gate width ratio of the PMOS transistor P1 to the PMOS transistor P2 is 1:n, where n is a positive integer.
In a certain embodiment, the control switch K1 is an NMOS transistor, a drain of the NMOS transistor is an input end, a source of the NMOS transistor is an output end, and a gate of the NMOS transistor is a control end.
In a certain embodiment, the utility model further comprises a ramp generator, wherein the ramp generator is electrically connected with the control end of the control switch K1, and a sawtooth wave signal is input to the control end of the control switch K1.
In one embodiment, the first level state is a high level state and the second level state is a low level state.
Compared with the prior art, the utility model has the following beneficial effects: when in actual use, an external signal is input to one end of the resistor R1 which is not grounded, when the control switch K1 is not conducted, charging current charges the capacitor C1, and the voltage at one end of the capacitor C1 is the voltage superposition of the voltage of the capacitor C1 and the voltage of the external signal, so that a compensated signal can be obtained only by electrically connecting an external comparator with one end of the capacitor C1, and the structure of a circuit required by the generation of the compensation signal in the switching power supply is simplified; in addition, the charging speed of the capacitor C1 can be adjusted by adjusting the current conversion proportion of the current mirror unit, so that the compensation amount of the utility model in the conduction period of the driving tube of the switching power supply can be adjusted.
Drawings
FIG. 1 is a schematic view of the structure of the present utility model in an embodiment;
FIG. 2 is a circuit diagram of one implementation of the present utility model;
fig. 3 is a simulation diagram of the present utility model when performing slope compensation.
Detailed Description
The utility model will now be described in further detail with reference to the accompanying drawings. The drawings are simplified schematic representations which merely illustrate the basic structure of the utility model and therefore show only the structures which are relevant to the utility model.
As shown in fig. 1, a slope compensation circuit for a switching power supply includes a current mirror unit 1, a control switch K1, a capacitor C1, and a resistor R1; the current mirror unit 1 comprises a main current mirror branch 10 and a slave current mirror branch 10, wherein the slave current mirror branch 11 is used for mirroring the current of the main current mirror branch 10 and inputting charging current to one end of a capacitor C1, and the other end of the capacitor C1 is grounded through a resistor R1; the control switch K1 comprises an input end, an output end and a control end, wherein the input end is electrically connected with one end of the capacitor C1, the output end is electrically connected with the other end of the capacitor C1, the control end is conducted with the output end when a control signal in a first level state is input, and the control end is disconnected with the output end when a control signal in a second level state is input.
In actual use, when the input end and the output end of the control switch K1 are disconnected, charging current is supplied to the capacitor C1 to enable the voltage on the capacitor C1 to rise, if an external signal CS is input to one end of the capacitor C1 electrically connected with the resistor R1, the voltage at one end of the capacitor C1 is the sum of the voltage of the capacitor C1 and the voltage of the external signal CS, so that voltage superposition is realized, the voltage signal at one end of the capacitor C1 is the compensation signal CS_Slop, and therefore, when the input end of the external comparator is directly electrically connected with one end of the capacitor C1, the compensation signal CS_Slop can be received without additionally arranging an adder; when the input terminal and the output terminal of the control switch K1 are turned on, the voltage of the capacitor C1 can be reset, and the voltage of the capacitor C1 makes the compensation signal cs_slop in a sawtooth waveform during periodic charging and resetting.
Specifically, in this embodiment, the control switch K1 is an NMOS transistor, the drain electrode of the NMOS transistor is an input end, the source electrode of the NMOS transistor is an output end, the gate electrode of the NMOS transistor is a control end, the first level state is a high level state, and the second level state is a low level state.
When the control switch K1 is an NMOS tube, the utility model also comprises a ramp wave generator, wherein the ramp wave generator is electrically connected with the control end of the control switch K1, and a saw-tooth wave signal SET is input to the control end of the control switch K1 and is also a clock oscillation signal. In actual use, the control switch K1 is turned on at the highest point of the clock oscillation signal or in a time period having a certain interval from the highest point by controlling the highest voltage value of the clock oscillation signal in the period, so that the voltage of the capacitor C1 can be reset, thereby enabling the voltage of the capacitor C1 to change periodically, and further enabling the compensation signal cs_slop to change periodically.
In actual use, the compensation amount of the utility model in the conduction period of the driving tube of the switching power supply is adjusted by adjusting the capacitance value of the capacitor C1, and the compensation amount in the period can be changed by setting the current conversion proportion of the current mirror unit 1.
Specifically, referring to fig. 2, in the present embodiment, the main current mirror branch 10 includes a PMOS transistor P1, and the slave current mirror branch 11 includes a PMOS transistor P2; the source of the PMOS tube P1 and the source of the PMOS tube P2 are configured to input a working power supply VCC, the grid electrode of the PMOS tube P1 is respectively and electrically connected with the drain electrode of the PMOS tube P1 and the grid electrode of the PMOS tube P2, the drain electrode of the PMOS tube P2 is electrically connected with one end of the capacitor C1, and charging current is input to one end of the capacitor C1.
The gate lengths of the PMOS transistor P1 and the PMOS transistor P2 are the same, the gate width ratio of the PMOS transistor P1 and the PMOS transistor P2 is 1:n, N is a positive integer, at this time, the current conversion ratio of the current mirror unit 1 is N, when the current in the main current mirror branch 10 is I1, the charging current output from the current mirror branch 11 is n×i1, so when the gate lengths of the PMOS transistor P1 and the PMOS transistor P2 are the same, the compensation amount can be changed by changing the gate width ratio of the PMOS transistor P1 and the PMOS transistor P2.
The circuit shown in fig. 2 was simulated so that the period of the clock oscillation signal was 20us, and the compensation amount was 110mV by setting the gate width ratio of the PMOS transistor P1 and the PMOS transistor P2 and the size of the capacitor C1, and referring to fig. 3, at the peak point of the first period of the clock oscillation signal, the difference between the compensation signal cs_slop and the external signal CS was 511.542mV-400 mv= 111.542V, which is close to 110 mV.
In summary, when the utility model is actually used, an external signal CS is input to one end of the resistor R1 which is not grounded, when the control switch K1 is not conducted, a charging current charges the capacitor C1, and the voltage at one end of the capacitor C1 is the voltage superposition of the voltage of the capacitor C1 and the voltage of the external signal CS, so that a compensated signal can be obtained only by electrically connecting an external comparator with one end of the capacitor C1, thereby simplifying the structure of a circuit required by the generation of the compensation signal in the switching power supply; in addition, the charging speed of the capacitor C1 can be adjusted by adjusting the current conversion proportion of the current mirror unit 1, so that the compensation amount of the utility model in the conduction period of the driving tube of the switching power supply can be adjusted.
The present utility model has been made in view of the above-described circumstances, and it is an object of the present utility model to provide a portable electronic device capable of performing various changes and modifications without departing from the scope of the technical spirit of the present utility model. The technical scope of the present utility model is not limited to the description, but must be determined according to the scope of claims.
Claims (6)
1. A slope compensation circuit for a switching power supply is characterized by comprising a current mirror unit, a control switch K1, a capacitor C1 and a resistor R1; the current mirror unit comprises a main current mirror branch and a slave current mirror branch, wherein the slave current mirror branch is used for mirroring the current of the main current mirror branch and inputting charging current to one end of a capacitor C1, and the other end of the capacitor C1 is grounded through a resistor R1; the control switch K1 comprises an input end, an output end and a control end, wherein the input end is electrically connected with one end of the capacitor C1, the output end is electrically connected with the other end of the capacitor C1, the input end is communicated with the output end when the control end inputs a control signal in a first level state, and the input end is disconnected with the output end when the control end inputs a control signal in a second level state.
2. The slope compensation circuit for a switching power supply of claim 1, wherein the master current mirror leg comprises a PMOS tube P1 and the slave current mirror leg comprises a PMOS tube P2; the source of the PMOS tube P1 and the source of the PMOS tube P2 are configured to input a working power supply, the grid electrode of the PMOS tube P1 is respectively and electrically connected with the drain electrode of the PMOS tube P1 and the grid electrode of the PMOS tube P2, the drain electrode of the PMOS tube P2 is electrically connected with one end of the capacitor C1, and charging current is input to one end of the capacitor C1.
3. The slope compensation circuit for a switching power supply according to claim 2, wherein the gate lengths of the PMOS transistor P1 and the PMOS transistor P2 are the same, the gate width ratio of the PMOS transistor P1 and the PMOS transistor P2 is 1:n, and n is a positive integer.
4. The slope compensation circuit for a switching power supply of claim 1, wherein the control switch K1 is an NMOS transistor, a drain of the NMOS transistor is an input terminal, a source of the NMOS transistor is an output terminal, and a gate of the NMOS transistor is a control terminal.
5. The slope compensation circuit for a switching power supply according to claim 1, further comprising a ramp generator electrically connected to the control terminal of the control switch K1, and inputting a saw-tooth wave signal to the control terminal of the control switch K1.
6. A slope compensation circuit for a switching power supply according to any of claims 1-5, wherein the first level state is a high level state and the second level state is a low level state.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320517727.1U CN219420570U (en) | 2023-03-17 | 2023-03-17 | Slope compensation circuit for switching power supply |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202320517727.1U CN219420570U (en) | 2023-03-17 | 2023-03-17 | Slope compensation circuit for switching power supply |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN219420570U true CN219420570U (en) | 2023-07-25 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202320517727.1U Active CN219420570U (en) | 2023-03-17 | 2023-03-17 | Slope compensation circuit for switching power supply |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN219420570U (en) |
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2023
- 2023-03-17 CN CN202320517727.1U patent/CN219420570U/en active Active
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