CN213521661U - Anti-surge and anti-reverse circuit - Google Patents
Anti-surge and anti-reverse circuit Download PDFInfo
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- CN213521661U CN213521661U CN202022853634.5U CN202022853634U CN213521661U CN 213521661 U CN213521661 U CN 213521661U CN 202022853634 U CN202022853634 U CN 202022853634U CN 213521661 U CN213521661 U CN 213521661U
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Abstract
The embodiment of the utility model discloses prevent surge and prevent reverse circuit, including MOS pipe Q2, MOS pipe Q3, electric capacity C4, diode D1, resistance R4, resistance R5, resistance R6, resistance R7, resistance R8, resistance R9, resistance R4, voltage is anodal is connected to resistance R5 'S one end, diode D1 negative pole and resistance R6 are connected to the resistance R4 other end, resistance R9' S one end, diode D1 is anodal and resistance R7 are connected to resistance R5 'S the other end, resistance R8' S one end, MOS pipe Q2 is connected to resistance R9 'S the other end, MOS pipe Q3' S S utmost point, resistance R6, MOS pipe Q3 is connected respectively to resistance R7 'S the other end, MOS pipe Q2' S G utmost point, electric capacity C4 both ends are connected resistance R8 'S the other end and MOS pipe Q2' S D utmost point respectively, MOS pipe Q3, MOS pipe Q2D utmost point negative pole and secondary connection voltage side respectively. The utility model discloses simple structure, circuit loss is low, and possesses simultaneously and prevents the surge and prevent the reverse function.
Description
Technical Field
The utility model relates to a switching power supply technical field especially relates to an anti-surge and anti-reverse circuit.
Background
The input circuit of the switching power supply mostly adopts a capacitor filter type rectifying circuit, and because the initial voltage on the filter capacitor is zero, the filter capacitor can generate a large current when being charged at the moment of power supply starting, so that the circuit is burnt out, and the current is surge current. In order to avoid the circuit from being burnt out by surge current, technicians develop an anti-surge power supply circuit.
However, the existing anti-surge circuit does not have an anti-reverse function and cannot meet the requirement, and the existing anti-surge circuit is complex in structure and large in loss.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a technical problem that will solve provides an anti-surge and prevent reverse circuit to the messenger possesses anti-surge and prevents reverse function simultaneously.
In order to solve the above technical problem, an embodiment of the present invention provides an anti-surge and anti-reverse circuit, including a MOS transistor Q2, a MOS transistor Q3, a capacitor C4, a diode D1, a resistor R1, one end of the resistor R1 is connected to a positive voltage terminal, the other end of the resistor R1 is connected to a negative terminal of the diode D1 and the resistor R1, one end of the resistor R1 is connected to the other end of the resistor R1, the other end of the resistor R1 is connected to a positive terminal of the diode D1 and the resistor R1, one end of the resistor R1 is connected to a positive terminal of the diode D1, the other end of the resistor R1 is connected to a negative terminal of the MOS transistor Q1, the other end of the resistor R1 is connected to a G terminal of the MOS transistor Q1, the negative terminal of the MOS transistor Q1 and the negative terminal of the MOS transistor Q1 are connected to a primary voltage terminal.
Further, the MOS transistors Q2 and Q3 are both N-type MOS transistors.
The utility model has the advantages that: the utility model discloses simple structure, circuit loss is low, and possesses simultaneously and prevents the surge and prevent the reverse function.
Drawings
Fig. 1 is a circuit diagram of an anti-surge and anti-reverse circuit according to an embodiment of the present invention.
Detailed Description
It should be noted that, in the present application, the embodiments and features of the embodiments may be combined with each other without conflict, and the present invention is further described in detail with reference to the accompanying drawings and specific embodiments.
In the embodiment of the present invention, if there is directional indication (such as upper, lower, left, right, front, and rear … …) only for explaining the relative position relationship between the components and the motion situation under a certain posture (as shown in the drawing), if the certain posture is changed, the directional indication is changed accordingly.
In addition, the descriptions of the first, second, etc. in the present invention are for descriptive purposes only and are not to be construed as indicating or implying any relative importance or implicit indication of the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature.
Referring to fig. 1, the surge protection and reverse prevention circuit according to the embodiment of the present invention includes a MOS transistor Q2, a MOS transistor Q3, a capacitor C4, a diode D1, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, and a resistor R9.
One end of each of the resistor R4 and the resistor R5 is connected with a voltage anode, the other end of the resistor R4 is connected with a cathode of the diode D1 and one end of each of the resistor R6 and the resistor R9, the other end of the resistor R5 is connected with an anode of the diode D1 and one end of each of the resistor R7 and the resistor R8, the other end of the resistor R9 is connected with an S electrode of the MOS transistor Q2 and the MOS transistor Q3, the other ends of the resistor R6 and the resistor R7 are respectively connected with a G electrode of the MOS transistor Q3 and the MOS transistor Q2, the two ends of the capacitor C4 are respectively connected with the other end of the resistor R8 and a D electrode of the MOS transistor Q2, and the D electrodes of the MOS transistor Q3 and the MOS transistor.
In one embodiment, the MOS transistors Q2 and Q3 are both N-type MOS transistors.
Referring to fig. 1, the working principle of the present invention is as follows: VIN +1 is the positive voltage, VIN _ GND _1 is the negative voltage of the primary side, and VIN _ GND _2 is the negative voltage of the secondary side. When the VIN +1 voltage is established, a loop is formed through diodes inside R4, R9 and Q3, the voltage of the node 2 is higher than the saturated state voltage of V _ GS of Q3, and Q3 is conducted; similarly, because the capacitance characteristic of C4 is equivalent to a short-circuit state at the moment of power-on, and the value of R8 is much smaller than that of R5, the voltage value of node 1 is very low at the start of power-on, and does not reach the threshold of the pass gate of Q2. When the voltage of the C4 is higher and higher along with the long charging time of the C4, the voltage of the node 1 also rises, and when the voltage exceeds the V _ GS gate threshold of the Q2, according to the characteristics of a MOS transistor, when the gate threshold is just reached, the MOS presents an impedance state, and the resistance-variable characteristic is realized, which is equivalent to that a variable charging resistor is provided for a following circuit on a large input loop, so that the output voltage becomes a slow rising process. When the voltage at node 1 exceeds the V _ GS saturation of Q2, Q2 is fully on. The circuit operation is completed.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (2)
1. A surge-proof and anti-reverse circuit is characterized by comprising a MOS transistor Q2, a MOS transistor Q3, a capacitor C4, a diode D1, a resistor R1 and a resistor R1, wherein one end of the resistor R1 and one end of the resistor R1 are connected with a voltage anode, the other end of the resistor R1 is connected with a cathode of the diode D1 and one end of the resistor R1, the other end of the resistor R1 is connected with an anode of the diode D1 and one end of the resistor R1, the other end of the resistor R1 is connected with an S pole of the MOS transistor Q1 and an S pole of the MOS transistor Q1, the other ends of the resistor R1 and the resistor R1 are respectively connected with a G pole of the MOS transistor Q1 and a G pole of the MOS transistor Q1, two ends of the capacitor C1 are respectively connected with a primary side and a secondary side of the voltage.
2. The surge protection and reverse prevention circuit according to claim 1, wherein the MOS transistor Q2 and the MOS transistor Q3 are both N-type MOS transistors.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022853634.5U CN213521661U (en) | 2020-12-01 | 2020-12-01 | Anti-surge and anti-reverse circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202022853634.5U CN213521661U (en) | 2020-12-01 | 2020-12-01 | Anti-surge and anti-reverse circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN213521661U true CN213521661U (en) | 2021-06-22 |
Family
ID=76427424
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202022853634.5U Active CN213521661U (en) | 2020-12-01 | 2020-12-01 | Anti-surge and anti-reverse circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN213521661U (en) |
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2020
- 2020-12-01 CN CN202022853634.5U patent/CN213521661U/en active Active
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