CN211062442U - Pixel circuit and display panel - Google Patents
Pixel circuit and display panel Download PDFInfo
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- CN211062442U CN211062442U CN202020112152.1U CN202020112152U CN211062442U CN 211062442 U CN211062442 U CN 211062442U CN 202020112152 U CN202020112152 U CN 202020112152U CN 211062442 U CN211062442 U CN 211062442U
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Abstract
The embodiment of the utility model discloses pixel circuit and display panel. The pixel circuit includes: the driving transistor, the storage capacitor, the first switching transistor, the second switching transistor, the third switching transistor, the fourth switching transistor and the fifth switching transistor; a second switching transistor for applying a first power to a first pole of the driving transistor; the third switching transistor is used for conducting the driving current of the driving transistor to the light-emitting device; the first switching transistor and the fourth switching transistor are used for writing the data signal into the grid electrode of the driving transistor after being corrected; the fifth switching transistor is used for transmitting the reference voltage to the grid electrode of the driving transistor; the channel length of the first switching transistor is greater than the channel lengths of the second switching transistor and the third switching tube; the channel length of the first switching transistor ranges from 3um to 4 um. Compared with the prior art, the embodiment of the utility model provides a promoted pixel circuit's performance, promoted the stability of luminescent device luminance.
Description
Technical Field
The embodiment of the utility model provides a relate to and show technical field, especially relate to a pixel circuit and display panel.
Background
With the continuous development of display technology, the application range of display panels is wider and wider, and the requirements of people on the display panels are higher and higher.
The pixel circuit in the display panel plays a very important role in driving the light emitting device to stably emit light. However, the performance of the conventional pixel circuit is not satisfactory, and the light emission luminance of the light emitting device is unstable.
SUMMERY OF THE UTILITY MODEL
The embodiment of the utility model provides a pixel circuit and display panel to promote pixel circuit's performance, promote the stability of luminescent device luminance.
In order to achieve the technical purpose, the embodiment of the utility model provides a following technical scheme:
a pixel circuit, comprising:
a driving transistor for driving the light emitting device to emit light;
the storage capacitor is connected between a first power supply input end and the grid electrode of the driving transistor and is used for storing the voltage of the grid electrode of the driving transistor;
a first switching transistor connected between a data signal input terminal and a first pole of the driving transistor, the first switching transistor being adapted to be turned on under control of a first scan signal to apply a data signal to the first pole of the driving transistor;
a second switching transistor connected between the first power input terminal and the driving transistor; the second switch transistor is used for conducting under the control of a light-emitting control signal and applying a first power supply to the first pole of the driving transistor;
a third switching transistor connected between the driving transistor and the light emitting device; the third switching transistor is used for conducting under the control of a light-emitting control signal and conducting the driving current of the driving transistor to the light-emitting device;
a fourth switching transistor connected between the second pole and the gate of the driving transistor; the first switching transistor and the fourth switching transistor are used for conducting under the control of a first scanning signal, and writing the corrected data signal into the grid electrode of the driving transistor;
a fifth switching transistor connected between a reference voltage input terminal and a gate of the driving transistor; the fifth switching transistor is used for conducting under the control of a second scanning signal and transmitting a reference voltage to the grid electrode of the driving transistor;
wherein the channel length of the first switching transistor is greater than the channel lengths of the second switching transistor and the third switching tube; the channel length of the first switch transistor ranges from 3um to 4 um.
Optionally, the channel length of the first switching transistor is 3um, 3.2um, 3.4um, 3.5um, 3.7um, 3.8um, or 4 um.
According to the above technical scheme, the first aspect, the embodiment of the utility model provides a thereby the too big influence current conducting ability of channel length of having avoided first switch transistor has reduced the leakage current of first switch transistor in subthreshold district simultaneously to reduced the leakage current of drive transistor in the non-data write-in stage, promoted light emitting device's luminance stability, promoted pixel circuit's performance, improved display panel's black group phenomenon etc. and show bad phenomenon. The second aspect, when the channel length of first switch transistor is less, the condition of opening in advance probably takes place for first switch transistor, the embodiment of the utility model provides a channel length that sets up first switch transistor is not less than 3um, can prevent effectively that first switch transistor from opening in advance to avoided first switch transistor shutoff nature not good and produced great leakage current, promoted pixel circuit's stability. Third aspect, the embodiment of the present invention is applicable to the case where the refresh frequency of the display panel is lower, and the occurrence probability of the black cluster phenomenon can be reduced under the great case of the storage capacitor. Therefore, the embodiment of the utility model provides a on the basis of saving the consumption, be favorable to emitting device to stabilize luminous, display panel has good image quality. In the fourth aspect, the channel length of the first switch transistor is not greater than 4um, so that the first switch transistor is ensured to have smaller size, the occupied area of the pixel circuit is reduced, the pixel area is reduced, and the resolution is improved.
Further, the channel width of the first switch transistor is larger than the channel widths of the second switch transistor and the third switch tube. In the transistor, the larger the channel width is, the larger the output current is, and the stronger the driving capability is. The arrangement is favorable for improving the working speed of the circuit.
Further, the range of the channel width of the first switch transistor is 2.2um to 3 um. Alternatively, the channel width of the first switching transistor may be set to 2.2um, 2.3um, 2.5um, 2.8um, 2.9um, or 3 um. With such an arrangement, on the one hand, a strong driving capability of the first switching transistor can be ensured, and on the other hand, it is advantageous to set the channel length of the first switching transistor to be larger than the channel lengths of the second switching transistor and the third switching transistor, thereby suppressing the leakage current of the first switching transistor.
Further, the width-to-length ratio of the first switching transistor is smaller than the width-to-length ratios of the second switching transistor and the third switching tube. According to the current expression of the first switch transistor in the sub-threshold region, the reduction of the width-to-length ratio of the first switch transistor can reduce the leakage current of the first switch transistor in the sub-threshold region, thereby improving the brightness stability of the light-emitting device and improving the phenomena of poor display such as the black cluster phenomenon of the display panel.
Furthermore, the range of the channel length of the second switch transistor and the third switch transistor in the pixel circuit is 2.2 um-3.2 um. Optionally, the channel length of the second switch transistor and the third switch transistor can be set to 2.2um, 2.5um, 2.7um, 2.8um, 3um or 3.2 um. That is, the selectable channel length of the first switching transistor is set to be longer than the selectable channel lengths of the second switching transistor and the third switching transistor, which is beneficial to setting the channel length of the first switching transistor to be longer than the channel lengths of the second switching transistor and the third switching transistor.
Further, the width-length ratio of the second switching transistor to the third switching transistor ranges from 0.7 to 1; the width-to-length ratio of the first switching transistor ranges from 0.6 to 1. Optionally, the width-to-length ratio of the second switching transistor and the third switching transistor is 0.7, 0.8, 0.9 or 1, and the width-to-length ratio of the first switching transistor is 0.6, 0.7, 0.8, 0.9 or 1. Namely, the selectable channel width-length ratio of the first switching transistor is set to be smaller than the selectable channel width-length ratios of the second switching transistor and the third switching transistor, so that the channel width-length ratio of the first switching transistor is favorably set to be smaller than the channel width-length ratios of the second switching transistor and the third switching transistor.
Further, the fourth switching transistor and the fifth switching transistor are double gate transistors. Compared with a single-gate transistor, the double-gate transistor has a longer channel length, and can reduce leakage currents of the fourth switching transistor and the fifth switching transistor. The arrangement is favorable for keeping the voltage stored in the storage capacitor, so that the brightness stability of the light-emitting device is improved, and the performance of the pixel circuit is improved.
Further, the pixel circuit further includes a sixth switching transistor connected between a reference voltage input terminal and the anode of the light emitting device, the sixth switching transistor being configured to be turned on under control of the first scan signal to transmit a reference voltage to the anode of the light emitting device; a channel length of the first switching transistor is greater than a channel length of the sixth switching transistor; the channel width of the first switching transistor is greater than the channel width of the sixth switching transistor. Since the influence of the drain current of the sixth switching transistor on the light emitting device is small similarly to the second switching transistor and the third switching transistor, the channel width-to-length ratio of the sixth switching transistor may be set to be equal to the channel width-to-length ratio of the second switching transistor (third switching transistor), the channel length of the first switching transistor may be set to be larger than the channel length of the sixth switching transistor, and the channel width of the first switching transistor may be larger than the channel width of the sixth switching transistor. Thus, on one hand, the width-to-length ratio of the first switching transistor can be reduced, and the leakage current of the first switching transistor can be reduced; on the other hand, the channel length and the width of the sixth switching transistor are small, so that the size of the pixel circuit is reduced, the wiring of the pixel circuit is facilitated on the one hand, and the resolution of the display panel is improved on the other hand.
Correspondingly, the utility model also provides a display panel, include: be the light emitting device that the array was arranged and like the utility model discloses arbitrary embodiment the pixel circuit, the pixel circuit with the light emitting device electricity is connected, the pixel circuit is used for providing drive current to the light emitting device that corresponds.
The embodiment of the utility model provides a through setting up the channel length that the channel length of first switch transistor is greater than the channel length of second switch transistor and third switch tube; the range of the channel length of the first switch transistor is 3-4 um, and on the first hand, the phenomenon that the channel length of the first switch transistor is too large to affect the current conduction capability is avoided, and meanwhile, the leakage current of the first switch transistor in a subthreshold region is reduced, so that the leakage current of the driving transistor in a non-data writing stage is reduced, the brightness stability of a light-emitting device is improved, the performance of a pixel circuit is improved, and the phenomena of poor display such as a black cluster phenomenon of a display panel are improved; in a second aspect, when the channel length of the first switch transistor is small, the first switch transistor may be turned on in advance, and the embodiment of the present invention sets the channel length of the first switch transistor to be not less than 3um, which can effectively prevent the first switch transistor from being turned on in advance, thereby avoiding the first switch transistor from generating leakage current before being turned on, and improving the stability of the pixel circuit; third aspect, the embodiment of the present invention is applicable to the case where the refresh frequency of the display panel is lower, and the occurrence probability of the black cluster phenomenon can be reduced under the great case of the storage capacitor. Therefore, the embodiment of the utility model provides a on the basis of saving the consumption, be favorable to emitting device to stabilize luminous, display panel has good image quality. In the fourth aspect, the channel length of the first switch transistor is not greater than 4um, so that the first switch transistor is ensured to have smaller size, the occupied area of the pixel circuit is reduced, the pixel area is reduced, and the resolution is improved.
Drawings
Fig. 1 is a schematic circuit diagram of a pixel circuit according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a driving timing sequence of a pixel circuit according to an embodiment of the present invention;
fig. 3 is a schematic circuit diagram of a display panel according to an embodiment of the present invention;
fig. 4 is a circuit schematic diagram of another pixel circuit according to an embodiment of the present invention;
fig. 5 is a circuit schematic diagram of another pixel circuit according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Fig. 1 is a circuit schematic diagram of a pixel circuit according to an embodiment of the present invention, referring to fig. 1, the pixel circuit includes a driving transistor MD, a first switching transistor M1, a second switching transistor M2, a third switching transistor M3, a fourth switching transistor M4, a fifth switching transistor M5 and a storage capacitor Cst for driving a light emitting device O L ED to emit light, the storage capacitor Cst is connected between a first power input terminal VDD and a gate of the driving transistor MD, the storage capacitor Cst is used for storing a driving voltage of the gate of the driving transistor MD, the first switching transistor M1 is connected between a DATA signal input terminal DATA and a first electrode of the driving transistor MD, the first switching transistor M1 is used for being turned on under the control of a first scanning signal, a DATA signal is applied to the first electrode of the driving transistor MD, the second switching transistor M2 is connected between the first power input terminal DATA and the driving transistor MD, the second switching transistor M2 is used for being turned on under the control of a light emitting signal, the driving transistor M5885 is connected between the first power input terminal DATA signal and the driving transistor MD, the driving transistor MD is connected between the driving transistor MD 6326, the driving transistor MD is used for controlling a DATA signal, the driving transistor MD is connected between the driving transistor MD, the driving transistor M638 and the driving transistor MD is connected between the driving transistor MD and the driving transistor MD, the driving transistor MD is used for controlling the driving transistor MD is connected to transmit a driving transistor MD switch for transmitting a DATA signal, the driving transistor MD switch voltage, the driving transistor MD switch.
Here, the first switching transistor M1 is also referred to as a data writing transistor, the second switching transistor M2 and the third switching transistor M3 are also referred to as light emission control transistors, the fourth switching transistor M4 is also referred to as a correcting transistor, and the fifth switching transistor M5 is also referred to as an initializing transistor. The channel length of the first switching transistor M1 is greater than the channel lengths of the second switching transistor M2 and the third switching transistor M3; the channel length of the first switching transistor M1 ranges from 3um to 4 um. That is, the width-to-length ratio of the first switching transistor M1 is smaller than the width-to-length ratios of the second switching transistor M2 and the third switching transistor M3. Optionally, the channel length of the first switching transistor M1 is 3um, 3.2um, 3.4um, 3.5um, 3.7um, 3.8um, or 4 um.
Compared with the prior art in which the channel lengths of the switching transistors are equal, the embodiment of the invention is arranged in such a way that, on one hand, the leakage current of the driving transistor MD at the non-data writing stage can be reduced, thereby improving the performance of the pixel circuit; on the other hand, it is avoided that the channel length of the first switching transistor M1 is too large to affect the current conduction capability. The specific analysis is as follows:
fig. 2 is a schematic diagram of a driving timing sequence of a pixel circuit according to an embodiment of the present invention. Referring to fig. 2, the driving timing of the pixel circuit illustratively includes a first stage T1, a second stage T2, and a third stage T3.
In the first stage T1, also referred to as an initialization stage, the second scan signal input terminal S2 inputs the second scan signal Vs2, the second scan signal Vs2 controls the fifth switching transistor M5 to be turned on, the reference voltage is written into the gate of the driving transistor MD through the fifth switching transistor M5, and the gate of the driving transistor MD is initialized to ensure that the driving transistor MD is in a conducting state in the second stage T2.
In the second stage T2, also referred to as a data writing stage, the first scan signal input terminal S1 inputs the first scan signal Vs1, the first scan signal Vs1 controls the first switching transistor M1 and the fourth switching transistor M4 to be turned on, and the data voltage Vdata is written into the gate of the driving transistor MD sequentially through the first switching transistor M1, the driving transistor MD, and the fourth switching transistor M4; the data voltage Vdata charges the storage capacitor Cst. At this time, the voltage of the storage capacitor Cst is a superposition of the data voltage Vdata and the threshold voltage Vth of the driving transistor MD, that is, Vg is Vdata + Vth. The storage capacitor Cst stores the potential Vdata + Vth of the gate of the driving transistor MD.
In the third stage T3, also called as the light emitting stage, the light emitting control input terminal EM inputs the light emitting control signal Vem, and the light emitting control signal Vem controls the second switching transistor M2 and the third switching transistor M3 to be turned on, so that the driving transistor MD generates the driving current to drive the light emitting device O L ED to emit light.
Ids＝k(Vg-Vs-Vth)2＝k(Vdata+Vth-VDD-Vth)2
＝k(Vdata-VDD)2
In the formula, Ids is a driving current generated by the driving transistor MD; k is a parameter coefficient of the driving transistor MD, and the size of k can be regarded as a constant value for the same driving transistor MD; vg is the gate voltage of the driving transistor MD, and Vs is the source voltage of the driving transistor MD.
However, in the third stage T3, because the first switching transistor M1 has a leakage current, other DATA signal values at the DATA signal input terminal DATA may be transmitted to the gate of the driving transistor MD through the first switching transistor M1 and the driving transistor MD and the fourth switching transistor M4, so as to change the gate voltage value of the driving transistor MD, which affects the driving effect of the pixel circuit, and the luminance of the light emitting device is unstable, which makes the performance of the pixel circuit poor.
Next, the reason why the first switching transistor M1 generates the leakage current is analyzed from the viewpoint of the overall display driving of the display panel.
Fig. 3 is a schematic circuit diagram of a display panel according to an embodiment of the present invention. Referring to fig. 3, the display panel includes a plurality of first scan lines 10, a plurality of second scan lines 20, a plurality of data lines 30, and a plurality of pixel circuits 40. The first scan signal input terminals of the pixel circuits 40 in one row are electrically connected to the same first scan line 10, the second scan signal input terminals of the pixel circuits 40 in one row are electrically connected to the same second scan line 20, and the data signal input terminals of the pixel circuits 40 in one column are connected to the same data line 30. The plurality of first scan lines 10 and the plurality of second scan lines 20 are supplied with scan signals from the gate driving module 50, and the plurality of data lines 30 are supplied with data signals from the source driving module 60. Illustratively, the driving method of the display panel is that the gate driving module 50 generates the first scan signal Vs1 and the second scan signal Vs2 for row gate; the source driving module 60 generates a data signal, the pixel circuit 40 receives the data signal sent by the source driving module 60 through the corresponding data line 30, and the display panel accordingly achieves a display function. It should be noted that the first scan signal Vs1 for the pixel circuits in the current row and the second scan signal Vs2 for the pixel circuits in the next row may be the same scan signal.
When the first row of pixels are strobed, the data lines 30 write the data signals corresponding to the first row of pixels into the first row of pixel circuits 40; then, when the second row of pixels is strobed, the data lines 30 write the data signals corresponding to the second row of pixels to the second row of pixel circuits 40 again, and so on. When the first row of pixel circuits is in the third phase T3, the data voltages on the data lines 30 have been switched to the data voltages corresponding to the second row of pixels. Taking the driving transistor MD as a P-type transistor for example, the black state (black picture) data voltage is higher than the bright state (white picture) data voltage. If the first row of pixels displays a bright state, the second row of pixels displays a black state, and the first switching transistor M1 has a large off-state leakage current, in the third stage T3, due to the off-state leakage of the first switching transistor M1 of the first row of pixel circuit 40, the black-state voltage corresponding to the second row of pixels on the data line 30 passes through the first switching transistor M1 of the first row of pixel circuit 40 and passes through the driving transistor MD and the fourth switching transistor M4 to transmit the black-state voltage of the second row of pixels to the first row of pixel circuit 40, so that the gate voltage of the driving transistor MD of the first row of pixel circuit 40 is increased, the light-emitting luminance of the light-emitting device is decreased, and a phenomenon of poor display, such as a black-cluster phenomenon, is generated.
The inventors have found that, when the first switching transistor M1 generates a leakage current, it is in the sub-threshold region (Vgs ≈ 0V), where the current of the first switching transistor M1 is expressed by the following formula:
therefore, the embodiment of the present invention reduces the leakage current of the driving transistor MD at the non-data writing stage, thereby improving the luminance stability of the light emitting device O L ED, improving the performance of the pixel circuit, and improving the phenomena of poor display such as the black cluster phenomenon of the display panel.
In addition, in order to save power consumption, the refresh operation of the display panel may be compatible with a plurality of frequencies. When the refresh frequency is lowered, in order to reduce the leakage of the storage capacitor Cst, the leakage of the driving transistor MD may be reduced by increasing the capacitance value of the storage capacitor Cst. However, the increase of the storage capacitor Cst increases the writing time of the data signal, thereby aggravating the leakage of the first switching transistor M1, further deteriorating the display effect of the display panel, and further aggravating the black cloud phenomenon. The embodiment of the utility model provides a can be at low refresh frequency, and storage capacitor Cst under the great condition, reduce the emergence probability of black group phenomenon. Therefore, the embodiment of the utility model provides a can compromise pixel circuit's low-power consumption and high stability.
Furthermore, when the channel length of the first switch transistor M1 is small, the first switch transistor M1 may turn on early, and therefore, the channel length of the first switch transistor M1 is not less than 3 um. The embodiment of the utility model provides a can prevent effectively that first switch transistor M1 from opening in advance to avoided first switch transistor M1 turn-off nature not good and had great leakage current, promoted pixel circuit's stability. On the other hand, the channel length of the first switch transistor M1 is not greater than 4um, so that the influence on the driving capability due to the overlarge channel length of the first switch transistor M1 is avoided, and the phenomenon that the pixel circuit area is overlarge and the realization of high resolution is not facilitated due to the overlarge size of M1 is also avoided.
It should be noted that, in the above embodiments, it is exemplarily shown that one end of the driving transistor MD connected to the first power input terminal VDD is referred to as a source, and one end of the driving transistor MD connected to the light emitting device O L ED is referred to as a drain, which is not a limitation of the present invention.
On the basis of the above embodiments, optionally, the channel width of the first switching transistor M1 is larger than the channel widths of the second switching transistor M2 and the third switching transistor M3. Among them, the larger the channel width is, the stronger the driving capability is. In the embodiment of the invention, the channel width of the first switch transistor M1 is set to be larger than the channel widths of the second switch transistor M2 and the third switch transistor M3, which is beneficial to improving the driving capability of the first switch transistor M1 and improving the working speed of the circuit.
Optionally, the channel width of the first switching transistor M1 ranges from 2.2um to 3um, which is advantageous to ensure strong driving capability of the first switching transistor M1 and to set the width-to-length ratio of the first switching transistor M1 smaller than the width-to-length ratio of the second switching transistor M2 and the third switching transistor M3, thereby suppressing the leakage current of the first switching transistor M1. Alternatively, the channel width of the first switching transistor M1 may be set to 2.2um, 2.3um, 2.5um, 2.8um, 2.9um, or 3 um.
On the basis of the above embodiments, optionally, the channel lengths of the second switching transistor M2 and the third switching transistor M3 range from: 2.2um to 3.2 um; the channel length of the first switching transistor M1 ranges from: 3um to 4 um. Illustratively, the channel lengths of the second and third switching transistors M2 and M3 are 2.5um, and the channel length of the first switching transistor M1 is 3 um; or the channel lengths of the second switching transistor M2 and the third switching transistor M3 are 3um, and the channel length of the first switching transistor M1 is 3.5 um; alternatively, the channel lengths of the second switching transistor M2 and the third switching transistor M3 are 3.2um, and the channel length of the first switching transistor M1 is 4 um. The embodiment of the utility model provides a set up like this for the optional channel length of first switch transistor M1 is greater than the optional channel length of second switch transistor M2 and third switch transistor M3, is favorable to setting up the channel length of first switch transistor M1 and is greater than the channel length of second switch transistor M2 and third switch transistor M3.
On the basis of the above embodiments, optionally, the width-to-length ratio of the second switching transistor M2 and the third switching transistor M3 ranges from: 0.7 to 1; the range of the width-to-length ratio of the first switching transistor M1 is: 0.6 to 1. Illustratively, the width-to-length ratio of the second switching transistor M2 and the third switching transistor M3 is 0.7, and the width-to-length ratio of the first switching transistor M1 is 0.6; alternatively, the width-to-length ratio of the second switching transistor M2 and the third switching transistor M3 is 0.8, and the width-to-length ratio of the first switching transistor M1 is 0.7; alternatively, the width-to-length ratio of the second switching transistor M2 and the third switching transistor M3 is 1, and the width-to-length ratio of the first switching transistor M1 is 0.9. The embodiment of the utility model provides a set up like this for the optional width-length ratio of first switch transistor M1 is less than the optional width-length ratio of second switch transistor M2 and third switch transistor M3, is favorable to setting up the width-length ratio of first switch transistor M1 and is less than the width-length ratio of second switch transistor M2 and third switch transistor M3.
Fig. 4 is a schematic circuit diagram of another pixel circuit according to an embodiment of the present invention, referring to fig. 4, based on the above embodiments, optionally, the first switch transistor M1 is a double-gate transistor, wherein, compared with a single-gate transistor, the channel length of the double-gate transistor is longer, and the leakage current of the first switch transistor M1 at the non-data writing stage can be reduced, so as to improve the luminance stability of the light emitting device O L ED, improve the performance of the pixel circuit, and improve the phenomenon of poor display such as the black cluster phenomenon of the display panel.
With continued reference to fig. 4, based on the above embodiments, optionally, the fourth switching transistor M4 is a double-gate transistor, wherein, compared with a single-gate transistor, the channel length of the double-gate transistor is longer, which can reduce the leakage current, thereby reducing the leakage current of the storage capacitor Cst through the fourth switching transistor M4, improving the luminance stability of the light emitting device O L ED, and improving the performance of the pixel circuit.
With continued reference to fig. 4, based on the above embodiments, optionally, the fifth switching transistor M5 is a double-gate transistor, wherein, compared with a single-gate transistor, the channel length of the double-gate transistor is longer, which can reduce the leakage current, thereby maintaining the voltage stored in the storage capacitor Cst, improving the brightness stability of the light emitting device O L ED, and improving the performance of the pixel circuit.
With continued reference to fig. 5, based on the above embodiments, the pixel circuit further includes a sixth switching transistor M6, the sixth switching transistor M6 is connected between the reference voltage input terminal Vref and the anode of the light emitting device O L ED, the sixth switching transistor M6 is used for conducting under the control of the third scan signal to transmit the reference voltage to the anode of the light emitting device O L ED, the channel length of the first switching transistor M1 is greater than the channel length of the sixth switching transistor M6, the channel width of the first switching transistor M1 is greater than the channel width of the sixth switching transistor M6, wherein the sixth switching transistor is also referred to as an initialization transistor, and since the channel length of the sixth switching transistor M6384 is similar to the channel length of the second switching transistor M2 and the channel length of the third switching transistor M3, the leakage current of the sixth switching transistor M6 has less influence on the light emitting device O L, and therefore, the resolution of the sixth switching transistor M6 can be set to be smaller than the channel length of the first switching transistor M469, which is advantageous for increasing the pixel circuit length of the first switching transistor M6 and for the pixel circuit.
To sum up, the embodiment of the present invention provides a channel length of a first switch transistor M1 is greater than channel lengths of a second switch transistor M2 and a third switch transistor M3, the channel length of the first switch transistor M1 ranges from 3um to 4um, in a first aspect, the channel length of the first switch transistor M1 is too large to affect current conduction capability, and meanwhile, a leakage current of the first switch transistor M1 in a subthreshold region is reduced, thereby reducing a leakage current of a driving transistor MD in a non-data writing stage, the brightness stability of a light emitting device O L ED is improved, the performance of a pixel circuit is improved, a phenomenon of bad display such as a black cluster phenomenon of a display panel is improved.
The embodiment of the utility model provides a display panel is still provided. This display panel including be the light emitting device that the array was arranged and if the utility model discloses the pixel circuit that the arbitrary embodiment provided, pixel circuit is connected with the light emitting device electricity, and pixel circuit is used for providing drive current to the light emitting device who corresponds. The embodiment of the utility model provides a display panel includes the utility model discloses the pixel circuit that arbitrary embodiment provided, its technical principle is similar with the effect that produces, and it is no longer repeated here.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail with reference to the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the scope of the present invention.
Claims (10)
1. A pixel circuit, comprising:
a driving transistor for driving the light emitting device to emit light;
the storage capacitor is connected between a first power supply input end and the grid electrode of the driving transistor and is used for storing the voltage of the grid electrode of the driving transistor;
a first switching transistor connected between a data signal input terminal and a first pole of the driving transistor, the first switching transistor being adapted to be turned on under control of a first scan signal to apply a data signal to the first pole of the driving transistor;
a second switching transistor connected between the first power input terminal and the driving transistor; the second switch transistor is used for conducting under the control of a light-emitting control signal and applying a first power supply to the first pole of the driving transistor;
a third switching transistor connected between the driving transistor and the light emitting device; the third switching transistor is used for conducting under the control of a light-emitting control signal and conducting the driving current of the driving transistor to the light-emitting device;
a fourth switching transistor connected between the second pole and the gate of the driving transistor; the first switching transistor and the fourth switching transistor are used for conducting under the control of a first scanning signal, and writing the corrected data signal into the grid electrode of the driving transistor;
a fifth switching transistor connected between a reference voltage input terminal and a gate of the driving transistor; the fifth switching transistor is used for conducting under the control of a second scanning signal and transmitting a reference voltage to the grid electrode of the driving transistor;
wherein the channel length of the first switching transistor is greater than the channel lengths of the second switching transistor and the third switching tube; the channel length of the first switch transistor ranges from 3um to 4 um.
2. The pixel circuit according to claim 1, wherein a channel width of the first switching transistor is larger than channel widths of the second switching transistor and the third switching transistor.
3. The pixel circuit according to claim 2, wherein a channel width of the first switching transistor ranges from 2.2um to 3 um.
4. The pixel circuit according to claim 1, wherein a width-to-length ratio of the first switching transistor is smaller than a width-to-length ratio of the second switching transistor and the third switching transistor.
5. The pixel circuit according to claim 1, wherein the channel lengths of the second switching transistor and the third switching transistor in the pixel circuit range from 2.2um to 3.2 um.
6. The pixel circuit according to claim 1, wherein the width-to-length ratio of the second switching transistor to the third switching transistor is in a range of 0.7 to 1;
the width-to-length ratio of the first switching transistor ranges from 0.6 to 1.
7. The pixel circuit according to claim 1, wherein the first switch transistor is a double gate transistor.
8. The pixel circuit according to claim 1, wherein the fourth switching transistor and the fifth switching transistor are both double-gate transistors.
9. The pixel circuit according to claim 1, further comprising: a sixth switching transistor connected between a reference voltage input terminal and the anode of the light emitting device, the sixth switching transistor being configured to turn on under control of a first scan signal to transmit a reference voltage to the anode of the light emitting device; a channel length of the first switching transistor is greater than a channel length of the sixth switching transistor; the channel width of the first switching transistor is greater than the channel width of the sixth switching transistor.
10. A display panel, comprising: light emitting devices arranged in an array and a pixel circuit according to any of claims 1 to 9, the pixel circuit being electrically connected to the light emitting devices, the pixel circuit being adapted to provide a drive current to the corresponding light emitting device.
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| CN202020112152.1U CN211062442U (en) | 2020-01-17 | 2020-01-17 | Pixel circuit and display panel |
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| CN202020112152.1U CN211062442U (en) | 2020-01-17 | 2020-01-17 | Pixel circuit and display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112365849A (en) * | 2020-12-03 | 2021-02-12 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit and display panel |
| CN112365843A (en) * | 2020-12-09 | 2021-02-12 | 上海天马有机发光显示技术有限公司 | Pixel driving circuit and driving method thereof, display panel and device |
| CN112397030A (en) * | 2020-11-17 | 2021-02-23 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit and OLED display panel |
| CN113409728A (en) * | 2021-06-10 | 2021-09-17 | 京东方科技集团股份有限公司 | Driving circuit and driving method of screen pixels and display panel |
| CN113725274A (en) * | 2021-09-03 | 2021-11-30 | 成都京东方光电科技有限公司 | Pixel circuit, display panel and display device |
| CN114120907A (en) * | 2021-12-02 | 2022-03-01 | 合肥维信诺科技有限公司 | Pixel circuit, display device and driving method thereof |
| CN115023756A (en) * | 2021-07-30 | 2022-09-06 | 京东方科技集团股份有限公司 | Pixel driving circuit, driving method thereof and display panel |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112397030A (en) * | 2020-11-17 | 2021-02-23 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit and OLED display panel |
| CN112365849A (en) * | 2020-12-03 | 2021-02-12 | 武汉华星光电半导体显示技术有限公司 | Pixel driving circuit and display panel |
| CN112365843A (en) * | 2020-12-09 | 2021-02-12 | 上海天马有机发光显示技术有限公司 | Pixel driving circuit and driving method thereof, display panel and device |
| CN113409728A (en) * | 2021-06-10 | 2021-09-17 | 京东方科技集团股份有限公司 | Driving circuit and driving method of screen pixels and display panel |
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| CN113725274A (en) * | 2021-09-03 | 2021-11-30 | 成都京东方光电科技有限公司 | Pixel circuit, display panel and display device |
| CN114120907A (en) * | 2021-12-02 | 2022-03-01 | 合肥维信诺科技有限公司 | Pixel circuit, display device and driving method thereof |
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