CN112509518A - Pixel circuit, driving method thereof and display panel - Google Patents

Pixel circuit, driving method thereof and display panel Download PDF

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Publication number
CN112509518A
CN112509518A CN202011364846.5A CN202011364846A CN112509518A CN 112509518 A CN112509518 A CN 112509518A CN 202011364846 A CN202011364846 A CN 202011364846A CN 112509518 A CN112509518 A CN 112509518A
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transistor
signal
pole
driving transistor
pixel circuit
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李蒙
田汝强
胡祖权
刘权
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Hefei Visionox Technology Co Ltd
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Hefei Visionox Technology Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

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  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

The embodiment of the invention discloses a pixel circuit, a driving method thereof and a display panel. The pixel circuit includes: the compensation module is used for writing an initialization signal into the grid electrode of the driving transistor in an initialization stage and sequentially writing a power supply signal into the first pole, the second pole and the grid electrode of the driving transistor in a compensation stage; the data transmission module is used for writing a reference voltage signal into the coupling input end in a compensation stage and establishing constant voltage difference between the coupling input end and the coupling output end; and in the data writing phase, writing a data signal into the coupling input end and coupling the data signal to the grid electrode of the driving transistor by constant voltage difference. Compared with the prior art, the embodiment of the invention improves the display uniformity of the display panel and improves the display image quality.

Description

Pixel circuit, driving method thereof and display panel
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a pixel circuit, a driving method thereof and a display panel.
Background
With the continuous development of display technology, the application range of display panels is wider and wider, and the requirements of people on the display panels are higher and higher. In particular, the display quality of the display panel is always one of the important indicators for the quality of the display panel for consumers and panel manufacturers. However, the conventional display panel has a problem of poor display uniformity, which affects improvement of display image quality of the display panel.
Disclosure of Invention
The embodiment of the invention provides a pixel circuit, a driving method thereof and a display panel, which are used for improving the display uniformity of the display panel and improving the display image quality.
In order to achieve the technical purpose, the embodiment of the invention provides the following technical scheme:
a pixel circuit, comprising:
a driving transistor for generating a driving current in response to a data signal and a power signal to drive the light emitting device to emit light;
the compensation module comprises an initial input end, a first connecting end and a second connecting end, wherein the initial input end is connected with an initialization signal, the first connecting end is electrically connected with the second pole of the driving transistor, and the second connecting end is electrically connected with the grid electrode of the driving transistor; the compensation module is used for writing the initialization signal into the grid electrode of the driving transistor in an initialization stage and sequentially writing the power supply signal into the first pole, the second pole and the grid electrode of the driving transistor in a compensation stage;
the coupling module comprises a coupling input end and a coupling output end, the coupling input end is electrically connected with the data transmission module, and the coupling output end is electrically connected with the grid electrode of the driving transistor; the data transmission module is used for writing a reference voltage signal into the coupling input end in the compensation stage and establishing a constant voltage difference between the coupling input end and the coupling output end; and in a data writing phase, writing the data signal into the coupling input end and coupling the data signal to the grid electrode of the driving transistor by the constant voltage difference.
Optionally, the compensation module comprises:
a first transistor, a gate of which is connected to a first scan signal, a first pole of which is electrically connected to a second pole of the driving transistor, and a second pole of which is electrically connected to the gate of the driving transistor;
a second transistor, a gate of which is connected to a second scan signal, a first pole of which is connected to the initialization signal, and a second pole of which is electrically connected to the second pole of the driving transistor;
optionally, the driving transistor is a P-type transistor, and the first transistor and the second transistor are both N-type transistors;
or, the driving transistor, the first transistor and the second transistor are all P-type transistors.
Optionally, the first scan signal of the pixel circuit of the previous stage is multiplexed into the second scan signal of the pixel circuit of the next stage.
Optionally, the coupling module comprises a first capacitor;
the data transmission module comprises a third transistor and a fourth transistor; a grid electrode of the third transistor is connected with a first scanning signal, a first pole of the third transistor is connected with the reference voltage signal, and a second pole of the third transistor is electrically connected with a first end of the first capacitor; a gate of the fourth transistor is connected to a third scanning signal, a first pole of the fourth transistor is connected to the data signal, and a second pole of the fourth transistor is electrically connected to the first end of the first capacitor; the second end of the first capacitor is electrically connected with the grid electrode of the driving transistor;
optionally, the third transistor is an N-type transistor, and the fourth transistor is a P-type transistor;
alternatively, the third transistor and the fourth transistor are P-type transistors.
Optionally, the pixel circuit further comprises:
the storage module is used for storing the grid potential of the driving transistor;
optionally, the memory module includes a second capacitor, a first pole of the second capacitor is electrically connected to the power signal; and the second pole of the second capacitor is electrically connected with the coupling input end of the coupling module.
Optionally, the pixel circuit further comprises:
the first light-emitting control module is used for conducting a conducting path between the driving transistor and the light-emitting device in a light-emitting stage;
optionally, the first light emitting control module includes a fifth transistor, a gate of the fifth transistor is connected to the first light emitting control signal, a first pole of the fifth transistor is electrically connected to the second pole of the driving transistor, and a second pole of the fifth transistor is electrically connected to the light emitting device;
optionally, the first lighting control module is further configured to, in the initialization stage, turn on a conduction path between the initialization signal and the lighting device;
optionally, the fifth transistor is a P-type transistor or an N-type transistor.
Optionally, the pixel circuit further comprises:
the second light-emitting control module is used for conducting a conducting path between the power supply signal and the driving transistor in the compensation stage and the light-emitting stage;
optionally, the second light emitting control module includes a sixth transistor, a gate of the sixth transistor is connected to the second light emitting control signal, a first pole of the sixth transistor is connected to the power signal, and a second pole of the sixth transistor is electrically connected to the first pole of the driving transistor;
optionally, the sixth transistor is a P-type transistor or an N-type transistor.
Optionally, the reference voltage signal is multiplexed into the initialization signal.
Accordingly, the present invention also provides a display panel comprising: a pixel circuit as claimed in any embodiment of the invention.
Correspondingly, the present invention further provides a driving method of a pixel circuit, where the pixel circuit provided in any embodiment of the present invention can be adopted, and the driving method includes:
in the initialization stage, the compensation module writes the initialization signal into the grid electrode of the driving transistor;
in the compensation stage, the compensation module conducts the second pole and the grid of the driving transistor so as to enable the power supply signal to be written into the first pole, the second pole and the grid of the driving transistor in sequence; the data transmission module writes a reference voltage signal into a coupling input end of the coupling module and establishes a constant voltage difference between the coupling input end and the coupling output end;
in the data writing stage, the data transmission module writes a data signal into a coupling input end of the coupling module and couples the data signal to the grid electrode of the driving transistor by the constant voltage difference;
and the driving transistor responds to the data signal and the power supply signal to generate a driving current to drive the light-emitting device to emit light.
The embodiment of the invention sets the compensation module, the coupling module and the data transmission module to be matched with each other, wherein the compensation module is used for writing an initialization signal into the grid electrode of the driving transistor in the initialization stage and sequentially writing a power supply signal into the first pole, the second pole and the grid electrode of the driving transistor in the compensation stage; the data transmission module is used for writing a reference voltage signal into the coupling input end in a compensation stage and establishing a constant voltage difference between the coupling input end and the coupling output end; and in the data writing phase, writing a data signal into the coupling input end and coupling the data signal to the grid electrode of the driving transistor by constant voltage difference. The gate voltage of the driving transistor is made to contain not only the threshold voltage but also the power supply signal, thereby eliminating the power supply signal and the threshold voltage in the driving current formula. The driving current is only related to the data signal and the reference voltage signal, the compensation of the threshold voltage and the power signal is realized, the influence of the voltage drop of the power signal on the driving current is avoided, the display uniformity of the display panel is improved, the display image quality is improved, and particularly, the effect of improving the display uniformity of the display panel with medium and large sizes is more obvious.
Drawings
Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a driving timing sequence of a pixel circuit according to an embodiment of the invention;
fig. 6 is a simulation diagram of a pixel circuit according to an embodiment of the present invention;
fig. 7 is a signal connection diagram of a pixel circuit according to an embodiment of the invention;
fig. 8 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
fig. 10 is a flowchart illustrating a driving method of a pixel driving circuit according to an embodiment of the invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As described in the background art, the conventional display panel has a problem of poor display uniformity, and the reason for the problem is as follows:
in the conventional pixel circuit, the driving transistor operates in a saturation region when driving the light emitting device to emit light. In the saturation region, the drive current gradually becomes larger as the gate-source voltage increases. Let the gate voltage of the driving transistor be the voltage Vdata of the data signal, the source voltage of the driving transistor be the power signal VDD, and then the driving current Id generated by the driving transistor is:
Figure BDA0002805111180000061
wherein W is the channel width, L is the channel length, μeffFor electron mobility, CoxVth is the threshold voltage, which is the unit area channel capacitance. Wherein the threshold voltage Vth is greatly influenced by process fluctuation, and the same gate-source voltage uGSDifferent driving currents Id may be generated; the voltage drop (IR drop) of the power supply signal VDD exists during the transmission process, and the voltage drop of the power supply signal VDD is more serious as the size of the display panel is increased, especially for the middle-sized and large-sized display panels. Therefore, the conventional display panel has a large difference of the driving current Id and a poor display uniformity along with the variation of the threshold voltage Vth and the power signal VDD.
The prior art employs threshold voltage compensation to eliminate the influence of threshold voltage on the driving current. Specifically, the structure of the 7T1C pixel circuit is adopted such that the gate voltage written into the driving transistor is Vdata + Vth in the stage before the light emission stage, and then the driving current Id generated by the driving transistor in the light emission stage is:
Figure BDA0002805111180000062
as can be seen from this, by performing threshold compensation on the gate voltage of the driving transistor, the influence of the threshold voltage Vth on the driving current Id can be eliminated. However, in the driving current formula, the power signal VDD is not compensated, and the driving current Id is still affected by the voltage drop of the power signal VDD. Therefore, the conventional display panel still has a problem of poor display uniformity.
In view of the above, embodiments of the present invention provide a pixel circuit. Fig. 1 is a schematic structural diagram of a pixel circuit according to an embodiment of the present invention. Referring to fig. 1, the pixel circuit includes a driving transistor DT, a compensation module 100, a coupling module 200, and a data transmission module 300. Illustratively, the driving process of the pixel circuit includes an initialization phase, a compensation phase, a data writing phase, and a light emitting phase.
The driving transistor DT is used for generating a driving current in response to the DATA signal DATA and the power signal VDD, and driving the light emitting device D1 to emit light. The driving transistor DT includes a gate electrode DT-1, a first electrode DT-2 and a second electrode DT-3, the gate electrode DT-1 of the driving transistor DT is named as a node G of the pixel circuit, the first electrode DT-2 of the driving transistor DT is commonly called a source electrode, and the second electrode DT-3 of the driving transistor DT is commonly called a drain electrode. Since the structures of the transistors are symmetrical in the display panel, a source and a drain of the transistor such as the driving transistor DT are not distinguished.
The compensation module 100 comprises an initial input end 101, a first connection end 102 and a second connection end 103, wherein the initial input end 101 is connected with an initialization signal Vinit, the first connection end 102 is electrically connected with a second pole DT-3 of the driving transistor DT, and the second connection end 103 is electrically connected with a gate DT-1 of the driving transistor DT. The compensation module 100 is configured to write an initialization signal Vinit to the gate DT-1 of the driving transistor DT during an initialization phase, and to write a power supply signal VDD to the first pole DT-2, the second pole DT-3 and the gate DT-1 of the driving transistor DT sequentially during a compensation phase. Optionally, the compensation module 100 further includes a first control terminal 104 and a second control terminal 105, the first control terminal 104 is connected to the first scan signal S1, the second control terminal 105 is connected to the second scan signal S2, and the first scan signal S1 and the second scan signal S2 are used for controlling the operating state of the compensation module 100.
The initialization signal Vinit is a signal for controlling the conduction of the driving transistor DT, and the initialization signal Vinit is written into the node G in the initialization phase, so that the driving transistor DT can be turned on, and the driving transistor DT is ensured to be in a conducting state at the start time of the compensation phase. For example, in the initialization phase, the initialization signal Vinit may be written into the node G by controlling the initial input terminal 101 to be conductive with the second connection terminal 103. In the compensation phase, the power signal VDD can be written into the node G through the turned-on driving transistor DT by controlling the first connection terminal 102 and the second connection terminal 103 to be turned on. At this time, since the driving transistor DT has the threshold voltage Vth, the voltage actually written into the node G is VDD + Vth.
The coupling module 200 includes a coupling input terminal 201 and a coupling output terminal 202, the coupling input terminal 201 is electrically connected to the data transmission module 300, and the coupling output terminal 202 is electrically connected to the gate DT-1 of the driving transistor DT. The coupling module 200 is used for maintaining a constant voltage difference between the coupling input terminal 201 and the coupling output terminal 202. The coupling input terminal 201 is named node a of the pixel circuit, and the coupling output terminal 202 is also named node G since the coupling output terminal 202 is electrically connected to the gate DT-1 (i.e., node B) of the driving transistor DT. The data transmission module 300 is configured to write a reference voltage signal Vref into the node a in the compensation stage, and establish a constant voltage difference between the node a and the node G; and writing the DATA signal DATA into the coupling input terminal 201 and coupling to the gate DT-1 of the driving transistor DT with a constant voltage difference in a DATA writing phase.
The DATA transmission module 300 includes a DATA terminal 301, a reference terminal 302 and an output terminal 303, the DATA terminal 301 of the DATA transmission module 300 is connected to the DATA signal DATA, the reference terminal 302 of the DATA transmission module 300 is connected to the reference voltage signal Vref, and the output terminal 303 of the DATA transmission module 300 is electrically connected to the coupling input terminal 201 of the coupling module 200. Optionally, the data transmission module 300 further includes a first control terminal 304 and a second control terminal 305, the first control terminal 304 is connected to the third scan signal S3, the second control terminal 305 is connected to the first scan signal S1, and the first scan signal S1 and the third scan signal S3 are used for controlling the operating state of the data transmission module 300.
Illustratively, in the compensation phase, the data terminal 301 and the output terminal 303 are controlled to be turned on, so as to control the reference voltage signal Vref to be written into the node a, at this time, the voltage of the node G is the power signal VDD, and the constant voltage difference between the node a and the node G is established to be Vref-VDD-Vth. In the DATA writing stage, the DATA signal DATA can be controlled to be written into the node A by controlling the DATA terminal 301 and the output terminal 303 to be conducted, and the voltage of the node G is Vdata-Vref + VDD + Vth due to the constant voltage difference between the node A and the node G. From another perspective, the voltage at node G during the data write phase is analyzed as follows: in the compensation stage, the voltage of the node A is Vref, and the voltage of the node G is VDD + Vth; in the data writing stage, the voltage of the node A is Vdata, the voltage variation is Vdata-Vref, and the voltage variation of the node G is also Vdata-Vref due to the constant voltage difference between the node A and the node G, and is changed into VDD + Vth + Vdata-Vref.
Then, in the light emitting phase, the driving transistor DT generates the driving current Id as:
Figure BDA0002805111180000091
therefore, the driving current Id generated by the pixel circuit provided by the embodiment of the invention is not related to the power signal VDD and the threshold voltage of the driving transistor DT, but is related to the DATA signal DATA and the reference voltage signal Vref, so that the compensation of the threshold voltage and the power signal VDD is realized, the driving current Id is favorably prevented from being influenced by the voltage drop of the power signal VDD, the display uniformity of the display panel is improved, the display image quality is improved, and the effect of improving the display uniformity is more obvious particularly for the display panel with medium or large size.
In the above embodiments, there are various arrangements of the compensation module 100, the coupling module 200 and the data transmission module 300, and several arrangements thereof will be described below, but the invention is not limited thereto.
Fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention. Referring to fig. 2, in one embodiment of the present invention, the compensation module 100 optionally includes: a first transistor T1 and a second transistor T2. The gate of the first transistor T1 is connected to the first scan signal S1, the first pole of the first transistor T1 is electrically connected to the second pole DT-3 of the driving transistor DT, and the second pole of the first transistor T1 is electrically connected to the gate DT-1 of the driving transistor DT. The gate of the second transistor T2 is connected to the second scan signal S2, the first pole of the second transistor T2 is connected to the initialization signal Vinit, and the second pole of the second transistor T2 is electrically connected to the second pole DT-3 of the driving transistor DT.
The first transistor T1 is configured to be turned on in an initialization phase under the control of the first scan signal S1; the second transistor T2 is used for being turned on in the initialization phase under the control of the second scan signal S2. Thus, in the initialization stage, the initialization signal Vinit is written into the node G through the turned-on second transistor T2 and the turned-on first transistor T1 in order to turn on the driving transistor DT at the initial timing of the next compensation stage. The first transistor T1 is also used to turn on in the compensation phase under the control of the first scan signal S1, so that the power signal VDD is written into the node G through the turned-on driving transistor DT, and the voltage of the node G is VDD + Vth.
Fig. 3 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 3, in one embodiment of the present invention, optionally, the coupling module 200 includes a first capacitor C1; the data transmission module 300 includes a third transistor T3 and a fourth transistor T4; a gate of the third transistor T3 is coupled to the first scan signal S1, a first pole of the third transistor T3 is coupled to the reference voltage signal Vref, and a second pole of the third transistor T3 is electrically coupled to the first end of the first capacitor C1; a gate of the fourth transistor T4 is connected to the third scan signal S3, a first pole of the fourth transistor T4 is connected to the DATA signal DATA, and a second pole of the fourth transistor T4 is electrically connected to the first end of the first capacitor C1; the second terminal of the first capacitor C1 is electrically connected to the gate of the driving transistor DT.
The third transistor T3 is turned on during the compensation phase under the control of the first scan signal S1 to write the reference voltage signal Vref into the node a. Meanwhile, in the compensation phase, the voltage of the node G is VDD + Vth. The first capacitor C1 has a coupling effect, i.e., the first capacitor C1 has a voltage holding effect, and can maintain the voltage difference between the node a and the node G constant during the data writing phase when the node G is floating (i.e., the node G has no additional data writing). The fourth transistor T4 is turned on during the DATA writing period under the control of the third scan signal S3 to write the DATA signal DATA into the node a. The voltage of the node G is changed from VDD + Vth to VDD + Vth + Vdata-Vref in view of the constant voltage difference between the node A and the node G.
In an embodiment of the invention, in combination with fig. 1 to fig. 3, the pixel circuit optionally further includes a storage module 400, and the storage module 400 is used for storing the gate potential of the driving transistor DT. The memory module 400 is connected between the power signal VDD and the node a, and is favorable for maintaining the voltage of the node a and the voltage of the node G constant during the light emitting period, thereby being favorable for the stability of the driving current generated by the driving transistor DT and the stable light emission of the light emitting device D1.
In an embodiment of the invention, in combination with fig. 1 to 3, the pixel circuit further includes a first light emitting control module 500 for turning on a conduction path between the driving transistor DT and the light emitting device D1 during a light emitting period. In the compensation phase and the data writing phase, in order to ensure that the light emitting device D1 does not emit light by mistake when the driving transistor DT is turned on, the first light emission control module 500 is connected in series between the light emitting device D1 and the driving transistor DT, and can control the first light emitting module to be turned on only in the light emission phase to form a circulation path of the driving current.
In an embodiment of the present invention, optionally, the first light emitting control module 500 is further configured to turn on a conduction path between the initialization signal Vinit and the light emitting device D1 in the initialization stage. In this way, the initialization signal Vinit may be transmitted to the light emitting device D1 through the compensation module 100 and the first light emission control module 500, thereby initializing the light emitting device D1 and relieving the bias voltage of the light emitting device D1.
Fig. 4 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 4, in one embodiment of the present invention, the memory module 400 optionally includes a second capacitor C2. A first pole of the second capacitor C2 is electrically connected to the power supply signal VDD; the second pole of the second capacitor C2 is electrically connected to the coupling input 201 of the coupling module 200. Similar to the first capacitor C1, the second capacitor C2 has the functions of storing electric energy and maintaining the voltage difference between the two ends of the electric energy unchanged, and the storage module 400 includes the second capacitor C2 according to the embodiment of the present invention, so that the circuit structure is simple and easy to implement.
With continued reference to fig. 4, in one embodiment of the present invention, optionally, the first lighting control module 500 includes a fifth transistor T5. A gate of the fifth transistor T5 is connected to the first emission control signal EM1, a first pole of the fifth transistor T5 is electrically connected to the second pole of the driving transistor DT, and a second pole of the fifth transistor T5 is electrically connected to the light emitting device D1. The fifth transistor T5 is turned on in the initialization stage under the control of the first light emission control signal EM1, so that the initialization signal Vinit is written into the light emitting device D1 through the turned-on second transistor T2 and the fifth transistor T5 in sequence; and, turned on in the light emitting stage to pass the driving current through the turned-on driving transistor DT and the fifth transistor T5 in order, driving the light emitting device D1 to emit light.
With continued reference to fig. 4, in one embodiment of the present invention, optionally, the driving transistor DT is a P-type transistor, the first transistor T1, the second transistor T2 and the third transistor T3 are all N-type transistors, and the fourth transistor T4 and the fifth transistor T5 are all P-type transistors. I.e. the pixel circuit is a hybrid transistor pixel circuit, such that the pixel circuit comprises three P-type transistors and three N-type transistors. The P-type transistor and the N-type transistor can be fabricated by Low Temperature Polycrystalline Oxide (LTPO) process. Specifically, the P-type transistor is a low-temperature polysilicon process and adopts a top gate structure; the N-type transistor is an oxide process and adopts a bottom gate structure. Therefore, the embodiment of the invention combines the advantages of strong driving capability of the low-temperature polysilicon process, small electric leakage of the oxide process and low power consumption, thereby being beneficial to improving the driving capability of the pixel circuit and simultaneously reducing the electric leakage and the power consumption.
In one embodiment of the present invention, the reference voltage signal Vref is optionally multiplexed into the initialization signal Vinit. This arrangement is advantageous in reducing the number of signal lines in the pixel circuit, thereby facilitating wiring design of the pixel circuit in the display panel.
On the basis of the above embodiments, in order to clearly explain the operation of the pixel circuit, the operation of the pixel circuit is explained below with reference to a driving timing of the pixel circuit. Fig. 5 is a schematic diagram of a driving timing sequence of a pixel circuit according to an embodiment of the invention. In an embodiment of the present invention, in combination with fig. 4 and 5, the operation process of the pixel circuit optionally includes an initialization phase t1, a compensation phase t2, a data writing phase t3 and a light emitting phase t 4.
In the initialization period T1, the first emission control signal EM1 is at a low level, the fifth transistor T5 is controlled to be turned on, the reference voltage signal Vref (e.g., 0V) is written into the anode of the light emitting device D1, and the anode of the light emitting device D1 is initialized; the third scan signal S3 is at high level, controlling the fourth transistor T4 to turn off; the first scan signal S1 is at a high level and the second scan signal S2 is at a high level, and the first transistor T1, the second transistor T2 and the third transistor T3 are controlled to be turned on, so that the reference voltage signal Vref (e.g., 0V) is written into the node a, and at the same time, the reference voltage signal Vref (e.g., 0V) is written into the node G, i.e., V (a) ═ V (G) ═ Vref.
In the compensation phase T2, the first lighting control signal EM1 is at a high level, and controls the fifth transistor T5 to be turned off; the first scan signal S1 is at a high level, which controls the first transistor T1 and the third transistor T3 to turn on, and the reference voltage signal Vref continues to be written into the node a, while the voltage at the node G maintains the voltage at the initialization stage T1; assuming that the power supply signal VDD is 10V, the gate-source voltage Vgs of the driving transistor DT is V (G) -VDD-Vref-VDD-0-10V < Vth, so that the driving transistor DT is turned on, the power supply signal VDD is written into the node G through the driving transistor DT and the first transistor T1 in sequence, the voltage of the node G gradually increases until the voltage of the node G increases to VDD + Vth, and the driving transistor DT is turned off (i.e., turned off).
In the data writing phase T3, the first scan signal S1 is at a low level, and controls the first transistor T1 and the third transistor T3 to be turned off; the second scan signal S2 is at low level, controlling the second transistor T2 to turn off; the third scan signal S3 is at a low level, which controls the fourth transistor T4 to turn on, the DATA signal DATA (e.g., less than 0) is written into the node a, and the potential of the node a changes to Vdata-Vref; the potential of the node G also changes Vdata-Vref due to the coupling action of the first capacitor C1, and therefore, the potential of the node G becomes VDD + Vth + Vdata-Vref; at this time, the gate-source voltage Vgs ═ v (g) -v(s) ═ VDD + Vth + Vdata-Vref-VDD ═ Vdata + Vth-Vref of the driving transistor DT.
In the light emitting period T4, the first scan signal S1 is at a low level, and controls the first transistor T1 and the third transistor T3 to be turned off; the second scan signal S2 is at low level, controlling the second transistor T2 to turn off; the third scan signal S3 is at high level, controlling the fourth transistor T4 to turn off; the first light emitting control signal EM1 is at a low level, and controls the fifth transistor T5 to be turned on; the driving transistor DT maintains an operating state, and generates a driving current of:
Figure BDA0002805111180000141
therefore, the driving current Id generated by the pixel circuit provided by the embodiment of the invention is not related to the power supply signal VDD and the threshold voltage of the driving transistor DT, so that the compensation of the threshold voltage and the power supply signal VDD is realized, the display uniformity of the display panel is improved, and the display image quality is improved. In addition, fig. 6 is a simulation diagram of a pixel circuit according to an embodiment of the present invention. As can be seen from fig. 6, the potentials of the node a and the node G and the glitch of the driving current are less, and the signal interference is less, that is, the embodiment of the present invention can reduce the noise interference.
Fig. 7 is a signal connection diagram of a pixel circuit according to an embodiment of the present invention. Referring to fig. 7, Pixel (n-1) denotes a previous stage Pixel circuit, S1(n-1) denotes a first scan signal of the previous stage Pixel circuit, S2(n-1) denotes a second scan signal of the previous stage Pixel circuit, EM1(n-1) denotes a first light emission control signal of the previous stage Pixel circuit, and S3(n-1) denotes a third scan signal of the previous stage Pixel circuit; pixel (n) denotes a next-stage pixel circuit, S1(n) denotes a first scan signal of the next-stage pixel circuit, S2(n) denotes a second scan signal of the next-stage pixel circuit, EM1(n) denotes a first light emission control signal of the next-stage pixel circuit, and S3(n) denotes a third scan signal S3 of the next-stage pixel circuit. The upper stage Pixel circuit Pixel (n-1) and the lower stage Pixel circuit Pixel (n) respectively represent two adjacent rows of Pixel circuits.
In one embodiment of the present invention, the first scan signal S1(n-1) of the previous stage pixel circuit is optionally multiplexed into the second scan signal S2(n) of the next stage pixel circuit. Compared with the case that the first scanning signal S1 and the second scanning signal S2 are not multiplexed, the embodiment of the invention is configured such that a set of scanning circuits can be used to provide the first scanning signal S1 and the second scanning signal S2 at the same time, thereby reducing the number of the scanning circuits, and being beneficial to reducing the frame of the display panel.
In the foregoing embodiments, the pixel circuit is exemplarily shown to be a hybrid transistor pixel circuit, but the invention is not limited thereto, and in other embodiments, as shown in fig. 8, the driving transistor DT, the first transistor T1, the second transistor T2, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 may also be P-type transistors, and the driving process and the generated effect are similar, and are not described again.
Fig. 9 is a schematic structural diagram of another pixel circuit according to an embodiment of the invention. Referring to fig. 9, in an embodiment of the present invention, optionally, the pixel circuit further includes a second light emission control module 600. The second light emitting control module 600 is used for conducting the conducting path between the power signal VDD and the driving transistor DT during the compensation period t2 and the light emitting period t 4. In the initialization period T1, the driving transistor DT is turned on, and although the power signal VDD can form a path through the driving transistor DT and the second transistor T2, the light emitting device D1 does not emit light by mistake, but a certain amount of power consumption is generated. The second light-emitting control module 600 is set to be turned on only in the compensation phase t2 and the light-emitting phase t4, and the conduction path between the power supply signal VDD and the driving transistor DT can be cut off in the initialization phase t1, so that the power consumption is reduced on the basis of ensuring the realization of the pixel circuit compensation function.
With continued reference to fig. 9, in an embodiment of the present invention, optionally, the second light-emitting control module 600 includes a sixth transistor T6, a gate of the sixth transistor T6 is connected to the second light-emitting control signal EM2, a first pole of the sixth transistor T6 is connected to the power signal VDD, and a second pole of the sixth transistor T6 is electrically connected to the first pole of the driving transistor DT, so that the configuration is favorable for simplifying the pixel circuit. Optionally, the sixth transistor T6 is a P-type transistor or an N-type transistor.
In the above embodiments, the driving transistor DT is exemplarily shown to be a P-type transistor, which is not a limitation of the present invention, and in other embodiments, the driving transistor DT may be an N-type transistor, which is not a limitation of the present invention.
Embodiments of the present invention further provide a display panel, where the display panel includes the pixel circuit provided in any embodiment of the present invention, and the technical principle and the resulting effect are similar and are not described again.
The embodiment of the invention also provides a driving method of the pixel circuit, and the driving method can be realized by adopting the pixel circuit provided by any embodiment of the invention. Fig. 10 is a flowchart illustrating a driving method of a pixel driving circuit according to an embodiment of the invention. Referring to fig. 10, the driving method includes the steps of:
s110, in the initialization stage, the compensation module writes an initialization signal into the grid electrode of the driving transistor.
S120, in a compensation stage, the compensation module conducts the second pole and the grid of the driving transistor so that the power supply signal is written into the first pole, the second pole and the grid of the driving transistor in sequence; and the data transmission module writes the reference voltage signal into the coupling input end of the coupling module and establishes a constant voltage difference between the coupling input end and the coupling output end.
S130, in a data writing stage, the data transmission module writes a data signal into the coupling input end of the coupling module and couples the data signal to the grid electrode of the driving transistor by constant voltage difference.
And S140, in a light emitting stage, the driving transistor responds to the data signal and the power supply signal to generate a driving current to drive the light emitting device to emit light.
According to the embodiment of the invention, the constant voltage difference between the coupling input end and the coupling output end is established by adding the compensation stage in the driving process of the pixel circuit, and the constant voltage difference is utilized in the data writing stage to reach VDD + Vth + Vdata-Vref, so that the grid voltage of the driving transistor not only comprises the threshold voltage, but also comprises the power supply signal, and the power supply signal and the threshold voltage are eliminated in the driving current formula. The driving current is only related to the data signal and the reference voltage signal, the compensation of the threshold voltage and the power signal is realized, the influence of the voltage drop of the power signal on the driving current is avoided, the display uniformity of the display panel is improved, the display image quality is improved, and particularly, the effect of improving the display uniformity of the display panel with medium and large sizes is more obvious.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims (10)

1. A pixel circuit, comprising:
a driving transistor for generating a driving current in response to a data signal and a power signal to drive the light emitting device to emit light;
the compensation module comprises an initial input end, a first connecting end and a second connecting end, wherein the initial input end is connected with an initialization signal, the first connecting end is electrically connected with the second pole of the driving transistor, and the second connecting end is electrically connected with the grid electrode of the driving transistor; the compensation module is used for writing the initialization signal into the grid electrode of the driving transistor in an initialization stage and sequentially writing the power supply signal into the first pole, the second pole and the grid electrode of the driving transistor in a compensation stage;
the coupling module comprises a coupling input end and a coupling output end, the coupling input end is electrically connected with the data transmission module, and the coupling output end is electrically connected with the grid electrode of the driving transistor; the data transmission module is used for writing a reference voltage signal into the coupling input end in the compensation stage and establishing a constant voltage difference between the coupling input end and the coupling output end; and in a data writing phase, writing the data signal into the coupling input end and coupling the data signal to the grid electrode of the driving transistor by the constant voltage difference.
2. The pixel circuit of claim 1, wherein the compensation module comprises:
a first transistor, a gate of which is connected to a first scan signal, a first pole of which is electrically connected to a second pole of the driving transistor, and a second pole of which is electrically connected to the gate of the driving transistor;
a second transistor, a gate of which is connected to a second scan signal, a first pole of which is connected to the initialization signal, and a second pole of which is electrically connected to the second pole of the driving transistor;
optionally, the driving transistor is a P-type transistor, and the first transistor and the second transistor are both N-type transistors;
or, the driving transistor, the first transistor and the second transistor are all P-type transistors.
3. The pixel circuit according to claim 2, wherein the first scan signal of the pixel circuit of an upper stage is multiplexed into the second scan signal of the pixel circuit of a lower stage.
4. The pixel circuit of claim 1, wherein the coupling module comprises a first capacitor;
the data transmission module comprises a third transistor and a fourth transistor; a grid electrode of the third transistor is connected with a first scanning signal, a first pole of the third transistor is connected with the reference voltage signal, and a second pole of the third transistor is electrically connected with a first end of the first capacitor; a gate of the fourth transistor is connected to a third scanning signal, a first pole of the fourth transistor is connected to the data signal, and a second pole of the fourth transistor is electrically connected to the first end of the first capacitor; the second end of the first capacitor is electrically connected with the grid electrode of the driving transistor;
optionally, the third transistor is an N-type transistor, and the fourth transistor is a P-type transistor;
alternatively, the third transistor and the fourth transistor are P-type transistors.
5. The pixel circuit according to claim 1, further comprising:
the storage module is used for storing the grid potential of the driving transistor;
optionally, the memory module includes a second capacitor, a first pole of the second capacitor is electrically connected to the power signal; and the second pole of the second capacitor is electrically connected with the coupling input end of the coupling module.
6. The pixel circuit according to claim 1, further comprising:
the first light-emitting control module is used for conducting a conducting path between the driving transistor and the light-emitting device in a light-emitting stage;
optionally, the first light emitting control module includes a fifth transistor, a gate of the fifth transistor is connected to the first light emitting control signal, a first pole of the fifth transistor is electrically connected to the second pole of the driving transistor, and a second pole of the fifth transistor is electrically connected to the light emitting device;
optionally, the first lighting control module is further configured to, in the initialization stage, turn on a conduction path between the initialization signal and the lighting device;
optionally, the fifth transistor is a P-type transistor or an N-type transistor.
7. The pixel circuit according to claim 1, further comprising:
the second light-emitting control module is used for conducting a conducting path between the power supply signal and the driving transistor in the compensation stage and the light-emitting stage;
optionally, the second light emitting control module includes a sixth transistor, a gate of the sixth transistor is connected to the second light emitting control signal, a first pole of the sixth transistor is connected to the power signal, and a second pole of the sixth transistor is electrically connected to the first pole of the driving transistor;
optionally, the sixth transistor is a P-type transistor or an N-type transistor.
8. The pixel circuit according to claim 1, wherein the reference voltage signal is multiplexed into the initialization signal.
9. A display panel, comprising: a pixel circuit as claimed in any one of claims 1-8.
10. The driving method of the pixel circuit is characterized in that the pixel circuit comprises a driving transistor, a compensation module, a coupling module and a data transmission module;
the driving method includes:
in the initialization stage, the compensation module writes an initialization signal into the grid electrode of the driving transistor;
in the compensation stage, the compensation module conducts the second pole and the grid of the driving transistor so as to enable the power supply signal to be written into the first pole, the second pole and the grid of the driving transistor in sequence; the data transmission module writes a reference voltage signal into a coupling input end of the coupling module and establishes a constant voltage difference between the coupling input end and a coupling output end of the coupling module;
in the data writing stage, the data transmission module writes a data signal into a coupling input end of the coupling module and couples the data signal to the grid electrode of the driving transistor by the constant voltage difference;
and the driving transistor responds to the data signal and the power supply signal to generate a driving current to drive the light-emitting device to emit light.
CN202011364846.5A 2020-11-27 2020-11-27 Pixel circuit, driving method thereof and display panel Pending CN112509518A (en)

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CN114913802A (en) * 2022-05-31 2022-08-16 Tcl华星光电技术有限公司 Pixel driving circuit and display panel

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