CN210325794U - 一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件 - Google Patents

一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件 Download PDF

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CN210325794U
CN210325794U CN201921177366.0U CN201921177366U CN210325794U CN 210325794 U CN210325794 U CN 210325794U CN 201921177366 U CN201921177366 U CN 201921177366U CN 210325794 U CN210325794 U CN 210325794U
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chip
voltage
std
conducting strip
high withstand
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汪良恩
杨华
朱京江
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Anhui Anmei Semiconductor Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/33Structure, shape, material or disposition of the layer connectors after the connecting process of a plurality of layer connectors
    • H01L2224/331Disposition
    • H01L2224/3318Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/33181On opposite sides of the body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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Abstract

本实用新型公开了一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件,属于半导体分立器件技术领域。包括SKY芯片、STD芯片、TVS芯片、导电片、引线端子和塑封体,所述SKY芯片与STD芯片通过焊料焊接组合串联在上、下两导电片之间,两导电片之间再并联有TVS芯片,导电片及芯片封装在塑封体内,所述上、下导电片分别通过引线端子引出;本实用新型半导体元器件产品具有高耐压、超快恢复特点,制作成本低,通过TVS芯片维持元器件电压的稳定,防止内部SKY芯片和STD芯片在反向过电压的情况下被击穿,提高了产品的使用寿命。

Description

一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件
技术领域
本实用新型属于半导体分立器件技术领域,具体涉及一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件。
背景技术
半导体分立器件行业属于半导体行业的细分行业。半导体产业按照制造技术划分,可以具体细分为三大分支:一是以集成电路为核心的微电子技术,用以实现对信息的处理、存储与转换;二是以半导体分立器件为主导的电力电子技术,用以实现对电能的处理与变换;三是以光电子器件为主轴的光电子技术,用以实现半导体光与电子的转换效应。
半导体分立器件作为介于电子整机行业以及上游原材料行业之间的中间产品,是半导体产业的基础及核心领域之一。现有的半导体分立器件高耐压与超快恢复不可兼得。高耐压产品反向恢复时间慢;反向恢复时间快的产品则反向耐压低。
行业内也有通过将多组快恢复芯片串联以提高耐压性能,但是加工成本高,而且在反向过压的情况下,内部芯片易被击穿,使用寿命短。
实用新型内容
针对现有技术中缺陷与不足的问题,本实用新型提出了一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件,具有高耐压、超快恢复特点,制作成本低,通过TVS芯片维持元器件电压的稳定,防止内部SKY芯片和STD芯片在反向过电压的情况下被击穿,提高了产品的使用寿命。
本实用新型解决其技术问题所采用的技术方案为:
一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件, 包括SKY芯片、STD芯片、TVS芯片、导电片、引线端子和塑封体,所述SKY芯片与STD芯片通过焊料焊接组合串联在上、下两导电片之间,两导电片之间再并联有TVS芯片,导电片及芯片封装在塑封体内,所述上、下导电片分别通过引线端子引出。
进一步的,所述导电片与各芯片之间采用焊料焊接。
进一步的,所述塑封体采用环氧树脂。
进一步的,所述塑封体可加工成方形的贴面封装或柱形的轴向封装。
本实用新型具有如下有益效果:本实用新型得到的半导体元器件产品具有高耐压和超快恢复双重特点;通过采用STD芯片与SKY芯片串联后再与TVS芯片并联,制作成本低,而且功耗低、小型化、易加工,可以批量生产。
附图说明
图1为本实用新型结构示意图。
具体实施方式
下面结合附图对本实用新型的具体实施方式进行详细说明。
如图1所示,一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件, 包括SKY芯片1、STD芯片2、TVS芯片3、导电片4、引线端子5和塑封体6,所述SKY芯片1与STD芯片2通过焊料焊接组合串联在上、下两导电片4之间,两导电片4之间再并联有TVS芯片3,导电片4及芯片封装在塑封体6内,所述上、下导电片4分别通过引线端子5引出。
进一步的,所述导电片4与各芯片之间采用焊料11焊接。
进一步的,所述塑封体6采用环氧树脂,起到很好的绝缘性和保护作用。
进一步的,所述塑封体6可加工成方形的贴面封装或柱形的轴向封装,以适应不同的产品需要。
本实用新型通过将SKY芯片1、STD芯片2及TVS芯片组合,利用SKY芯片1的反向快恢复及正向压降低特性,结合STD芯片2的反向高耐压特性,从而使得到的半导体元器件具有高耐压、超快恢复特点,且超快恢复可达到8ns。通过TVS芯片3维持元器件电压的稳定,防止内部SKY芯片1和STD芯片2在反向过电压的情况下被击穿,提高了产品的使用寿命。本实用新型通过多种芯片之间串、并联,将其集成到一个半导体元器件上,实现了产品小型化,而且本实用新型使用中功耗低,易加工,制作成本低,可以实现批量生产。
以上显示和描述了本实用新型的基本原理、主要特征和本实用新型的优点。本实用新型不受上述实施例的限制,上述实施例和说明书中描述的只是说明本实用新型的原理,在不脱离本实用新型精神和范围的前提下本实用新型还会有各种变化和改进,这些变化和改进都落入要求保护的本实用新型的范围内。本实用新型要求保护范围由所附的权利要求书及其等同物界定。

Claims (4)

1.一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件,其特征在于为:包括SKY芯片、STD芯片、TVS芯片、导电片、引线端子和塑封体,所述SKY芯片与STD芯片通过焊料焊接组合串联在上、下两导电片之间,两导电片之间再并联有TVS芯片,导电片及芯片封装在塑封体内,所述上、下导电片分别通过引线端子引出。
2.如权利要求1所述的一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件,其特征在于:所述导电片与各芯片之间采用焊料焊接。
3.如权利要求1所述的一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件,其特征在于:所述塑封体采用环氧树脂。
4.如权利要求1或3所述的一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件,其特征在于:所述塑封体可加工成方形的贴面封装或柱形的轴向封装。
CN201921177366.0U 2019-07-25 2019-07-25 一种具有瞬态电压抑制的高耐压超快恢复的半导体元器件 Active CN210325794U (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112086446A (zh) * 2020-08-14 2020-12-15 苏州旭芯翔智能设备有限公司 整流桥

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112086446A (zh) * 2020-08-14 2020-12-15 苏州旭芯翔智能设备有限公司 整流桥

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