CN205177838U - 半导体器件 - Google Patents
半导体器件 Download PDFInfo
- Publication number
- CN205177838U CN205177838U CN201520996498.1U CN201520996498U CN205177838U CN 205177838 U CN205177838 U CN 205177838U CN 201520996498 U CN201520996498 U CN 201520996498U CN 205177838 U CN205177838 U CN 205177838U
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- Prior art keywords
- film
- semiconductor device
- connects
- external pads
- electrode
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4943—Connecting portions the connecting portions being staggered
- H01L2224/49431—Connecting portions the connecting portions being staggered on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8534—Bonding interfaces of the connector
- H01L2224/85345—Shape, e.g. interlocking features
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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JP2014246296A JP6355541B2 (ja) | 2014-12-04 | 2014-12-04 | 半導体装置およびその製造方法 |
JP2014-246296 | 2014-12-04 |
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CN205177838U true CN205177838U (zh) | 2016-04-20 |
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CN201510884600.3A Pending CN105679730A (zh) | 2014-12-04 | 2015-12-03 | 半导体器件及其制造方法 |
CN201520996498.1U Expired - Fee Related CN205177838U (zh) | 2014-12-04 | 2015-12-03 | 半导体器件 |
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CN201510884600.3A Pending CN105679730A (zh) | 2014-12-04 | 2015-12-03 | 半导体器件及其制造方法 |
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JP (1) | JP6355541B2 (ja) |
CN (2) | CN105679730A (ja) |
TW (1) | TW201622107A (ja) |
Cited By (3)
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CN105679730A (zh) * | 2014-12-04 | 2016-06-15 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
CN106601715A (zh) * | 2016-12-21 | 2017-04-26 | 成都芯源***有限公司 | 集成电路芯片及其制作方法 |
CN113453423A (zh) * | 2021-07-14 | 2021-09-28 | 广东合通建业科技股份有限公司 | 一种miniLED线路板焊盘的阻焊开窗结构 |
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US9570421B2 (en) * | 2013-11-14 | 2017-02-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Stacking of multiple dies for forming three dimensional integrated circuit (3DIC) structure |
WO2016075791A1 (ja) * | 2014-11-13 | 2016-05-19 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
US9917027B2 (en) * | 2015-12-30 | 2018-03-13 | Globalfoundries Singapore Pte. Ltd. | Integrated circuits with aluminum via structures and methods for fabricating the same |
JP6649189B2 (ja) * | 2016-06-27 | 2020-02-19 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6784176B2 (ja) * | 2017-01-16 | 2020-11-11 | 富士通株式会社 | 配線構造、電子装置、及び、配線構造の製造方法 |
US10354965B2 (en) * | 2017-09-28 | 2019-07-16 | Taiwan Semiconductor Manufacturing Co., Ltd. | Bonding pad process with protective layer |
WO2019111740A1 (ja) * | 2017-12-06 | 2019-06-13 | 株式会社村田製作所 | 電子部品 |
US11328996B2 (en) * | 2017-12-30 | 2022-05-10 | Intel Corporation | Zero-misalignment two-via structures using photoimageable dielectric film buildup film, and transparent substrate with electroless plating |
JP2019149485A (ja) * | 2018-02-27 | 2019-09-05 | 株式会社村田製作所 | 半導体装置 |
US11735541B2 (en) * | 2018-06-28 | 2023-08-22 | Murata Manufacturing Co., Ltd. | Semiconductor device with protective protrusion |
KR102551909B1 (ko) * | 2018-10-16 | 2023-07-04 | 삼성전자주식회사 | 반도체 패키지 및 그 제조 방법 |
JP7279354B2 (ja) * | 2018-12-17 | 2023-05-23 | 富士電機株式会社 | 半導体素子及び半導体素子の識別方法 |
US12027479B2 (en) * | 2019-11-08 | 2024-07-02 | Nanya Technology Corporation | Semiconductor device with edge-protecting spacers over bonding pad |
JP7327308B2 (ja) * | 2020-07-16 | 2023-08-16 | 株式会社村田製作所 | 電子部品 |
TWI818743B (zh) * | 2021-10-13 | 2023-10-11 | 日商旭化成股份有限公司 | 半導體裝置及其製造方法 |
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JPH0529377A (ja) * | 1991-07-25 | 1993-02-05 | Nec Corp | 半導体装置 |
JPH06244176A (ja) * | 1993-02-22 | 1994-09-02 | Hitachi Ltd | 集積回路装置及びその製造方法 |
JPH06283604A (ja) * | 1993-03-26 | 1994-10-07 | Olympus Optical Co Ltd | 半導体装置 |
JP3524441B2 (ja) * | 1999-08-10 | 2004-05-10 | 新光電気工業株式会社 | 配線形成方法 |
JP2002329742A (ja) * | 2001-05-07 | 2002-11-15 | Mitsubishi Electric Corp | 半導体装置 |
JP3877150B2 (ja) | 2002-01-28 | 2007-02-07 | 日本電気株式会社 | ウェーハレベル・チップスケール・パッケージの製造方法 |
TWI251284B (en) * | 2004-11-12 | 2006-03-11 | Advanced Semiconductor Eng | Redistribution layer and circuit structure thereof |
JP2007059867A (ja) * | 2005-07-26 | 2007-03-08 | Matsushita Electric Ind Co Ltd | 半導体装置 |
CN101233190B (zh) * | 2005-07-28 | 2011-12-07 | 日本电气株式会社 | 绝缘材料、布线板和半导体器件 |
JP4379413B2 (ja) | 2005-12-06 | 2009-12-09 | セイコーエプソン株式会社 | 電子部品、電子部品の製造方法、回路基板及び電子機器 |
US8592977B2 (en) * | 2006-06-28 | 2013-11-26 | Megit Acquisition Corp. | Integrated circuit (IC) chip and method for fabricating the same |
JP2010171386A (ja) * | 2008-12-26 | 2010-08-05 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP2010287750A (ja) * | 2009-06-12 | 2010-12-24 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP5607994B2 (ja) * | 2010-06-15 | 2014-10-15 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置およびその製造方法 |
US8373282B2 (en) * | 2011-06-16 | 2013-02-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer level chip scale package with reduced stress on solder balls |
US20130026658A1 (en) * | 2011-07-29 | 2013-01-31 | Yen-Ju Chen | Wafer level chip scale package for wire-bonding connection |
WO2013136388A1 (ja) * | 2012-03-14 | 2013-09-19 | パナソニック株式会社 | 半導体装置 |
JP6355541B2 (ja) * | 2014-12-04 | 2018-07-11 | ルネサスエレクトロニクス株式会社 | 半導体装置およびその製造方法 |
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2014
- 2014-12-04 JP JP2014246296A patent/JP6355541B2/ja not_active Expired - Fee Related
-
2015
- 2015-10-06 TW TW104132832A patent/TW201622107A/zh unknown
- 2015-11-25 US US14/952,468 patent/US9576921B2/en not_active Expired - Fee Related
- 2015-12-03 CN CN201510884600.3A patent/CN105679730A/zh active Pending
- 2015-12-03 CN CN201520996498.1U patent/CN205177838U/zh not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN105679730A (zh) * | 2014-12-04 | 2016-06-15 | 瑞萨电子株式会社 | 半导体器件及其制造方法 |
CN106601715A (zh) * | 2016-12-21 | 2017-04-26 | 成都芯源***有限公司 | 集成电路芯片及其制作方法 |
CN113453423A (zh) * | 2021-07-14 | 2021-09-28 | 广东合通建业科技股份有限公司 | 一种miniLED线路板焊盘的阻焊开窗结构 |
Also Published As
Publication number | Publication date |
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TW201622107A (zh) | 2016-06-16 |
CN105679730A (zh) | 2016-06-15 |
US20160163666A1 (en) | 2016-06-09 |
JP2016111154A (ja) | 2016-06-20 |
JP6355541B2 (ja) | 2018-07-11 |
US9576921B2 (en) | 2017-02-21 |
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