CN204863069U - A video acquisition circuit for medical endoscope - Google Patents
A video acquisition circuit for medical endoscope Download PDFInfo
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- CN204863069U CN204863069U CN201520460702.8U CN201520460702U CN204863069U CN 204863069 U CN204863069 U CN 204863069U CN 201520460702 U CN201520460702 U CN 201520460702U CN 204863069 U CN204863069 U CN 204863069U
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Abstract
The utility model relates to a medical endoscope's video acquisition circuit, handle the chip including a center, the center is handled chip and is included: control module, drive module, photosensitive module, sampling module and output module, control module, it is used for receiving outside triggering signal, sends triggering signal to drive module, drive module, its triggering signal who is used for receiving control module to the work of drive photosensitive module, photosensitive module, it is used for receiving external light signal to be the signal of telecommunication with this light signal conversion, sampling module, it is used for the processing of taking a sample of photosensitive module's the signal of telecommunication to electric signal transmission to the output module that will handle, output module, it is used for this electric signal transition is data signal, the line output of going forward side by side.
Description
Technical field
This utility model relates to a kind of video capture circuit, particularly a kind of for the video capture circuit for medical endoscope.
Background technology
Endoscope is a kind of conventional medical apparatus and instruments, is become by flexible part, light source and an arrangement of mirrors head group.Through the natural hole of human body, or the minimal incision * that underwent operative is done enters in human body, during use, endoscope is imported the organ of preliminary examination, directly can spy on the change of relevant portion.
Wherein, the quality of picture quality directly affects the result of use of endoscope.Existing general use fujinon electronic video endoscope is observed.Electronic imaging element-CCD (charge-coupled image sensor) that common fujinon electronic video endoscope adopts size minimum, the intracavity object that will observe is imaged onto on CCD by small objective lens optical system, then as fibre bundle, the picture signal received is delivered on image processing system by leading, image after last output processing on a monitor, observes and diagnosis for doctor.But still there is the defect that power consumption is too high, image quality is clear not in existing CCD chip.
Utility model content
This utility model is that the shortcoming overcoming prior art is with not enough, provides the video capture circuit for medical endoscope of a kind of high definition, low-power consumption, low-light (level).
This utility model is achieved through the following technical solutions: a kind of video capture circuit for medical endoscope, comprise a center processing chip, described center processing chip internal comprises: control module, driver module, illuminant module, sampling module and output module;
Described control module, it sends triggering signal to driver module for receiving outside triggering signal;
Described driver module, it for receiving the triggering signal of control module, and drives illuminant module work;
Described illuminant module, this optical signal for receiving extraneous optical signal, and is converted to the signal of telecommunication by it;
Described sampling module, the signal of telecommunication processed for carrying out sampling process to the signal of telecommunication of illuminant module, and is sent to output module by it;
Described output module, it for this signal of telecommunication is converted to digital signal, and exports.
Compared to prior art, this utility model by being divided into multiple functional module in control chip, and difference also by each functional module independence co-ordination, can realize low-power consumption, low-light (level), and can be the picture high definition more exported.
Further, described center processing chip also comprises one times of frequency module, and its frequency for the triggering signal inputted outside carries out doubling process, then is sent to control module.Further, conveniently in the requirement of the frequency of utilization of center processing chip, the adjustment being realized frequency by doubly frequency module is amplified.
Further, described center processing chip exterior is provided with: for receive supply voltage power port, for output video signal video signal port, for export row field signal row field signal port, for receiving reference voltage electricity reference signal port and frequently for receiving the clock signal port of external timing signal.
Further, described power port is circumscribed with one for the filter circuit of voltage stabilizing; Described filter circuit comprises an inductance and at least one electric capacity; Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, the other end of described each electric capacity and ground connection; Power port is accessed in one end that described inductance is connected with electric capacity.
Further, described row field signal port is circumscribed with one for providing the resistance of signal intensity.
Further, described reference signal port is circumscribed with the electric capacity as voltage electricity frequency basis reference.
Further, the external clock circuit of described clock signal port, it comprises a clock and to shake chip; The shake power end of chip of described clock is connected with power supply by a filter circuit, and the shake outfan of chip of this clock is connected with described clock signal port by a debug circuit; Described filter circuit comprises and being made up of an inductance and capacitances in series, and one end of described inductance is connected with power supply, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity; Described clock shake chip power end with to be connected and between inductance and electric capacity; Described debug circuit is made up of resistance and electric capacity; One end of the resistance of this debug circuit is connected with the outfan of Zhong Zhen, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity; Described clock signal port is connected between this resistance and electric capacity.
Further, described center processing chip also comprises communication command port, and it is circumscribed with a mode of operation configuration circuit; Described configuration circuit is made up of two resistant series, and described communication command port is connected between two resistance.
In order to understand better and implement, describe this utility model in detail below in conjunction with accompanying drawing.
Accompanying drawing explanation
Fig. 1 is the internal module connection diagram of center processing chip of the present utility model.
Fig. 2 is the outside port connecting circuit figure of center processing chip of the present utility model.
Fig. 3 is the circuit diagram that power pack of the present utility model connects.
Fig. 4 is the voltage place in circuit figure of 2.7V of the present utility model.
Fig. 5 is the voltage place in circuit figure of 1.8V of the present utility model.
Fig. 6 is the voltage place in circuit figure of 1.2V of the present utility model.
Fig. 7 is the partial enlarged drawing of row field signal of the present utility model.
Fig. 8 is the partial enlarged drawing of reference signal port of the present utility model.
Fig. 9 is the circuit diagram of clock circuit of the present utility model.
Figure 10 is the circuit diagram of configuration circuit of the present utility model.
Detailed description of the invention
Refer to Fig. 1, it is the internal module connection diagram of center processing chip of the present utility model.Video capture circuit for medical endoscope of the present utility model, comprises a center processing chip, and described center processing chip internal comprises: control module 1, driver module 2, illuminant module 3, sampling module 4, output module 5 and doubly frequency module 6;
Described control module 1, it sends triggering signal to driver module for receiving outside triggering signal;
Described driver module 2, it for receiving the triggering signal of control module, and drives illuminant module work;
Described illuminant module 3, this optical signal for receiving extraneous optical signal, and is converted to the signal of telecommunication by it;
Described sampling module 4, the signal of telecommunication processed for carrying out sampling process to the signal of telecommunication of illuminant module, and is sent to output module by it;
Described output module 5, it for this signal of telecommunication is converted to digital signal, and exports.
Described times of frequency module 6, its frequency for the triggering signal inputted outside carries out doubling process, then is sent to control module.Further, conveniently in the requirement of the frequency of utilization of center processing chip, the adjustment being realized frequency by doubly frequency module is amplified.
In addition in order to adapt to the application of this center processing chip, be provided with in described center processing chip exterior: the power port 11 for receiver voltage, the video signal port 12 for output video signal, for export row field signal row field signal port one 3, for receiving reference voltage electricity reference signal port one 4 frequently, for receiving the clock signal port 15 of external timing signal and the communication command port one 6 for receiving operate outside mode command.
Please refer to Fig. 3, it is the circuit diagram of the power pack of utility model.Concrete, the power pack in this utility model adopts three kinds of voltages simultaneously, is respectively 2.7V, 1.8V, and 1.2V.
Please refer to Fig. 4-6, it is respectively the circuit diagram of 2.7V, 1.8V and 1.2V of the present utility model.Concrete, the input port of three kinds of voltages of the present utility model is all circumscribed with one for the filter circuit of voltage stabilizing; Described filter circuit comprises an inductance and at least one electric capacity; Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, the other end of described each electric capacity and ground connection; Power port is accessed in one end that described inductance is connected with electric capacity.Wherein, the voltage place in circuit of 2.7V and 1.8V comprises four electric capacity, and the voltage place in circuit of 1.2V comprises three electric capacity, to filter the interfering signal of different frequency.
Refer to Fig. 7, it is the interface enlarged drawing of row field signal.Further, described row field signal port one 3 is circumscribed with one for providing the resistance of signal intensity.By this row field signal, for controlling frequency and the order of video frequency output.Such as: the display frequency of video signal on screen and DISPLAY ORDER can be controlled, can be under upper often row export, also can be export from left to right.
Refer to Fig. 8, it is the partial enlarged drawing of reference signal port of the present utility model.Further, described reference signal port one 4 is circumscribed with the electric capacity as voltage electricity frequency basis reference.In the present embodiment, described reference signal port has 7, the electric capacity of the external 1uF of each port.
Refer to Fig. 9, it is the circuit diagram of clock circuit of the present utility model.The external clock circuit of described clock signal port 15, it comprises a clock and to shake chip; The shake power end of chip of described clock is connected with power supply by a filter circuit, and the shake outfan of chip of this clock is connected with described clock signal port by a debug circuit; Described filter circuit comprises and being made up of an inductance and capacitances in series, and one end of described inductance is connected with power supply, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity; Described clock shake chip power end with to be connected and between inductance and electric capacity; Described debug circuit is made up of resistance and electric capacity; One end of the resistance of this debug circuit is connected with the outfan of Zhong Zhen, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity; Described clock signal port is connected between this resistance and electric capacity.
Refer to Figure 10, it is the circuit diagram of configuration circuit of the present utility model.Further, described communication command port one 6, it is circumscribed with a mode of operation configuration circuit; Described configuration circuit is made up of two resistant series, and described communication command port is connected between two resistance.
Below the work process of video capture circuit of the present utility model is described:
S1: carry out circuit access according to above-mentioned requirement by the outside port of this center processing chip;
S2: when center process chip is energized, first carries out multiplication by this times of frequency module by input voltage frequency and regulates, to adapt to current operating frequency;
S3: described control module sends triggering signal to driver module, drives illuminant module work by driver module;
S4: when light is irradiated on illuminant module, is converted to the signal of telecommunication by this illuminant module by optical signal, and transfers to sampling module;
S5: when sampling module receives the signal of telecommunication from illuminant module, carries out sampling process to this signal of telecommunication, and the signal of telecommunication processed is sent to output module;
S6: finally by described output module, this signal of telecommunication is converted to digital signal, and exports.
Compared to prior art, this utility model by being divided into multiple functional module in control chip, and difference also by each functional module independence co-ordination, can realize low-power consumption, low-light (level), and can be the picture high definition more exported.
This utility model is not limited to above-mentioned embodiment, if do not depart from spirit and scope of the present utility model to various change of the present utility model or distortion, if these are changed and distortion belongs within claim of the present utility model and equivalent technologies scope, then this utility model is also intended to comprise these changes and distortion.
Claims (8)
1. a video capture circuit for medical endoscope, comprises a center processing chip, it is characterized in that: described center processing chip internal comprises: control module, driver module, illuminant module, sampling module and output module;
Described control module, it sends triggering signal to driver module for receiving outside triggering signal;
Described driver module, it for receiving the triggering signal of control module, and drives illuminant module work;
Described illuminant module, this optical signal for receiving extraneous optical signal, and is converted to the signal of telecommunication by it;
Described sampling module, the signal of telecommunication processed for carrying out sampling process to the signal of telecommunication of illuminant module, and is sent to output module by it;
Described output module, it for this signal of telecommunication is converted to digital signal, and exports.
2. the video capture circuit of medical endoscope according to claim 1, it is characterized in that: described center processing chip also comprises one times of frequency module, its frequency for the triggering signal inputted outside carries out doubling process, then is sent to control module.
3. the video capture circuit of medical endoscope according to claim 1, is characterized in that: described center processing chip exterior is provided with: for receive supply voltage power port, for output video signal video signal port, for export row field signal row field signal port, for receiving reference voltage electricity reference signal port and frequently for receiving the clock signal port of external timing signal.
4. the video capture circuit of medical endoscope according to claim 3, is characterized in that: described power port is circumscribed with one for the filter circuit of voltage stabilizing; Described filter circuit comprises an inductance and at least one electric capacity; Described inductance one end is connected with external power source, and the other end is connected with each electric capacity respectively, the other end of described each electric capacity and ground connection; Power port is accessed in one end that described inductance is connected with electric capacity.
5. the video capture circuit of medical endoscope according to claim 3, is characterized in that: described row field signal port is circumscribed with one for providing the resistance of signal intensity.
6. the video capture circuit of medical endoscope according to claim 3, is characterized in that: described reference signal port is circumscribed with the electric capacity as voltage electricity basis reference frequently.
7. the video capture circuit of medical endoscope according to claim 3, is characterized in that: the external clock circuit of described clock signal port, and it comprises a clock and to shake chip; The shake power end of chip of described clock is connected with power supply by a filter circuit, and the shake outfan of chip of this clock is connected with described clock signal port by a debug circuit; Described filter circuit comprises and being made up of an inductance and capacitances in series, and one end of described inductance is connected with power supply, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity; Described clock shake chip power end with to be connected and between inductance and electric capacity; Described debug circuit is made up of resistance and electric capacity; One end of the resistance of this debug circuit is connected with the outfan of Zhong Zhen, and the other end is connected with electric capacity, and the other end ground connection of this electric capacity; Described clock signal port is connected between this resistance and electric capacity.
8. the video capture circuit of medical endoscope according to claim 3, it is characterized in that: described center processing chip also comprises communication command port, it is circumscribed with a mode of operation configuration circuit; Described configuration circuit is made up of two resistant series, and described communication command port is connected between two resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520460702.8U CN204863069U (en) | 2015-06-30 | 2015-06-30 | A video acquisition circuit for medical endoscope |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520460702.8U CN204863069U (en) | 2015-06-30 | 2015-06-30 | A video acquisition circuit for medical endoscope |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN204863069U true CN204863069U (en) | 2015-12-16 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520460702.8U Expired - Fee Related CN204863069U (en) | 2015-06-30 | 2015-06-30 | A video acquisition circuit for medical endoscope |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN204863069U (en) |
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2015
- 2015-06-30 CN CN201520460702.8U patent/CN204863069U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
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| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20151216 Termination date: 20180630 |
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| CF01 | Termination of patent right due to non-payment of annual fee |