CN201392834Y - 一种多层微波集成电路 - Google Patents

一种多层微波集成电路 Download PDF

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Publication number
CN201392834Y
CN201392834Y CN 200920040612 CN200920040612U CN201392834Y CN 201392834 Y CN201392834 Y CN 201392834Y CN 200920040612 CN200920040612 CN 200920040612 CN 200920040612 U CN200920040612 U CN 200920040612U CN 201392834 Y CN201392834 Y CN 201392834Y
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microwave
circuit
pcb
layer
multiplayer
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黄家栋
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Wuxi Huace Electronic System Co Ltd
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Wuxi Huace Electronic System Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

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Abstract

本实用新型涉及一种多层微波集成电路，其包括多层微波电路主片和多层微波电路从片，所述多层微波电路主片上集成相互连接的微波印制电路和微波芯片。多层微波电路主片和多层微波电路从片之间通过金属焊接层连接；多层微波电路从片采用多层印制板PCB，所述PCB顶层和底层均有金属薄层，PCB边缘有金属包边，PCB中有垂直接地孔连接PCB的顶层金属层和底层金属层，还有垂直互连孔连接PCB的顶层金属层和中间层金属层，以及中间层的互连；多层微波电路主片面积小于多层微波电路从片。其优点是：成本低，工艺简单，微波接地可靠，除主片可集成微波印制电路、微波芯片、半导体芯片和无源元件外，从片也可集成半导体芯片和无源元件，具有较大的灵活性。

Description

一种多层微波集成电路
技术领域
本实用新型涉及一种多层微波集成电路，具体是一种主片和从片焊接连接的多层微波集成电路。
背景技术
微波多层集成电路是由分立的有源器件与多层无源元件、互连线构成的集成电路。从微波电路的发展历程来看，多层微波集成电路是继微波立体电路(波导同轴线)、微波混合集成电路(平面电路)、单片集成电路之后的***微波电路结构形式。多层微波集成电路和多芯片模块(MCM)的发展顺应了电子设备高性能、高集成度、小型化的要求，广泛应用于各类电子***中。
低温共烧陶瓷(LTCC)是一种常用的多层微波集成电路。采用陶瓷片为基板材料，以导电浆料印刷成走线和填充层际互连通孔、堆叠热压烧结而成。可以在基板内实现电阻、电容、电感、微带元件、滤波器等，但由于工艺复杂，目前采用材料均需进口，制造成本较高。
发明内容
本实用新型的目的是克服现有技术中存在的不足，提供一种多层微波集成电路，其主片和从片焊接连接，成本低且具有很好的接地性能。
按照本实用新型提供的技术方案，一种多层微波集成电路包括多层微波电路主片和多层微波电路从片，所述多层微波电路主片上集成相互连接的微波印制电路和微波芯片MMIC(Microwave Monolithic Integrated Circuit)。
多层微波电路主片和多层微波电路从片之间通过金属焊接层连接；多层微波电路从片采用多层印制板PCB，所述PCB顶层和底层均有金属薄层，PCB边缘包有金属边；PCB中有垂直接地孔连接PCB的顶层金属层和底层金属层，还有垂直互连孔连接PCB的顶层金属层和中间层金属层或连接各中间层金属层；多层微波电路主片面积小于多层微波电路从片。
多层微波电路从片最上层还集成有微波芯片以外的半导体芯片、表贴元件或无源元件，以及印制板电路。
多层微波电路主片采用微波软基板材料，并安放在最上层。
多层微波电路主片还集成有微波芯片以外的半导体芯片和无源元件。
本实用新型的优点在于：
1、主片和从片采用常规的焊接工艺完成，不但工艺简单，而且主片通过从片多层PCB边缘的金属包边和顶层到底层接地通孔与盒体焊接完成，从而保证主片微波接地可靠，比主片和从片采用胶接层压方式构成的多层微波电路接地性能优越；
2、除主片可集成微波印制电路、微波芯片、半导体芯片和无源元件外，从片也可集成半导体芯片和无源元件，具有较大的灵活性；
3、从片采用多层印制板PCB在微波低端其性能可和LTCC相比，特别适合发射、接收射频电路应用，此外也可嵌入集总参数无源元件；
4、随着印制板PCB工艺不断改良，通过制作激光微通孔，提高布线密度、减薄介质隔离层，已进入了高密度互连行列，集成度大大提高，但是成本与LTCC相比低一个量级。
附图说明
图1为本实用新型结构示意图。
具体实施方式
下面结合附图和实施例对本实用新型作进一步说明。
本实用新型是一种低成本的多层微波集成电路，包括多层微波电路主片1(简称主片)和多层微波电路从片2(简称从片)。多层微波电路主片1集成各类微波芯片4、微波印制电路3，也可集成其他半导体芯片和无源元件，主片采用价格较低的微波软基板材料，并安放在最上层。多层微波电路从片2采用多层印制板PCB。通过垂直互连方式将各类芯片和元件进行互连。主片1面积小于从片2，在从片2最上层也可集成主片微波芯片以外的各类半导体芯片12和无源元件13。
如图1所示：多层微波电路主片1上集成相互连接的微波印制电路3和微波芯片4；微波印制电路3用于阻抗匹配、滤波等功能；微波芯片4完成微波放大、移相、衰减、开关等功能。多层微波电路主片1和多层微波电路从片2之间通过金属焊接层5连接。多层微波电路从片2采用多层印制板PCB，所述PCB顶层和底层均有金属薄层，PCB边缘有金属包边6。PCB中有垂直接地孔7连接PCB的顶层金属层8和底层金属层9，还有垂直互连孔10进行PCB的金属层间的互连。
多层微波电路从片2最上层还集成有微波芯片以外的半导体芯片12、表贴元件或无源元件13，以及印制板电路。所述表贴元件或无源元件13包括电阻、电容、电感等。
从片多层印制板PCB利用板间耦合效应可以构成电容，还可以构成电感、电阻，可制成内置式微波滤波器等微波电路，此外也可嵌入集总参数无源元件。

Claims (4)

1、一种多层微波集成电路，包括多层微波电路主片(1)和多层微波电路从片(2)，所述多层微波电路主片上集成相互连接的微波印制电路(3)和微波芯片(4)，其特征是：多层微波电路主片(1)和多层微波电路从片(2)之间通过金属焊接层(5)连接；多层微波电路从片(2)采用多层印制板PCB，所述PCB顶层和底层均有金属薄层，PCB边缘包有金属边(6)；PCB中有垂直接地孔(7)连接PCB的顶层金属层(8)和底层金属层(9)，还有垂直互连孔(10)连接PCB的顶层金属层(8)和中间层金属层(11)或连接各中间层金属层(11)；多层微波电路主片(1)面积小于多层微波电路从片(2)。
2、如权利要求1所述的多层微波集成电路，其特征是：多层微波电路从片(2)最上层还集成有微波芯片以外的半导体芯片(12)、表贴元件或无源元件(13)，以及印制板电路。
3、如权利要求1所述的多层微波集成电路，其特征是：多层微波电路主片(1)采用微波软基板材料，并安放在最上层。
4、如权利要求1所述的多层微波集成电路，其特征是：多层微波电路主片(1)还集成有微波芯片以外的半导体芯片和无源元件。
CN 200920040612 2009-04-21 2009-04-21 一种多层微波集成电路 Expired - Fee Related CN201392834Y (zh)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105338731A (zh) * 2015-12-02 2016-02-17 成都锦江电子***工程有限公司 一种小型化带状线功率放大模块
CN107947752A (zh) * 2017-12-29 2018-04-20 中国电子科技集团公司第四十三研究所 一种带通滤波器
CN110337175A (zh) * 2019-07-05 2019-10-15 上海航天电子通讯设备研究所 X波段四通道tr组件多层印制板
CN112103665A (zh) * 2020-11-09 2020-12-18 成都天锐星通科技有限公司 一种射频馈电网络、相控阵天线及通讯设备

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105338731A (zh) * 2015-12-02 2016-02-17 成都锦江电子***工程有限公司 一种小型化带状线功率放大模块
CN105338731B (zh) * 2015-12-02 2018-05-22 成都锦江电子***工程有限公司 一种小型化带状线功率放大模块
CN107947752A (zh) * 2017-12-29 2018-04-20 中国电子科技集团公司第四十三研究所 一种带通滤波器
CN110337175A (zh) * 2019-07-05 2019-10-15 上海航天电子通讯设备研究所 X波段四通道tr组件多层印制板
CN112103665A (zh) * 2020-11-09 2020-12-18 成都天锐星通科技有限公司 一种射频馈电网络、相控阵天线及通讯设备

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