CN1953133B - Flat panel display with vertical and lateral grid control array structure and making technique thereof - Google Patents

Flat panel display with vertical and lateral grid control array structure and making technique thereof Download PDF

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Publication number
CN1953133B
CN1953133B CN200610107313A CN200610107313A CN1953133B CN 1953133 B CN1953133 B CN 1953133B CN 200610107313 A CN200610107313 A CN 200610107313A CN 200610107313 A CN200610107313 A CN 200610107313A CN 1953133 B CN1953133 B CN 1953133B
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layer
cathode
etching
glass
anode
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CN1953133A (en
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李玉魁
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Zhongyuan University of Technology
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Zhongyuan University of Technology
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Abstract

The invention relates to a panel display of vertical side grid control array structure and relative production. Wherein, it comprises a sealing vacuum chamber formed by cathode glass panel, anode glass panel and around glass frame; the cathode glass panel is arranged with cathode conductive layer, carbon nanometer tube and upright side grid control array structure; the anode glass panel has anode conductive layer and fluorescent powder layer on the anode conductive layer; the support wall between the anode and cathode glass panels; and relative gettering element; therefore, the invention can reduce the working voltage of grid structure, increase the control efficiency of grid structure, improve the display brightness and picture quality of whole device. The invention has high reliability and low cost.

Description

The flat-panel monitor of vertical and lateral grid control array structure and manufacture craft thereof
Technical field
The invention belongs to the mutual crossing domain in technical field of flat panel display, microelectronics science and technology field, vacuum science and technical field and nanometer science and technology field, relate to the element manufacturing of panel field emission display, be specifically related to the content of element manufacturing aspect of the panel field emission display of carbon nanotube cathod, particularly a kind of flat-panel monitor of vertical and lateral grid control array structure and manufacture craft thereof.
Background technology
Carbon nano-tube has good field emission characteristics, is very suitable for the cold-cathode material as the field emission display device, and this has benefited from the geometric shape of carbon nano-tube uniqueness and little character such as tip curvature radius.Display device is a kind of crucial man-machine communication interface, and the high definition screen from the indicating dial on the fascia to high-end notebook PC, flat-panel monitor are the basic display devices of these equipment.Wherein, the panel field emission display that utilizes carbon nano-tube to make as cathode material is a kind of novel plane display device, advantage such as have high definition, high-resolution, high display brightness and can under mal-condition, work, become the research focus in international flat panel display field, each big research institution all carries out extensive studies and exploitation to it.
Grid structure is one of control element indispensable in the three-stage structure field-emitter display, it is determining directly whether carbon nanotube cathod can carry out the electronics emission, and operating voltage of grid structure also is to estimate an important technology index of display device quality.In order effectively further to reduce working voltage of device, need carry out many-sided structure fabrication and consider with design.The distance that reduces between grid structure and the carbon nanotube cathod structure as much as possible is one of method between the comparison, and this also will be subjected to the restriction of the aspect such as the class of insulation, actual fabrication feasibility of insulating material certainly.Secondly, also need grid structure and carbon nanotube cathod structure are improved, the feasible electric field strength that increases top, carbon nanotube cathod surface as much as possible, this also can reduce operating voltage of grid structure from another angle.Certainly, consider that the insulation property of vacuum will be owing to other insulating material, this also is the favorable factor that is worth utilization.Therefore, in the manufacturing process of practical devices, adopt which kind of grid control structure actually, adopt which kind of manufacturing materials actually, and the control performance that how on earth further strengthens grid structure, or the like, these all are the problems that is worthy of attentive consideration.
In addition, in the middle of the panel field emission display spare of three-stage structure, guaranteeing that grid structure has carbon nanotube cathod under the prerequisite of good control action, also need to reduce as much as possible the total device cost, carry out reliable and stable, with low cost, function admirable, high quality devices is made.
Summary of the invention
The objective of the invention is to overcome the shortcoming and defect that exists in the above-mentioned flat-panel display device and provide a kind of with low cost, manufacturing process is reliable and stable, be made into the power height, the flat-panel monitor and the manufacture craft thereof of vertical and lateral grid control array structure simple in structure.
The object of the present invention is achieved like this, comprise by cathode glass faceplate, anode glass panel and all around glass enclose the sealed vacuum chamber that frame constitutes; On the anode glass panel, have anode conductive layer, preparation on anode conductive layer phosphor powder layer and at the insulation paste layer of the non-display area of anode conductive layer printing; Supporting wall structure between anode glass panel and cathode glass faceplate and getter subsidiary component have cathode conductive layer, carbon nano-tube and vertical and lateral grid control array structure on cathode glass faceplate.
The backing material of described vertical and lateral grid control array structure is glass, just cathode glass faceplate; Metal level after the etching on the cathode glass faceplate forms the cathode leg layer; Doped polysilicon layer formation negative electrode after the etching above the cathode leg layer is lifted and is stuck up layer; Negative electrode is lifted and is stuck up layer for the cylinder type shape, and lower surface is the plane, closely contacts with the cathode leg layer; The silicon dioxide layer that negative electrode is lifted after the etching of sticking up on layer upper surface forms cathode coating; The metal level that negative electrode is lifted after the etching of sticking up on layer side forms cathode conductive layer; Cathode conductive layer is covered with negative electrode and lifts the side of sticking up layer; Silicon dioxide layer after the etching on the cathode glass faceplate forms separator; Have the electron channel hole in the separator, expose negative electrode lift stick up the layer and cathode conductive layer; The electron channel hole is round shape, lifts with negative electrode that to stick up the round-shaped of layer be corresponding, but the diameter that the diameter in electron channel hole is lifted sled layer than negative electrode is big; The medial surface of separator is the face of cylinder perpendicular to cathode glass faceplate; The height outline of separator is lifted the height that sticks up layer less than negative electrode; Metal level after the top etching of separator forms the grid lead layer; The major part of grid lead layer all be positioned at separator above, but its fore-end stretches to the inboard in electron channel hole, presents a kind of vacant state; Silicon dioxide layer after the top etching of grid lead layer forms the grid cover layer; The grid cover layer is wanted whole upper surfaces of cover grid trace layer, comprises its front end overhanging portion grid lead layer upper surface; Metal level after the etching above the grid cover layer forms sacrifice layer; Sacrifice layer is a toroidal, and the central point in its central point and electron channel hole coincides, but interior diameter than the diameter in electron channel hole, be looped around the electron channel hole around; Made of carbon nanotubes is on cathode conductive layer.
The fixed position of described vertical and lateral grid control array structure is for being fixed on the cathode glass faceplate; The cathode leg layer is metal gold, silver, copper, aluminium, molybdenum, chromium, tin, indium; It is n type, p type that negative electrode is lifted the doping type that sticks up layer; Cathode conductive layer is metallic iron, cobalt, nickel; The trend of the trend of grid lead layer and cathode leg layer is orthogonal; The grid lead layer is metal gold, silver, molybdenum, chromium, aluminium; Sacrifice layer is metal gold, silver, molybdenum, aluminium, tin, chromium; Do not apply voltage on the sacrifice layer.
A kind of manufacture craft of flat-panel monitor of vertical and lateral grid control array structure, its manufacture craft is as follows:
1) making of cathode glass faceplate: whole plate glass is carried out scribing, produce cathode glass faceplate;
2) making of cathode leg layer: on cathode glass faceplate, prepare a metal level, form the cathode leg layer after the etching;
3) negative electrode is lifted the making of sticking up layer: prepare a doped polysilicon layer on the cathode leg layer, the formation negative electrode is lifted and is stuck up layer after the etching;
4) making of cathode coating: negative electrode lift stick up the layer upper surface on prepare a silicon dioxide layer, form cathode coating after the etching;
5) making of cathode conductive layer: negative electrode lift stick up the layer the side on prepare a metal level, form cathode conductive layer after the etching;
6) making of separator: on cathode glass faceplate, prepare a silicon dioxide layer, form separator after the etching;
7) making of grid lead layer: on separator, prepare a metal level, form the grid lead layer after the etching;
8) the tectal making of grid: on the grid lead layer, prepare a silicon dioxide layer, form the grid cover layer after the etching;
9) making of sacrifice layer: on grid is tectal, prepare a metal level, form sacrifice layer after the etching;
10) cleaning surfaces of vertical and lateral grid control array structure is handled: clean is carried out on the surface to vertical and lateral grid control array structure, removes impurity and dust;
11) preparation of carbon nano-tube: with made of carbon nanotubes on cathode conductive layer;
12) making of anode glass panel: the dull and stereotyped soda-lime glass of integral body is carried out scribing, produce the anode glass panel;
13) making of anode conductive layer: evaporation one deck tin indium oxide rete on the anode glass panel; Form anode conductive layer after the etching;
14) making of insulation paste layer: at the non-display area printing insulation paste layer of anode conductive layer;
15) making of phosphor powder layer: the viewing area printing phosphor powder layer on anode conductive layer;
16) device assembling: with cathode glass faceplate, anode glass panel, supporting wall structure and all around glass enclose frame and be assembled together, and getter is put in the middle of the cavity, fix with glass powder with low melting point.Around face glass, smeared glass powder with low melting point, fixed with clip;
17) finished product is made: the device that has assembled is carried out packaging technology form finished parts.
Described step 14 is specially the non-display area printing insulation paste layer at anode conductive layer, is used to prevent the parasitic electrons emission; Through overbaking, baking temperature: 150 ℃, the retention time: after 5 minutes, be placed on and carry out high temperature sintering in the sintering furnace, sintering temperature: 580 ℃, the retention time: 10 minutes.
Described step 15 is specially the viewing area printing phosphor powder layer on anode conductive layer; In the middle of baking oven, toast baking temperature: 120 ℃, the retention time: 10 minutes.
The device that described step 17 is specially having assembled carries out following packaging technology: toast in the middle of the sample device is put into baking oven; Carry out high temperature sintering in the middle of putting into sintering furnace; On exhaust station, carry out device exhaust, sealed-off, on the roasting machine that disappears, the getter of device inside bake and disappears, install pin formation finished parts at last additional.
The present invention has following good effect:
At first, in described vertical and lateral grid control array structure, grid structure has been produced on the side of carbon nanotube cathod, and has isolated mutually by vacuum between the two.Like this,, will form powerful electric field strength, force carbon nano-tube to launch more electronics on top, carbon nanotube cathod surface when after applying appropriate voltage on the grid structure.Institute's electrons emitted is quickened the anode motion under the high-tension effect of anode.Can reduce grid structure greatly and hold back the probability of electronics, just reduce grid current, help further improving the display brightness of integral device.In addition, because the insulation property of vacuum are better than insulating material, so can further improve the class of insulation between grid structure and the carbon nanotube cathod structure on the one hand, can also further reduce the distance between the two simultaneously, reduce the grid structure operating voltage.
Secondly, in described vertical and lateral grid control array structure, with made of carbon nanotubes on the cylindrical lateral surface, can greatly increase the electron emission area of carbon nano-tube like this, make that more carbon nanotube cathod can both emitting electrons, increase the operating current of anode, helped further improving the image quality of integral device.In addition, also made sacrifice layer on gate insulator, this does not apply any voltage above sacrifice layer, only is to prevent that grid structure lost efficacy, and avoids occurring two-level structure emission phenomenon.
In addition, in described vertical and lateral grid control array structure, do not adopt special structure fabrication material, do not adopt special device making technics yet, this has just further reduced the cost of manufacture of whole flat-panel display device to a great extent, simplify the manufacturing process of device, can carry out large-area element manufacturing, helped carrying out business-like large-scale production.
Description of drawings
Fig. 1 has provided the vertical structure schematic diagram of vertical and lateral grid control array structure;
Fig. 2 has provided the transversary schematic diagram of vertical and lateral grid control array structure;
Fig. 3 has provided and has had structural representation vertical and lateral grid control array structure, the carbon nanotube field emission flat-panel screens.
Embodiment
Below in conjunction with drawings and Examples the present invention is further specified, but the present invention is not limited to these embodiment.
Described a kind of flat-panel monitor that has vertical and lateral grid control array structure, comprise by cathode glass faceplate [1], anode glass panel [11] and all around glass enclose the sealed vacuum chamber that frame [15] is constituted; On the anode glass panel, have anode conductive layer [12], preparation on anode conductive layer phosphor powder layer [14] and at the insulation paste layer [13] of the non-display area of anode conductive layer printing; Supporting wall structure between anode glass panel and cathode glass faceplate [17] and getter subsidiary component [16] have cathode conductive layer [5], carbon nano-tube [10] and vertical and lateral grid control array structure on cathode glass faceplate.
Described honeycomb type grid control cathode emitting structural comprises that cathode glass faceplate [1], cathode leg layer [2], negative electrode are lifted and sticks up layer [3], a cathode coating [4], cathode conductive layer [5], separator [6], grid lead layer [7], grid cover layer [8], sacrifice layer [9] and carbon nano-tube [10] part.
The backing material of described vertical and lateral grid control array structure is a glass, as soda-lime glass, Pyrex, just cathode glass faceplate; Metal level after the etching on the cathode glass faceplate forms the cathode leg layer; Doped polysilicon layer formation negative electrode after the etching above the cathode leg layer is lifted and is stuck up layer; Negative electrode is lifted and is stuck up layer for the cylinder type shape, and lower surface is the plane, closely contacts with the cathode leg layer; The silicon dioxide layer that negative electrode is lifted after the etching of sticking up on layer upper surface forms cathode coating; The metal level that negative electrode is lifted after the etching of sticking up on layer side forms cathode conductive layer; Cathode conductive layer is covered with negative electrode and lifts the side of sticking up layer; Silicon dioxide layer after the etching on the cathode glass faceplate forms separator; Have the electron channel hole in the separator, expose negative electrode lift stick up the layer and cathode conductive layer; The electron channel hole is round shape, lifts with negative electrode that to stick up the round-shaped of layer be corresponding, but the diameter that the diameter in electron channel hole is lifted sled layer than negative electrode is big; The medial surface of separator is the face of cylinder perpendicular to cathode glass faceplate; The height outline of separator is lifted the height that sticks up layer less than negative electrode; Metal level after the top etching of separator forms the grid lead layer; The major part of grid lead layer all be positioned at separator above, but its fore-end stretches to the inboard in electron channel hole, presents a kind of vacant state; Silicon dioxide layer after the top etching of grid lead layer forms the grid cover layer; The grid cover layer is wanted whole upper surfaces of cover grid trace layer, comprises its front end overhanging portion grid lead layer upper surface; Metal level after the etching above the grid cover layer forms sacrifice layer; Sacrifice layer is a toroidal, and the central point in its central point and electron channel hole coincides, but interior diameter than the diameter in electron channel hole, be looped around the electron channel hole around; Made of carbon nanotubes is on cathode conductive layer.
The fixed position of described vertical and lateral grid control array structure is for being fixed on the cathode glass faceplate; The cathode leg layer can be metallic gold, silver, copper, aluminium, molybdenum, chromium, tin, indium; Negative electrode is lifted the doping type that sticks up layer can be the n type, also can be the p type; Cathode conductive layer can be metallic iron, cobalt, nickel; The trend of the trend of grid lead layer and cathode leg layer is orthogonal; The grid lead layer can be metallic gold, silver, molybdenum, chromium, aluminium; Sacrifice layer can be metallic gold, silver, molybdenum, aluminium, tin, chromium; Do not apply voltage on the sacrifice layer.
A kind of manufacture craft that has the flat-panel monitor of vertical and lateral grid control array structure, its manufacture craft is as follows:
1) making of cathode glass faceplate [1]: the dull and stereotyped soda-lime glass of integral body is carried out scribing, produce cathode glass faceplate;
2) making of cathode leg layer [2]: on cathode glass faceplate, prepare a metal molybdenum layer, form the cathode leg layer after the etching;
3) negative electrode is lifted the making of sticking up layer [3]: prepare a n type doped polysilicon layer on the cathode leg layer, the formation negative electrode is lifted and is stuck up layer after the etching;
4) making of cathode coating [4]: negative electrode lift stick up the layer upper surface on prepare a silicon dioxide layer, form cathode coating after the etching;
5) making of cathode conductive layer [5]: negative electrode lift stick up the layer the side on prepare a metal nickel dam, form cathode conductive layer after the etching;
6) making of separator [6]: on cathode glass faceplate, prepare a silicon dioxide layer, form separator after the etching;
7) making of grid lead layer [7]: on separator, prepare a metal molybdenum layer, form the grid lead layer after the etching;
8) making of grid cover layer [8]: on the grid lead layer, prepare a silicon dioxide layer, form the grid cover layer after the etching;
9) making of sacrifice layer [9]: on grid is tectal, prepare a metal molybdenum layer, form sacrifice layer after the etching;
10) cleaning surfaces of vertical and lateral grid control array structure is handled: clean is carried out on the surface to vertical and lateral grid control array structure, removes impurity and dust;
11) preparation of carbon nano-tube [10]: with made of carbon nanotubes on cathode conductive layer;
12) making of anode glass panel [11]: the dull and stereotyped soda-lime glass of integral body is carried out scribing, produce the anode glass panel;
13) making of anode conductive layer [12]: evaporation one deck tin indium oxide rete on the anode glass panel; Form anode conductive layer after the etching;
14) making of insulation paste layer [13]: at the non-display area printing insulation paste layer of anode conductive layer;
15) making of phosphor powder layer [14]: the viewing area printing phosphor powder layer on anode conductive layer;
16) device assembling: with cathode glass faceplate, anode glass panel, supporting wall structure [17] and all around glass enclose frame [15] and be assembled together, and getter [16] is put in the middle of the cavity, fix with glass powder with low melting point.Around face glass, smeared glass powder with low melting point, fixed with clip;
17) finished product is made: the device that has assembled is carried out packaging technology form finished parts.
Described step 14 is specially the non-display area printing insulation paste layer at anode conductive layer, is used to prevent the parasitic electrons emission; Through overbaking (baking temperature: 150 ℃, retention time: 5 minutes) afterwards, be placed on and carry out high temperature sintering (sintering temperature: 580 ℃, retention time: 10 minutes) in the sintering furnace;
Described step 15 is specially the viewing area printing phosphor powder layer on anode conductive layer; In the middle of baking oven, toast (baking temperature: 120 ℃, the retention time: 10 minutes);
The device that described step 17 is specially having assembled carries out following packaging technology: toast in the middle of the sample device is put into baking oven; Carry out high temperature sintering in the middle of putting into sintering furnace; On exhaust station, carry out device exhaust, sealed-off, on the roasting machine that disappears, the getter of device inside bake and disappears, install pin formation finished parts at last additional.

Claims (6)

1. the flat-panel monitor of a vertical and lateral grid control array structure, comprise by cathode glass faceplate [1], anode glass panel [11] and all around glass enclose the sealed vacuum chamber that frame [15] is constituted; On the anode glass panel, have anode conductive layer [12], preparation on anode conductive layer phosphor powder layer [14] and at the insulation paste layer [13] of the non-display area of anode conductive layer printing; Supporting wall structure between anode glass panel and cathode glass faceplate [17] and getter subsidiary component [16] is characterized in that:
Cathode conductive layer [5], carbon nano-tube [10] and vertical and lateral grid control array structure are arranged on cathode glass faceplate;
The backing material of described vertical and lateral grid control array structure is glass, just cathode glass faceplate; Metal level after the etching on the cathode glass faceplate forms the cathode leg layer; Doped polysilicon layer formation negative electrode after the etching above the cathode leg layer is lifted and is stuck up layer; Negative electrode is lifted and is stuck up layer for the cylinder type shape, and lower surface is the plane, closely contacts with the cathode leg layer; The silicon dioxide layer that negative electrode is lifted after the etching of sticking up on layer upper surface forms cathode coating; The metal level that negative electrode is lifted after the etching of sticking up on layer side forms cathode conductive layer; Cathode conductive layer is covered with negative electrode and lifts the side of sticking up layer; Silicon dioxide layer after the etching on the cathode glass faceplate forms separator; Have the electron channel hole in the separator, expose negative electrode lift stick up the layer and cathode conductive layer; The electron channel hole is round shape, with negative electrode lift stick up the layer round-shaped be corresponding, but the diameter in electron channel hole than negative electrode lift stick up the layer diameter big; The medial surface of separator is the face of cylinder perpendicular to cathode glass faceplate; The height outline of separator is lifted the height that sticks up layer less than negative electrode; Metal level after the top etching of separator forms the grid lead layer; The major part of grid lead layer all be positioned at separator above, but its fore-end stretches to the inboard in electron channel hole, presents a kind of vacant state; Silicon dioxide layer after the top etching of grid lead layer forms the grid cover layer; The grid cover layer is wanted whole upper surfaces of cover grid trace layer, comprises its front end overhanging portion grid lead layer upper surface; Metal level after the etching above the grid cover layer forms sacrifice layer; Sacrifice layer is a toroidal, and the central point in its central point and electron channel hole coincides, but interior diameter is bigger than the diameter in electron channel hole, be looped around the electron channel hole around; Made of carbon nanotubes is on cathode conductive layer.
2. the flat-panel monitor of vertical and lateral grid control array structure according to claim 1, it is characterized in that: the fixed position of described vertical and lateral grid control array structure is for being fixed on the cathode glass faceplate; The cathode leg layer is one of metal gold, silver, copper, aluminium, molybdenum, chromium, tin, indium; It is n type or p type that negative electrode is lifted the doping type that sticks up layer; Cathode conductive layer is one of metallic iron, cobalt, nickel; The trend of the trend of grid lead layer and cathode leg layer is orthogonal; The grid lead layer is one of metal gold, silver, molybdenum, chromium, aluminium; Sacrifice layer is one of metal gold, silver, molybdenum, aluminium, tin, chromium; Do not apply voltage on the sacrifice layer.
3. the manufacture craft of the flat-panel monitor of a vertical and lateral grid control array structure as claimed in claim 1 is characterized in that, its manufacture craft is as follows:
1) making of cathode glass faceplate [1]: whole plate glass is carried out scribing, produce cathode glass faceplate;
2) making of cathode leg layer [2]: on cathode glass faceplate, prepare a metal level, form the cathode leg layer after the etching;
3) negative electrode is lifted the making of sticking up layer [3]: prepare a doped polysilicon layer on the cathode leg layer, the formation negative electrode is lifted and is stuck up layer after the etching;
4) making of cathode coating [4]: negative electrode lift stick up the layer upper surface on prepare a silicon dioxide layer, form cathode coating after the etching;
5) making of cathode conductive layer [5]: negative electrode lift stick up the layer the side on prepare a metal level, form cathode conductive layer after the etching;
6) making of separator [6]: on cathode glass faceplate, prepare a silicon dioxide layer, form separator after the etching;
7) making of grid lead layer [7]: on separator, prepare a metal level, form the grid lead layer after the etching;
8) making of grid cover layer [8]: on the grid lead layer, prepare a silicon dioxide layer, form the grid cover layer after the etching;
9) making of sacrifice layer [9]: on grid is tectal, prepare a metal level, form sacrifice layer after the etching;
10) cleaning surfaces of vertical and lateral grid control array structure is handled: clean is carried out on the surface to vertical and lateral grid control array structure, removes impurity and dust;
11) preparation of carbon nano-tube [10]: with made of carbon nanotubes on cathode conductive layer;
12) making of anode glass panel [11]: the dull and stereotyped soda-lime glass of integral body is carried out scribing, produce the anode glass panel;
13) making of anode conductive layer [12]: evaporation one deck tin indium oxide rete on the anode glass panel; Form anode conductive layer after the etching;
14) making of insulation paste layer [13]: at the non-display area printing insulation paste layer of anode conductive layer;
15) making of phosphor powder layer [14]: the viewing area printing phosphor powder layer on anode conductive layer;
16) device assembling: with cathode glass faceplate, anode glass panel, supporting wall structure [17] and all around glass enclose frame [15] and be assembled together, and getter [16] put in the middle of the cavity, fix with glass powder with low melting point, around face glass, smeared glass powder with low melting point, fixed with clip;
17) finished product is made: the device that has assembled is carried out packaging technology form finished parts.
4. the manufacture craft of the flat-panel monitor of vertical and lateral grid control array structure according to claim 3, it is characterized in that: the making of described step 14 insulation paste layer is specially the non-display area printing insulation paste layer at anode conductive layer, is used to prevent the parasitic electrons emission; Through overbaking, baking temperature: 150 ℃, the retention time: 5 minutes; Afterwards, be placed on and carry out high temperature sintering in the sintering furnace, sintering temperature: 580 ℃, the retention time: 10 minutes.
5. the manufacture craft of the flat-panel monitor of vertical and lateral grid control array structure according to claim 3 is characterized in that: the making of described step 15 phosphor powder layer is specially the viewing area printing phosphor powder layer on anode conductive layer; In the middle of baking oven, toast baking temperature: 120 ℃, the retention time: 10 minutes.
6. the manufacture craft of the flat-panel monitor of vertical and lateral grid control array structure according to claim 3 is characterized in that: described step 17 finished product is made the device that is specially having assembled and is carried out following packaging technology: toast in the middle of the sample device is put into baking oven; Carry out high temperature sintering in the middle of putting into sintering furnace; On exhaust station, carry out device exhaust, sealed-off, on the roasting machine that disappears, the getter of device inside bake and disappears, install pin formation finished parts at last additional.
CN200610107313A 2006-10-17 2006-10-17 Flat panel display with vertical and lateral grid control array structure and making technique thereof Expired - Fee Related CN1953133B (en)

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CN1953133B true CN1953133B (en) 2010-05-26

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5666024A (en) * 1995-06-23 1997-09-09 Texas Instruments Incorporated Low capacitance field emission device with circular microtip array
CN1794408A (en) * 2005-12-27 2006-06-28 中原工学院 Panel display having adulterated polycrystal silicon field emission cathode array structure and its manufacturing technology

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5666024A (en) * 1995-06-23 1997-09-09 Texas Instruments Incorporated Low capacitance field emission device with circular microtip array
CN1794408A (en) * 2005-12-27 2006-06-28 中原工学院 Panel display having adulterated polycrystal silicon field emission cathode array structure and its manufacturing technology

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