CN1382326A - One way single-wire communication interface - Google Patents
One way single-wire communication interface Download PDFInfo
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- CN1382326A CN1382326A CN00814769A CN00814769A CN1382326A CN 1382326 A CN1382326 A CN 1382326A CN 00814769 A CN00814769 A CN 00814769A CN 00814769 A CN00814769 A CN 00814769A CN 1382326 A CN1382326 A CN 1382326A
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- data
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- data wire
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- voltage
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4286—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a handshaking protocol, e.g. RS232C link
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
- H04L5/16—Half-duplex systems; Simplex/duplex switching; Transmission of break signals non-automatically inverting the direction of transmission
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- Theoretical Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Telephone Function (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
- Dc Digital Transmission (AREA)
- Communication Control (AREA)
Abstract
A data communication interface for transferring at least one data bit to a host processor. The interface includes a one-wire data line, and a slave processor connected to the data line and including a pull-down circuit for varying voltage on the data line. The slave processor is passive and incapable of sampling data from the data line. The slave processor is programmed to vary voltage on the data line when the data line is energined, to signal of at least one data bit.
Description
Related application
It is the priority of the U.S. Provisional Patent Application 60/161,940 on October 28th, 1999 that the application requires the applying date, and this application has transferred the application's assignee, and at this with the list of references of this application as the application.
Background technology
1. invention field
The present invention relates to a kind of equipment that is used for transmission signals between two data processors.Especially, the present invention relates to a kind of equipment that is used for the exchanges data between primary processor and the slave processor.Between two processors, set up a kind of connection, and communication is unidirectional by a data wire, by slave processor to primary processor.
2. correlation technique
For portable electronic equipment, as mobile phone, personal digital assistant, with camcorder, for example, developed and be used for architecture/agreement that the element with various portable electronic equipments links together, like this can communication between them.A simple example is battery pack (a kind of " subordinate " element), and it is connected with a kind of portable electronic equipment (a kind of " master " equipment) removably.At least, battery pack should be able to communicate with portable electronic equipment, the electric weight of notice camcorder about being contained in its battery.
Preferably, this communication structure is designed to have the least possible connection.At present, the most a kind of system configuration of normal use is system management (SM) bus, and it comprises three lines, connects main equipment and subordinate element.This equipment and element pass through a line communication wherein, and clock signal provides by the second line, and the 3rd line is used for ground connection.
A kind of popular agreement that is used for the SM bus at present is interface integrated circuit (Inter-Integrated Circuit) (I
2C), it is developed by Philips Semiconductor Co., Ltd. at first.This agreement is used a synchronizing signal, and has the advantage (comprising a plurality of batteries, wherein the various states of this each battery of system monitoring) of holding a plurality of major components and a plurality of subordinate elements.
For mobile-phone manufacturers, emphasized to use the communication structure that only contains two lines.A kind of architecture/agreement that is adopted by most of cellular telephone companies gets company and exploitation " DQ " system of Texas Instruments by dallas semiconductor company, this strange mark company, excellent Isosorbide Dinitrate.This DQ system uses a single line with an earth connection main equipment to be connected with a plurality of subordinate elements.But data are transmitted in both directions on that non-earth connection.This architecture comprises a pull-up resistance, is used to keep this line to be in high state, and allows data to be transmitted when this line states drags down, and like this for each transmitted bit position, the state of transmission line can be high state or low state.
A shortcoming two-way, single bus is, owing to be connected to a plurality of subordinate elements of a main equipment, it is complicated that handshaking becomes, and main equipment must be inquired each subordinate element respectively.
Another shortcoming two-way, single bus is that needs use the contact of some time domains or frequency domain, follow the tracks of two hemichannels of communication.Be devoted to minimizing of this system cost, provide a kind of primary time base by using a kind of unsettled oscillator.This primary time base with the correlation of electricity, provides necessity reference that is used for by the both-way communication of a single bus.
Another shortcoming two-way, single bus is, because the bidirectional characteristic of communication, the subordinate element necessarily requires from the data wire reading of data and receives the ability of information from main equipment.Therefore, I
2Subordinate element in the C system will in most of the cases require the subordinate element that the architecture that allows reception information must be arranged, and has therefore increased the cost and the complexity of subordinate element.
Therefore, now still expectation be a kind of novel and the improved communication architecture/agreement that is used to be connected a subordinate element processor and a major component processor.Preferably, with above-mentioned I
2C and DQ system compare, and this novel architecture/agreement will be simple with cheaply.
Summary of the invention
In order to address the above problem, the invention provides a kind of data communication interface, be used for transmitting at least one data bit to a primary processor.This interface comprises a single line data wire and a slave processor that is connected to data wire, and this slave processor comprises a pull-down circuit, is used to change the voltage on the data wire.This slave processor is the ability of reading of data from the data wire not, but it is programmed, and when data wire is activated, uses the pull-down circuit to change voltage on the data wire, to send the signal of at least one data bit.
According to one aspect of the present invention, slave processor is programmed, so that descend to send signal " 0 " and the voltage on the data wire that is activated is improved to send signal " 1 " at the voltage on the data wire that is activated.
According to another aspect of the present invention, this interface comprises a primary processor that is connected to data wire, and this primary processor also comprises a pull-down circuit, under the request of primary processor, is used to change the voltage on the data wire.This primary processor can be from reading of data on the data wire, and is programmed, and when need be from least one data bit of slave processor, uses the pull-down circuit with the activation data line.Primary processor also is programmed, and is used for reading voltage from the data wire that is activated, with a place value of determining to be sent by slave processor.
Just as described in detail later, present disclosed communication architecture/agreement has been used minimum hardware, and the information of preliminary election is transmitted to primary processor by slave processor.The form of communication is simple, and does not require continuous monitoring, and the result has reduced the energy consumption of primary processor and slave processor simultaneously, and this is important naturally in portable electronic equipment.Therefore, present disclosed unidirectional, single-wire communication interface, for hand-held or other lower powered portable electric appts, for example mobile phone, personal digital assistant and camcorder are attractive especially.
Brief description of the drawings
The disclosure is described with reference to the accompanying drawings, wherein:
Fig. 1 is the schematic diagram of a simplification, illustrates according to a communication interface of the present invention, comprises that a subordinate element links to each other with a main equipment bus nondirectional by, single line.
Fig. 2 has shown that data line voltage to the chart of time, has illustrated the nondirectional communication according to interface among use Fig. 1 of the present invention.
Fig. 3 has shown a flow chart, and " data are the making just " algorithm that is used by the main equipment among Fig. 1 according to of the present invention is described.
Fig. 4 has shown a flow chart, and the algorithm according to " the transmission data " used by the subordinate element among Fig. 1 of the present invention is described.
Fig. 5 has shown a flow chart, and " transmission data " algorithm that is used by the client device among Fig. 1 according to of the present invention is described.
Fig. 6 is the schematic diagram of a simplification, illustrates according to communication interface of the present invention, comprises nondirectional a, single bus, will comprise that the subordinate element of a battery pack is connected to the main equipment that comprises a portable type electronic product.
Fig. 7 is the schematic diagram of a simplification, and a foundation computer processing unit of the present invention is described, is suitable for and other similar computer processing unit series connection, is used for the continuous communication with a main equipment; And
Fig. 8 is the schematic diagram of a simplification, a battery pack according to the present invention's structure is described, and comprises that the polynary computer processing unit among Fig. 7 is connected in series, is used for the continuous communication with main equipment.
In these several figure, same label shows identical or consistent element and unit.
The detailed description of invention
Referring to figs. 1 to Fig. 4, the invention provides by slave processor by a single line data wire, to a kind of method of at least one data bit signal of primary processor transmission.This method comprises provides a slave processor, and it can not be from reading of data on this data wire.This method also comprises uses a primary processor to activate this data wire when need be from least one data bit of slave processor; The use slave processor changes the voltage on the data wire that is activated; With use primary processor reading numerical values place value from the data wire that is activated to determine to transmit by slave processor.
After the data bit of needs was sent by slave processor, primary processor discharged this data wire.Preferably, a preliminary election time domain after being activated by primary processor at this line, slave processor just begins to change the voltage on the data wire that is activated, and sends a data bit, and primary processor has been ready to receive the total data signal like this.
As shown in Figure 2, primary processor activates this data wire by the voltage on this data wire being increased to a high logic level.Then, this slave processor drags down the voltage on the data wire that is activated, and sends signal " 0 ", improves the voltage on the data wire that is activated, and sends signal " 1 ".The electric charge that these means of communication are preferably designed to the battery that makes this module produces and minimizes.Therefore, this slave processor never sends electric current to this data wire, but received current.
As shown in Figure 1, the main equipment with computer processor (CPU) comprises primary processor.This CPU also comprises a pull-down transistor by primary processor control, is used to change the voltage on the data wire.A subordinate element has a CPU who comprises slave processor, and this CPU also comprises the pull-down resistance that impedance is very high, is used to change the voltage on the data wire.(a high impedance pull-down resistance that is used for the subordinate element is just for fear of floating node occurring).As shown in the figure, this system also comprises a power line and a ground wire, extends between this equipment and this element.All transmission lines can disconnect connection between subordinate element and major component, like this, these lines can reconnect as required, and just the subordinate element can insert in the main equipment and (for example as a battery pack, be inserted in the mobile phone).
Fig. 3 has shown " data initialization " algorithm that uses according to the present invention, by the primary processor among Fig. 1, and Fig. 4 has shown one according to the disclosure, " transmission data " algorithm that is used by the slave processor among Fig. 1.Use " transmission data " algorithm among Fig. 4,, just begin action when slave processor is waken up by primary processor until activating this data wire when primary processor.
Fig. 5 has shown optional " transmission data " algorithm that uses according to the present invention, by the client device among Fig. 1.Use this optional algorithm, data wire was not activated by primary processor, slave processor was also attempted sending data simply in the predetermined cycle.
In Fig. 6, shown a subordinate element that comprises battery pack, this battery pack comprises the subordinate CPU among Fig. 1.Except subordinate CPU, this battery pack also comprises a battery, the measuring equipment that at least one is used to measure the variable performance of battery and produces the analog signal of an indication measurement value, with an A/D converter that is used for indication measurement value analog signal conversion is become at least one data bit.This subordinate CPU is connected to transducer, and comprises memory (not showing), is used for receiving at least one data bit from transducer, and stores at least one data bit, is activated until this data wire.
As shown in Figure 6, at least one measuring equipment in the battery pack comprises the instrument of measuring voltage, electric current, temperature and electric current consumption.Simultaneously shown that also this battery pack can be connected with a portable product (for example mobile phone) that comprises the host CPU among Fig. 1.
With reference to figure 7, another subordinate CPU comprises a signal input line, a data output line and an output line.Subordinate CPU also comprises a processor, and it comprises a pull-down circuit, is used to change the voltage on the output line.This processor is connected on signal input line and the DOL Data Output Line, and is programmed, and when the change in voltage on the input signal cable, carries at least one data bit by DOL Data Output Line.This processor also is programmed, and when finishing at least one data bit of conveying by this DOL Data Output Line, changes the voltage on the output line.
Subordinate CPU among Fig. 7 is suitable for and other subordinate element connected in series, is used for carrying out continuous communication with main equipment.Fig. 8 has shown a battery pack according to disclosure structure, and comprises the polynary subordinate element among Fig. 7, and is connected in series together, is used for carrying out continuous communication with main equipment.Each subordinate element is connected to a battery.Although do not show that each subordinate element comprises the measuring equipment and the A/D converter that are used to measure the variable performance of battery at least, the analog signal conversion that is used for measuring equipment is produced is a digital signal.
As shown in the figure, the signal input line of subordinate CPU and output line are connected.This assembly also comprises an assembly CPU, and it has a processor, single line data wire, an information wire and an order wire that is connected to article one signal input line of the subordinate element that is connected that is used to receive from signal on each DOL Data Output Line of subordinate element that is used to be connected to a major component (not having to show).
This component processor is connected to this module data line, and comprises first pull-down circuit, is used to change the voltage on the data wire, to send signal to the main frame that is connected on this data wire.This processor also is connected with order wire, and comprises second pull-down circuit, is used to change the voltage on the order wire.This processor also is connected to information wire.
This processor is programmed, use the voltage on the second pull-down circuit change order wire when being activated, carry signal, report information to first subordinate CPU with this data wire of box lunch.This component processor also is programmed, when on information wire, receiving at least one data bit from the subordinate element with box lunch, use the voltage on first pull-down circuit change data wire, send information by data wire, comprise that to the subordinate element (be first subordinate, second subordinate ...) and the identification of at least one data bit (being the information of each battery of subordinate) of specific subordinate element.
Therefore, when the data wire of primary processor activation component, this component processor has reduced the voltage on the order wire, notifies first subordinate CPU, sends about the information of first battery CPU to this assembly by information wire.This component processor by this data wire, utilizes the agreement among Fig. 2 then, and the number of transmission battery and information are to primary processor.
Then, to their battery information of assembly CPU report, this CPU reports the identifier and the battery information of battery successively continuously to primary processor continuously for second, third and the 4th subordinate (parts).The output line of last subordinate CPU (the 4th slave unit in specific specific embodiment) also is connected on the information wire of component processor.When last subordinate (parts) was finished to assembly CPU report information, last slave unit sent signal to assembly, showed that last slave unit reports by the output line of slave unit and the information wire of assembly CPU.Assembly CPU can send signal to primary processor then, and all slave units of assembly have been reported and finished.
The signal input line of subordinate CPU preferably links to each other by electric pressure converter with output line, and DOL Data Output Line preferably is connected to the information wire of assembly CPU by optical isolator.In addition, the output line of slave unit links to each other by optical isolator with the information wire of assembly CPU.
Therefore, the invention provides a kind of new and improved communication architecture and agreement, it is included in and connects an one-way data line between primary processor and the slave processor.In the method, this primary processor (it may be a portable electronic component, for example mobile phone, PDA or camcorder) contains a switch, is used for a positive voltage is coupled to data wire.Slave processor (it can be included in the battery pack and be used for monitoring battery) uses a predetermined agreement then, sends signal by certain speed, but is a direction along data wire.
Therefore, when primary processor needed information, primary processor activated this data wire, and slave processor can send information to primary processor.When finishing from the transfer of data of slave processor, or in (just under the judgement at primary processor) before the end of transmission, primary processor can be removed the voltage on the data wire, makes the data line voltage step-down.Slave processor can be activated by program, and when data wire is activated, only sends data, or no matter the state of this data wire sends data continuously.
According to the present invention, in an equipment that contains a plurality of slave processors, interrogate that by primary processor the work of each slave processor is carried out continuously and periodically.In a specific embodiment (not show), each slave unit can comprise a memory device, shift register for example, and it is the real-time update information needed continuously, and is sent to primary processor.Then, when slave unit is activated by primary processor, the information after primary processor provides nearest renewal.Another specific embodiment (not showing) can comprise a system, is used to monitor a plurality of batteries along with the cycle and staggered time delay, or a wired OR logic sequence, is just interrogated to determine which slave unit.Multiple qualification program or logic sequence can be used to also determine whether that another slave unit is using this single line data wire.
It should be understood that for those skilled in the art specific embodiments described above is only used for illustrating the present invention.These embodiment can help to illustrate some scopes of notion of the present invention, but these embodiment are not restricted to these embodiment.Therefore, the scope of the notion of initiative of the present invention not merely is defined by the claims.
Claims (20)
1. one kind is transmitted the method for at least one data bit to primary processor by slave processor by single line data wire, comprising:
Provide one can not be from the slave processor of reading of data on the data wire;
When needs during, use primary processor to activate this data wire from least one data bit of slave processor;
The use slave processor changes the voltage on the data wire that is activated; With
Use primary processor, read the voltage on the data wire that is activated, with a place value of determining to send by slave processor.
2. according to the method for claim 1, also comprise when the data bit of needs is sent by slave processor, discharge data wire.
3. according to the process of claim 1 wherein, this slave processor just after past time cycle of preliminary election, changes the voltage on the data wire that is activated.
4. according to the process of claim 1 wherein that this slave processor drags down the voltage on the data wire that is activated, to send a signal " 0 ".
5. according to a kind of method of claim 1, wherein, this slave processor improves the voltage on the data wire that is activated, and sends a signal " 1 ".
6. according to the process of claim 1 wherein, this primary processor activates this data wire by improving data wire to a high logic level.
7. one kind is used to transmit the communication interface of at least one data bit to primary processor, comprising:
, a single line data wire;
A slave processor that is connected to this data wire, and comprise a pull-down circuit, being used under the request of slave processor, changing the voltage on this data wire, this slave processor can not be from reading of data on this data wire;
Wherein, this slave processor is programmed, and is used for when this data wire is activated, and uses this pull-down circuit, changes the voltage on this data wire, so that send at least one data bit.
8. according to the interface of claim 7, wherein, this slave processor comprises a clock and is programmed, so that after only going in the time cycle of a preliminary election, change the voltage on the data wire that is activated.
9. interface according to claim 7, wherein, this slave processor is programmed so that reduce voltage on the data wire that is activated, sends a signal " 0 ".
10. interface according to claim 7, wherein, this slave processor is programmed so that improve voltage on the data wire that is activated, sends a signal " 1 ".
11. the interface according to claim 7 also comprises:
A primary processor that is connected to this data wire, and comprise a pull-down circuit, be used under the request of primary processor, change the voltage on the data wire, this primary processor can be from reading of data on this data wire;
Wherein, this primary processor is programmed, and is used for when need be from least one data bit of slave processor, use this pull-down circuit, activate this data wire, and read the voltage on this data wire that is activated, to determine a place value by slave processor was sent.
12. according to the interface of claim 11, wherein, this primary processor activates this data wire by voltage to one high logic level that improves this data wire.
13. a battery pack comprises an interface according to claim 7, also comprises:
A battery;
At least one measuring equipment, this equipment are used to measure the variable performance of this battery and produce the analog signal of this measured value of indication; With
An analog-digital converter that is connected with this measuring equipment, the analog signal conversion that is used for the indication measurement value is at least one data bit;
Wherein, this slave processor is connected to this analog-digital converter, and comprises the memory that is used to receive from least one data bit of this transducer, and stores at least one data bit, is activated up to data wire.
14. one kind is used to send the subordinate element of at least one data bit to main equipment, comprises:
One bars incoming line;
, a DOL Data Output Line;
One bars output line; With
A processor comprises a pull-down circuit, is used to change the voltage on the output line, and this processor is connected on this signal input line and the DOL Data Output Line;
Wherein this processor is programmed, and is used for by this DOL Data Output Line, transmitting at least one data bit when the voltage of signal input line changes, and is used for changing the voltage on this output line after transmitting at least one data bit by this DOL Data Output Line.
15. a battery pack comprises an interface according to claim 14, also comprises:
At least one measuring equipment is used to measure the variable performance of a battery, and produces the analog signal of an indication measurement value; With
An analog-digital converter that is connected to this measuring equipment, the analog signal conversion that is used for the indication measurement value is at least one data bit;
Wherein, this processor is connected to this transducer, and comprises the memory that is used to receive from least one data bit of this transducer, stores at least one data bit, and the voltage on signal input line is changed.
16., also comprise a battery according to the battery pack of claim 15.
17. an assembly comprises the polynary subordinate element according to claim 14, wherein these subordinate elements are contacted by signal input line and output line, and this assembly also comprises a component interface, and this interface comprises:
Article one, be used for the single line data wire that is connected with major component;
Article one, be used to receive information wire from least one data bit of each DOL Data Output Line of subordinate element;
Article one, be connected to the order wire of the signal input line of first subordinate element that connects;
A processor that is connected to data wire, and comprise first pull-down circuit, be used to change the voltage on the data wire; This processor can not be from reading of data on this data wire; This processor is connected to this information wire and order wire, and comprises second pull-down circuit, is used to change the voltage on the order wire;
Wherein, this processor is programmed, and when this data wire is activated, uses second pull-down circuit, changes the voltage on the order wire; With
When at least one data bit of on information wire, receiving from one of them subordinate element, use first pull-down circuit, change the voltage on the data wire, send information, comprise identification at least one data bit of subordinate element and this specific subordinate element by data wire.
18. according to the assembly of claim 17, wherein these subordinate elements are connected by electric pressure converter.
19. according to the assembly of claim 17, wherein the DOL Data Output Line of these subordinate elements is the information wires that are connected to component processor by optical isolator.
20. according to the assembly of claim 17, wherein the output line of last subordinate element is connected with the information wire of this component processor.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US16194099P | 1999-10-28 | 1999-10-28 | |
| US60/161,940 | 1999-10-28 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN1382326A true CN1382326A (en) | 2002-11-27 |
Family
ID=22583467
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN00814769A Pending CN1382326A (en) | 1999-10-28 | 2000-10-27 | One way single-wire communication interface |
Country Status (8)
| Country | Link |
|---|---|
| EP (1) | EP1230741A4 (en) |
| JP (1) | JP2003513504A (en) |
| KR (1) | KR20020033794A (en) |
| CN (1) | CN1382326A (en) |
| AU (1) | AU1350901A (en) |
| MX (1) | MXPA02002334A (en) |
| TW (1) | TW531985B (en) |
| WO (1) | WO2001031801A1 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102968082A (en) * | 2012-11-21 | 2013-03-13 | 成都金亚科技股份有限公司 | Method for realizing single line communication of singlechip |
| CN104520830A (en) * | 2012-08-03 | 2015-04-15 | 微软公司 | Single wire concurrent bi-directional communication for power supply unit |
| CN106201973A (en) * | 2016-06-30 | 2016-12-07 | 珠海智融科技有限公司 | A kind of method and system of single wire serial communication interface |
| CN108872830A (en) * | 2018-06-07 | 2018-11-23 | 苏州纳芯微电子股份有限公司 | A kind of single line test method for sensor conditioning chip |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008021038A (en) * | 2006-07-11 | 2008-01-31 | Fujitsu Ltd | Clock signal control method in common clock system, and integrated circuit device |
| US20140143588A1 (en) * | 2012-11-21 | 2014-05-22 | Nokia Corporation | Instant Communication Error Indication From Slave |
| TWI705335B (en) | 2018-10-15 | 2020-09-21 | 新唐科技股份有限公司 | Integrated circuit, bus system and detecting method thereof |
| CN112003817B (en) * | 2020-06-30 | 2021-10-15 | 上海美仁半导体有限公司 | Signal conversion method, chip and household appliance |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5023778A (en) * | 1990-03-23 | 1991-06-11 | General Motors Corporation | Interprocessor communication method |
| US5396639A (en) * | 1991-09-16 | 1995-03-07 | Rohm Co., Ltd. | One chip microcomputer having programmable I/O terminals programmed according to data stored in nonvolatile memory |
| JP3406444B2 (en) * | 1995-01-10 | 2003-05-12 | 富士通株式会社 | Bus controller for data transfer system |
-
2000
- 2000-10-27 WO PCT/US2000/029726 patent/WO2001031801A1/en not_active Application Discontinuation
- 2000-10-27 JP JP2001533641A patent/JP2003513504A/en active Pending
- 2000-10-27 CN CN00814769A patent/CN1382326A/en active Pending
- 2000-10-27 EP EP00975459A patent/EP1230741A4/en not_active Withdrawn
- 2000-10-27 KR KR1020027003245A patent/KR20020033794A/en not_active Application Discontinuation
- 2000-10-27 AU AU13509/01A patent/AU1350901A/en not_active Abandoned
- 2000-10-27 MX MXPA02002334A patent/MXPA02002334A/en unknown
- 2000-10-30 TW TW089122849A patent/TW531985B/en active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104520830A (en) * | 2012-08-03 | 2015-04-15 | 微软公司 | Single wire concurrent bi-directional communication for power supply unit |
| CN104520830B (en) * | 2012-08-03 | 2017-08-04 | 微软技术许可有限责任公司 | The concurrent two-way communication of single line for power supply unit |
| CN102968082A (en) * | 2012-11-21 | 2013-03-13 | 成都金亚科技股份有限公司 | Method for realizing single line communication of singlechip |
| CN106201973A (en) * | 2016-06-30 | 2016-12-07 | 珠海智融科技有限公司 | A kind of method and system of single wire serial communication interface |
| CN108872830A (en) * | 2018-06-07 | 2018-11-23 | 苏州纳芯微电子股份有限公司 | A kind of single line test method for sensor conditioning chip |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2001031801A1 (en) | 2001-05-03 |
| JP2003513504A (en) | 2003-04-08 |
| KR20020033794A (en) | 2002-05-07 |
| MXPA02002334A (en) | 2002-07-30 |
| TW531985B (en) | 2003-05-11 |
| EP1230741A4 (en) | 2006-04-26 |
| EP1230741A1 (en) | 2002-08-14 |
| AU1350901A (en) | 2001-05-08 |
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