CN1271788C - A/D converter of adopting improved type fold circuit - Google Patents
A/D converter of adopting improved type fold circuit Download PDFInfo
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- CN1271788C CN1271788C CN 03116146 CN03116146A CN1271788C CN 1271788 C CN1271788 C CN 1271788C CN 03116146 CN03116146 CN 03116146 CN 03116146 A CN03116146 A CN 03116146A CN 1271788 C CN1271788 C CN 1271788C
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Abstract
The present invention relates to an analog-to-digital converter which adopts an improved folding circuit. The analog-to-digital converter is composed of a reference resistor string, a preliminary magnifying and sampling hold circuit, a coarse analog-to-digital converter, a folding circuit, an interpolation circuit, a decoding circuit, etc., wherein the folding circuit is composed of an amplifying circuit and an output circuit, and the original resistor is replaced by a transistor. In the present invention, the area of a circuit module is largely reduced, the interference rejection of the output common-mode voltage is enhanced, and the power consumption is reduced.
Description
Technical field
The present invention relates to adopt the analog to digital converter of the folding electric circuit module after the improvement, especially a kind of analog to digital converter of folding interpolating structure.
Background technology
The design of high-speed AD converter is a bottleneck in the mixed-signal system chip design, and it consumes a large amount of chip area, power consumption and design time.Simultaneously, the analog to digital converter of high speed intermediate resolution has a wide range of applications at high-speed data communication, liquid crystal display driving, digital oscilloscope, hard drive circuit, high definition TV aspects such as (HDTV).The analog to digital converter of early stage this class formation is all realized with bipolar technology or BiCMOS technology.After the mid-90, because the development of CMOS technology and the raising of designing technique, the analog to digital converter of realizing with CMOS technology begins to occur.It is advantageous that area is little and be beneficial to that particularly digital circuit is integrated with other circuit, low price.
All-parallel A/D converter is fastest analog-digital converter structure.Analog input signal and be input to the input of comparator respectively by the reference voltage that increases gradually that resistance string produces, the analog to digital converter of N bit resolution needs 2
N-1 comparator.Comparator is output as thermometer code, and it can be encoded to binary code or other yard output.The advantage of all-parallel A/D converter is only to need single phase clock, and structural design is simple, and high frequency performance is good.Shortcoming is required comparator number and resolution exponent function relation, so its power consumed, chip area that occupies and input capacitance also with the resolution exponent function relation.Another shortcoming is that the input imbalance of comparator has limited the resolution that all-parallel A/D converter can reach.
The required comparator number of all-parallel A/D converter is a lot, and the application of folding electric circuit just can realize reducing the purpose of comparator number, and the quantity of minimizing is relevant with collapse factors.Fig. 1 is that a 8bit resolution has adopted the analog to digital converter schematic diagram behind the foldable structure, and collapse factors is 8.Folding electric circuit generally is made up of to obtain folded signal one group of cross-linked difference input.And interpolating circuit can produce some middle folded signals by existing folded signal, reduces the required collapsed modular unit number of analog to digital converter.Fig. 2 is an explanation schematic diagram of interpolation.
The output loading of the folding electric circuit module that adopts in the present folding interpolating structure analog to digital converter generally all is a resistance, it is all the more so when the back interpose module is selected the voltage interpolation mode for use, as M.Choe, B.Song, and K.Bacrania, " An 8-b100-MSample/s CMOS pipelined folding ADC; " IEEE J.Solid-State Circuits, vol.36, pp.184-194, Feb.2001; P.Vorenkamp and R.Roovers, " A 12-b 60-MSample/s cascaded folding andinterpolation ADC; " IEEE J.Solid-State Circuits, vol.30, pp.1876-1886, Dec.1997 and A.Venes andR.van de Plassche, " An 80-MHz 80-mW 8-b CMOS folding A/D converter with distributedtrack-and-hold preprocessing; " IEEE J.Solid-State Circuits, vol.31, pp.1846-1853, Dec.1996.But in the CMOS in modern times integrated circuit technology the inside, resistance will take very big area.And the absolute size actual value of its resistance and the design load deviation that has 10%-50%, thereby influence the output common mode voltage and the gain of folding electric circuit.Simultaneously, output common mode voltage is subjected to the influence of mains voltage variations also can be very big.
Summary of the invention
The object of the present invention is to provide a kind of analog to digital converter that adopts the modified model folding electric circuit, existing folding electric circuit module area is big to overcome, output common mode voltage and gain are subject to disturb deficiencies such as drift.
The analog to digital converter that the present invention proposes, by reference resistance string 40, amplify in advance and sampling hold circuit 41, roughcast number converter 42, output are synchronous 43, folding electric circuit 44, interpolating circuit 45, comparator 46, decoding decoding 49 connect and compose through circuit, its structure is seen shown in Figure 3.Wherein, folding electric circuit 44 is a kind of folding electric circuits that improved, and it is made up of amplifying circuit and output circuit.Wherein substituted resistance in the former folding electric circuit fully with transistor.
The improvement folding electric circuit that the present invention adopts as shown in Figure 7.Wherein amplifying circuit comprises M identical simple amplifying unit, and these unit amplify the difference input voltage M, and adopt same bias voltage to come to provide bias current I to amplifying unit, so that identical to the gain amplifier of every pair of difference input voltage.The input of these difference is exactly the output of top pre-amplification and sample holding unit in the analog to digital converter, two one of inputs of this unit are the analog input signals of analog to digital converter, one is reference voltage, the input reference voltage of each unit has nothing in common with each other, their the output input of folding electric circuit just like this, the pairing analog signal input range of its range of linearity is also had nothing in common with each other.The output of M amplifying unit links together by cross-linked mode, and promptly the positive output end of the 1st unit links to each other with the negative output terminal of the 2nd unit, and the positive output end with the 3rd unit links to each other again, and the rest may be inferred.Relative, the negative output terminal of the 1st unit links to each other with the positive output end of the 2nd unit, and the negative output terminal with the 3rd unit links to each other again, and the rest may be inferred.Amplifying unit all has certain amplification linear zone, is exactly the saturation region outside this.In the amplifying circuit of folding electric circuit, have nothing in common with each other in the analog input signal zone of the pairing analog to digital converter of each amplifying unit linear zone, so along with the analog input signal voltage of analog to digital converter raises gradually, just can obtain the folding output current signal of a pair of difference at the output of amplifying circuit, their common mode current is MI/2, and peak value is I.Output circuit finally converts current signal to voltage signal again.Output circuit is made up of two symmetrical fully modules, and the difference output of amplifying circuit is exported a pair of differential voltage signal respectively as the input of these two modules.Each module comprises a filter DC circuit, a current mirror, an electric current commentaries on classics potential circuit.The filter DC circuit filters the most common mode current direct current composition in the amplifying circuit output, keeps remaining direct current and whole AC signal, and this part signal further amplifies through current mirror, changes potential circuit by electric current again and obtains output voltage signal.
In the middle of the folding electric circuit, each amplifying unit is made of a pair of difference input transistors and offset respectively in the amplifying circuit, and the pair of source short circuit of difference input pipe forms the common source end, and two drain terminals are positive negative outputs, and two grids are differential input ends; Offset source and ground join, and drain terminal connects the common source end of difference input pipe, and grid connects input offset voltage.The difference input pipe is responsible for differential input signal is amplified, and exports with current forms.Offset then provides the bias current of circuit working necessity for amplifying unit.In the output circuit, the filter DC circuit is exactly a transistor, and source termination power, drain terminal connect the output of amplifying circuit, and grid connects another bias voltage, makes that to flow through this transistorized electric current be a stable value; Current mirror is made up of two transistors, their source end all connects power supply, the grid end links to each other and forms grid end altogether, the drain terminal of one of them grid end together links to each other and also is connected to that transistor drain terminal of filtering DC circuit, the transistorized drain terminal of another one is then exported an electric current changes potential circuit to electric current, and the size of electric current is relevant with the ratio of two pipe sizings of current mirror; It then is the transistor of a source end ground connection that electric current changes potential circuit, and its drain-gate short circuit also links to each other with the output of current mirror, can equivalence regard a resistance as, is responsible for converting the current mirror output current to voltage and exports.
The folding output signal of folding electric circuit by interpolating circuit can obtain more in the middle of folded signal, input to comparator then and produce digital loop temperature coding, each yard all corresponding the size of analog input signal value of analog to digital converter.
Circuit after the improvement is not because there has been resistance, so circuit area can reduce greatly, the absolute value error owing to resistance itself causes output common mode voltage and gain drift also just not to exist simultaneously.From the operation principle of circuit, the circuit output common mode voltage after the improvement is only relevant with transistorized size with the common mode current of folding electric circuit, and it doesn't matter basically with supply voltage, so the anti-power source change interference performance of output common mode voltage obviously strengthens.In addition, the proportional sizes by the Control current mirror can easily obtain our desired gain, makes circuit design convenient.The filter DC circuit can filter the central most direct current composition of folding current signal, reduces power consumption.
Description of drawings
Fig. 1 shows the schematic diagram of folding conversion notion.
Fig. 2 shows the schematic diagram of interpolation conversion notion.
Fig. 3 shows and has adopted folding interpolating structure analog to digital converter block diagram of the present invention.
The waveform schematic diagram of each module when Fig. 4 shows folding electric circuit work.
Fig. 5 shows the circuit connection diagram of single collapsed modular unit commonly used.
Fig. 6 shows each main node work wave of single collapsed modular unit commonly used.
Fig. 7 shows the circuit connection diagram by the single collapsed modular unit behind the method improvement of the present invention.
Fig. 8 shows each main node work wave of collapsed modular unit of the present invention.
Fig. 9 shows the application block diagram of folded interpolating A/D converter in liquid crystal display (LCD) drives.
Embodiment
Further describe the present invention below in conjunction with accompanying drawing.
Analog to digital converter 50 by reference resistance string 40, amplify in advance and sampling hold circuit 41, roughcast number converter 42, output are synchronous 43, folding electric circuit 44, interpolating circuit 45, comparator 46, decoding decoding 49 constitute.Its circuit block diagram as shown in Figure 3.Pre-amplification and sampling hold circuit 4I receive analog input signal and increase progressively reference voltage as input by what reference resistance string 40 produced, and output W group differential signal is respectively to roughcast number converter 42 and folding electric circuit 44.The L that folding electric circuit 44 produces just can obtain K to the folding output in centre differential pair through interpolating circuit 45 again to folding output differential pair.Roughcast number converter 42 then is used for producing the high X position (MSB) of whole analog to digital converter 50 numeral outputs.By the interpolating circuit 45 new K that produce the folding output in centre differential pair being delivered to comparator 46 together with initial L to folding output differential pair compares, the result of output is exactly a digital loop temperature coding, obtains remaining low (N-X) position (LSB) of whole analog to digital converter 50 numeral outputs through decoding decoding 49 at last.The output of the high X position of roughcast number converter 42 needs to adjust sequential final more all figure place N of analog to digital converter 50 that export after low (N-X) bit synchronization by an output synchronous 43.Details description more specifically can be with reference to people's such as P.Vorenkamp documents and materials.
Wherein, folding electric circuit 44 is made of L same unit combination 52, and its block diagram as shown in Figure 4.What each folding electric circuit modular unit 51 was exported all is through folding signal and these signals certain phase shift to be arranged all each other, and the size of phase shift is relevant with the interpolation coefficient of folding unit number and back.Phase shift is the difference of pre-amplification and sampling hold circuit 41 to be exported to intersect mutually in certain sequence deliver to the realization as importing of each folding electric circuit modular unit 51.
The connection layout of the circuit 60 of single collapsed modular unit commonly used as shown in Figure 5.Among the figure topmost part, such as just not providing in the generation circuit diagram of bias voltage Vbiasn.But this does not influence the generation that helps to understand folded signal by this figure.Circuit 60 used components and parts have n channel mosfet (nMOS) transistor 60-74 and resistance 78-79, mainly contain two part circuit, and one is that 76, one of amplifying circuits are output load resistance 78-79.Amplifying circuit 76 is made of M identical basic difference amplifying unit 81-85, is example with 5 here.Because it is all identical with operation principle that basic difference amplifying unit 81-85 internal circuit connects, just only illustrate with unit 81.Unit 81 has 3 nMOS transistors, and one is offset 70, its source end ground connection, and grid termination bias voltage Vbiasn is for this element circuit 81 provides work required bias current I0.Two is differential pair tube 60-61 in addition, their source end short circuit also links to each other with the drain terminal of offset 70, their grid end is that the difference input is to voltage, grid termination difference is imported the negative output terminal that the drain terminal of the nMOS pipe 60 of anode Vin1+ is this element circuit 81, and the input of grid termination difference is the positive output end of this element circuit 81 to the drain terminal of the nMOS pipe 61 of negative terminal Vin1-.When difference input voltage vin 1+ and Vin1-were in linear zone and change, the electric current of the difference output end of unit 81 was also followed variation, and size is relevant with the variation size between difference input voltage vin 1+ and the Vin1-.When difference input voltage vin 1+ and Vin1-were in the saturation region, one in the electric current of difference output end was I
0, one is 0, no change.What all basic difference amplifying unit 81-85 adopted is same bias voltage, makes that the gain that every pair of difference is imported voltage all is the same.The output of all basic difference amplifying unit 81-85 links together by cross-linked mode, the positive output end of Unit 81 links to each other with the negative output terminal of Unit 82, positive output end with Unit 83 links to each other again, and the rest may be inferred, obtains the output end current I of amplifying circuit 76
F2Relative, the negative output terminal of Unit 81 links to each other with the positive output end of Unit 82, and the negative output terminal with Unit 83 links to each other again, and the rest may be inferred, obtains the output end current I of amplifying circuit 76
F1Amplifying unit 81-85 difference input separately is not overlapping to the voltage linear district, along with the gradually changing of analog input voltage, has just produced folding difference output current signal I like this
F1And I
F2, I
F1+ I
F2=MI
0, at this M=5.Output load resistance 78-79 then is with folding difference output current signal I
F1And I
F2Convert voltage signal to and as the output of circuit 60.Fig. 6 is circuit 60 each main node work wave, I
F1And I
F2Common mode current separately is MI
0/ 2, peak-to-peak value is I
0Output voltage V out+=VDD-I
F1R1, Vout-=VDD-I
F2R2.By above analysis as can be seen, the difference output common mode voltage of circuit 60 is influenced by power supply and resistance directly, and produces drift.Simultaneously, in modern CMOS integrated circuit technology, resistance value of manufacturing out and design load have the absolute deviation of 10%-50%, so the difference output common mode voltage of circuit 60 and gain drift are very big.It is many that the use of resistance also can make the circuit chip area increase.
Folding electric circuit among the present invention is improved in addition based on circuit 60, and the circuit 19 of its single collapsed modular unit is seen shown in Figure 7.The same with Fig. 5, also just provided the circuit of main part.Circuit 19 is made up of amplifying circuit 39 and output circuit 36-37, and amplifying circuit 39 is the same with amplifying circuit 76 in the circuit 60, does not change, above the explanation of existing circuit.Originally the output load resistance 78-79 in the circuit 60 is then replaced by present output circuit 36-37.Circuit 36 and circuit 37 are identical unit, and internal circuit connects the same with operation principle, is made up of n channel mosfet (nMOS) transistor 10-11 and p channel mosfet (pMOS) transistor 12-17.With circuit 37 is that example describes, and it comprises 1 nMOS transistor 10 and 3 pMOS transistors 12,14,16.Transistor 16 source termination power VDD, grid termination bias voltage Vbiasp, the input current I of drain terminal connection circuit 37
F1, flow through the electric current I of transistor 16
3Be a stable value, can filter input current I
F1In most direct current composition, reach the purpose that reduces power consumption.Transistor 12 and 14 is current mirrors, and their source end all meets power vd D, and two grid end short circuits also link to each other with the drain terminal of transistor 14, also are connected to the input current I of circuit 36 simultaneously together
F1, flow through the electric current I of transistor 14
4=I
F1-I
3, and flow through the electric current J of transistor 12
5Be I
4P doubly, I
5=PI
4, can that is to say that P realizes the gain of circuit 36 and even circuit 19 by regulating transistor 12 and 14 mutual proportional sizes.Transistor 10 source end ground connection, the grid leak short circuit also links to each other with the drain terminal of transistor 12, is responsible for current mirror output current I
5Converting voltage to exports from drain terminal.That circuit 36 and 37 adopts is same bias voltage Vbiasp, the folding difference output current I of amplifying circuit 39
F1And I
F2Respectively as the input of circuit 37 and 36, I
F1Connection circuit 37, I
F2Connection circuit 36.Fig. 8 is circuit 19 each main node work wave, I
F1And I
F2Common mode current separately is MI
0/ 2, peak-to-peak value is I
0And the common mode current of I4 is MI
0/ 2-I
3, peak-to-peak value is I
0I
5Common mode current be P (MI
0/ 2-I
3), peak-to-peak value is PI
0Can see that thus the circuit 19 after improving according to the present invention realizes with MOS transistor that fully chip area is reduced owing to no longer adopt resistance, output common mode voltage and gain drift that the deviation of former cause resistance causes have not all existed yet.Originally supply voltage can not take place now to the influence of output common mode voltage yet, can realize the gain controlling of circuit simultaneously easily by the ratio P that regulates the current mirror transistor size, the improvement of these characteristics all reduces greatly to the requirement of back level interpolating circuit, makes circuit design convenient.
Fig. 9 is application 90 block diagrams of folded interpolating A/D converter in liquid crystal display (LCD) drives behind the employing modified model folding electric circuit.Traditional computer display is a cathode-ray tube display 93, is the display mode of RGB.Along with the development of plane liquid crystal display 98, need be converted into LCD to rgb signal and show 98 required forms.The output signal of computer at first is defeated by data-signal and is handled 91, and its output shows rgb signal through digital to analog converter 92 again on cathode-ray tube display 93.When needs LCD showed 98, automatic gain control 94 was delivered in the output of digital to analog converter 92, becomes digital signal to give next Digital Signal Processing 97 analog signal conversion by folded interpolating A/D converter 95 then, exported to LCD at last and showed 98.The effect of phase-locked loop 96 is to provide necessary clock to circuit working.
Claims (1)
1, a kind of analog to digital converter that adopts the modified model folding electric circuit, by reference resistance string (40), amplify in advance and sampling hold circuit (41), roughcast number converter (42), output (43), folding electric circuit (44), interpolating circuit (45), comparator (46), decoding decoding (49) synchronously connect and compose through circuit, it is characterized in that said folding electric circuit is made up of amplifying circuit and output circuit, here, substituted resistance in the former folding electric circuit with transistor; Wherein:
Said amplifying circuit comprises M identical simple amplifying unit, these unit amplify the difference input voltage M, and adopt same bias voltage to come to provide bias current I, so that identical to the gain amplifier of every pair of difference input voltage to amplifying unit; The output of M amplifying unit links together by cross-linked mode; Here, each amplifying unit is made of a pair of difference input transistors and offset respectively in the amplifying circuit, and the pair of source short circuit of difference input pipe forms the common source end, and two drain terminals are positive negative outputs, and two grids are differential input ends; Offset source and ground join, and drain terminal connects the common source end of difference input pipe, and grid connects input offset voltage;
Said output circuit is made up of two symmetrical fully modules, each module comprises a filter DC circuit, a current mirror, an electric current commentaries on classics potential circuit, the difference output of amplifying circuit is exported a pair of differential voltage signal respectively as the input of these two modules; Here, the filter DC circuit is a transistor, and source termination power, drain terminal connect the output of amplifying circuit, and grid connects another bias voltage, makes that to flow through this transistorized electric current be a stable value; Current mirror is made up of two transistors, their source end all connects power supply, the grid end links to each other and forms grid end altogether, one of them transistorized drain terminal grid end together links to each other and also is connected to that transistor drain terminal of filtering DC circuit, and the transistorized drain terminal of another one is then exported an electric current changes potential circuit to electric current; It then is the transistor of a source end ground connection that electric current changes potential circuit, and its drain-gate short circuit also links to each other with the output of current mirror.
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| CN 03116146 CN1271788C (en) | 2003-04-03 | 2003-04-03 | A/D converter of adopting improved type fold circuit |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 03116146 CN1271788C (en) | 2003-04-03 | 2003-04-03 | A/D converter of adopting improved type fold circuit |
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| CN1447526A CN1447526A (en) | 2003-10-08 |
| CN1271788C true CN1271788C (en) | 2006-08-23 |
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Families Citing this family (5)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR100691347B1 (en) * | 2005-07-08 | 2007-03-12 | 삼성전자주식회사 | Bubble error rejector and analog digital converter including the same and method for rejecting bubble error |
| JP4788532B2 (en) * | 2006-09-04 | 2011-10-05 | ソニー株式会社 | Folding circuit and analog-to-digital converter |
| CN101047386B (en) * | 2007-03-15 | 2010-05-19 | 复旦大学 | 6-bit 600 MHz sample frequency folding interpolation A/D converter |
| CN102109360B (en) * | 2009-12-24 | 2012-07-11 | 上海华虹Nec电子有限公司 | Signal processing circuit of linear Hall sensor |
| US9467160B2 (en) * | 2014-11-11 | 2016-10-11 | Mediatek Inc. | Flash ADC with interpolators |
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