Background technology
The electric system Microcomputer Protection is used to protect electrical network and equipment thereof, and is most important to the operation of power system stability economy.Microcomputer protecting device integrates computer technology, network technology, microelectric technique, sensor technology; not only can make the function such as metering, protection, observing and controlling of traditional electrical equipment more accurate, more reliable, and can realize functions such as emergency review, failure wave-recording, equipment work situation on-line monitoring.As far back as the initial stage seventies just the someone propose to utilize computing machine as the imagination of protecting electrical power system element and obtained realization; passed through 30 years of development and practice, had the progressively perfect intelligent electrical apparatus equipment of new theory new technology such as network communication function, neural network, fuzzy control, small echo up till now from replacing electromagnetic type relay simply based on the electric system protection device of microprocessor.
China introduces microcomputer protective relay at the mid-80, and the end of the eighties, the microcomputer protective relay device of domestic-developed began to apply.Be Microcomputer Protection period with fastest developing speed the nineties, and not only product is many, and defencive function is also perfect gradually, and the device manufacture level also improves constantly.Up to the present, domestic have large quantities of professional and technical personnel that are engaged in Microcomputer Protection research, design, exploitation, test, make, and tens tame professional production factories are arranged, and also has a collection of scientific research institutions, universities and colleges.The Microcomputer Protection product has route protection, bus protection, generator protection, tranformer protection, fault oscillograph, automatic safety device etc., and kind is many, model is more complete.Along with the research of microcomputer protecting device, a lot of theoretical results have also been obtained at aspects such as Microcomputer Protection software, algorithms.Compare with external same device, we are not a halfpenny the worse aspect protection philosophy.We can say, since the nineties China's Protection Technology entered epoch of Microcomputer Protection.
Up to the present, the internal microcomputer protective device all is to be core (Fig. 1) with the single-chip microcomputer basically, and the quality of the performance of CPU directly influences the function of system, and the hardware of microcomputer protecting device is always towards high speed and two aspects development of high reliability.The speed that on the one hand is processor is more and more faster, system hardware structure from single 8 bit processors to 16 and 32 bit processors up to current many CPU and the mixed structure of many DSP.Then having taked many measures aspect the raising reliability, do not go out socket from bus and do not go out chip, and the application of hardware check and watchdog circuit makes the reliability of hardware obtain raising to a certain degree really on the other hand to bus.
Should see that microcomputer protecting device itself has some inherent defectives.For example, MCU and DSP adopt queuing type serial command executive mode, the raising of its operating rate and efficient also all is subject to this working method, and the speed of DSP and microprocessor still can not satisfy the new algorithm and the theoretical requirement of continuous appearance aspect processing speed.In addition, MCU initially must experience a reseting procedure in work, must satisfy certain level condition and time conditions.When operation level had certain interference sudden change, resetting of MCU was provided with and will becomes the key factor of the unreliable work of system." race flies " of PC is another shortcoming of CPU.Fact proved, no matter how outstanding MCU, no matter has how good interference protection measure, comprise the inside and outside hardware watchdog circuit that any way is set, be subjected to strong jamming particularly under the strong electromagnetic situation, MCU can't guarantee that it still can operate as normal and do not enter irremediable " deadlock " state.Though watchdog technique can make most systems reset again, but still can't accomplish the recovery of instruction-level.Thereby cause that the tripping of device or the possibility of malfunction exist.Especially fly with the unreliable factor that resets when staggered when PC runs, it is particularly complicated that situation will become.
On the other hand, the product of different model is incompatible basically in the protection system at present, does not possess good extendability, lacks the interface specification of standard, makes that the cost of the system integration, upgrading or what's new is very high.Product specialized designs interface to various different models adopts different treatment mechanisms, causes high maintenance costs easily and abandons the awkward situation that old system develops again fully.Simultaneously because product is the perfect of one-side pursuit function when design, design object is direct towards certain control procedure, and does not consider system coordination work, with the strict coupling of ambient systems, thereby product is very strong to the dependence at scene, through the change of the system environments of daring not accept.
EDA is a new technology that develops rapidly in recent years.Can overcome the essential defect of MCU based on the Application and Development of CPLD/FPGA (CPLD/field programmable gate array) device of EDA technology.At first the CPLD/FPGA product has adopted advanced JTAG-ISP and more and more at the system configuration programming mode.Under+5V operation level, can carry out in-system programming whole or in part to the CPLD/FPGA in the system of working at any time.Next is that the clock delay of CPLD/FPGA can reach nanosecond at a high speed, in conjunction with its concurrent working mode, aspect ultra-high speed applications field and the observing and controlling in real time boundless application prospect is being arranged.Be example for example, under the 800MHz clock, need 7.7us with the fastest industrial DSP at present with 16 FFT of 1024, and with the Virtex-II of Xilinx company family chip computing deficiency 1us under the 140MHz clock; High reliability also is one of its advantage, except inherent shortcoming such as not having MCU peculiar reset unreliable and PC to run to fly, the high reliability of CPLD/FPGA also shows almost and can will be stated under the total system in the same chip, thereby dwindled volume greatly, is easy to management and shielding.Developing instrument and design language standardization in addition, the construction cycle weak point also is another advantage.Utilize them can realize the design of almost any type of digital circuit or digital display circuit.How this technology being applied to the Microcomputer Protection field, is the main contents of this subject study.
The present development along with microelectric technique, (System On Chip SOC) has clearly advantage to SOC (system on a chip) at speed, reliability and aspects such as confidentiality and price, be the focus of studying in recent years.Advantages such as FPGA is easy to develop and need not once to invest with it, make increasing SOC designer turn to programmable way to realize, FPGA is also development with surprising rapidity in recent years, its integrated level develops into current ten million from several years ago several ten thousand, chip integration becomes CPU, storer and communication interface etc., and price is more and more lower.The feasible degree that really is tending towards practicability based on programmable SOC (system on a chip).This technology has obtained successful application in mobile phone, PDAs, TV set-top box, the hand-held consumer goods and fields such as the Internet, car engine controller and the network switch.
Aspect relay protection, the report that utilizes FPGA to realize the overcurrent relay algorithm is abroad also arranged, but the function of the SOC (system on a chip) of not realizing ideal.
Embodiment
For a more clear understanding of the present invention, comply with the embodiment that technical scheme of the present invention is finished below in conjunction with accompanying drawing and inventor, the present invention is described in further detail.
5.1 technical scheme
Referring to accompanying drawing 2~3, Fig. 2 is a reconfigurable hardware design platform structured flowchart.According to technical scheme of the present invention, this intelligent electric appliance reconfigurable hardware design platform comprises that three parts constitute:
1) a programmable special-purpose chip 1 that constitutes by FPGA as independent component
This programmable special-purpose chip 1 has system interface; Can connect microprocessor 2 on the system interface, storer 3, A/D converter 4, output driver module 5, watchdog circuit 6, frequency measurement shaping circuit 7, switching value input isolation circuit 8, traffic pilot 9;
2) risc microcontroller 2
Main and the following device of this microprocessor is connected: what be connected has a keyboard and display interface 10, LONworks field-bus interface 11, and serial communication interface 12, EEPROM 13, storer 3, watchdog circuit 6, calendar clock 14, jtag interface 15;
3) other peripheral interface circuits
One is connected the keyboard and display panel 31 on the keyboard and display interface 10; Be connected with keyboard 20 on this keyboard and display panel 31, key switch 28, LED light 22, LCD controller 27; Liquid crystal display socket 26; Be connected with LCD 21 on this liquid crystal display socket 26;
After also having current transformer 16, voltage transformer (VT) 17 through signal condition 34 conditionings, input to traffic pilot 9 by analog quantity input interface 22;
Output driver module 5 is connected with a relay 19 by relay control socket 25;
Switching value input socket 23; Be connected with programmable special-purpose chip 1 through switching value input isolation circuit 8;
4) all elements are divided on base plate 29, mainboard 30, keyboard and display panel 31 3 printed circuit board, connect by flat cable between the circuit board.
The programmable special-purpose chip 1 as independent component that is made of FPGA adopts the Programmable ASIC technology to design based on the method for platform; as long as change the parameter or the change of its corresponding IP kernel or increase the protection algorithm, just can develop serial relay protection special chip at different electric equipment protections such as circuit, transformers.
The programmable special-purpose chip 1 as independent component that is made of FPGA can be the product of different company, the programming technology of chip also both can be based on RAM also can be based on FLASH or anti-fuse structures, can download according to the technology different choice JTAG of chip or carry out programming by programmable device to chip or external ROM the programming mode of chip.
Watchdog circuit 6 produces feeding-dog signal by risc microcontroller 2; The output signal of watchdog circuit 6 directly is connected with the reset terminal of special chip 1 and microprocessor 2; Adopt the parallel mode exchange message between microprocessor 2 and the described programmable special-purpose chip 1; Output driver module 5 directly can drive relay 19; Described A/D converter 4 and traffic pilot 9 directly carry out data acquisition by the sequential control of programmable special-purpose chip 1 output; Storer 3 is microprocessor 2 and 1 common use of special chip; The input end of the frequency measurement shaping circuit 7 that programmable special-purpose chip 1 connects and the output of voltage transformer (VT) 17 link to each other.
Risc microcontroller 2 adopts FLASH technology, can directly programme to it by jtag interface, cooperates by the programming with programmable special-purpose chip 1, can make platform satisfy the protection demand of each electric pressure distinct device from low pressure to the UHV (ultra-high voltage).
Risc microcontroller 2 is connected with following device, and LONworks field-bus interface 11 is independently plug-in units, can be used as the option of system; Serial communication interface 12 can be general RS232/RS422/RS485; Calendar clock 14 is I
2The C interface device also has backup battery; EEPROM 13 is I
2The C series interface part; Risc microcontroller 2 can directly connect computing machine by jtag interface 15 and programme; Described keyboard and display interface 10 shows that by keyboard socket 24 is connected with keyboard and display panel 31 usefulness flat cables.
It is electric quantity signals such as current transformer, voltage transformer (VT) that analog quantity input in other peripheral interface circuits is not limited to, and also can be other non electrical quantity sensor signals such as temperature, humidity.
Base plate 29, mainboard 30, keyboard and display panel 31 mutually independently connect by flat cable between them, are provided with the sheet metal shielding between mainboard 30 and the base plate 29, and keyboard and display panel 31 is installed on the crust of the device.
Keyboard and display panel 31 be provided with the definite value manually controlled set, on the spot/key switch 28 that remote control is selected.
Why the present invention says that it is a platform, is because can only just can realize different defencive functions by the programming to Programmable ASIC and microprocessor under the situation that does not change other peripheral hardware circuit.The core of this platform is a programmable special-purpose chip.Compare with traditional ASIC, realize that reconfigurable hardware platform key is the design of configurable I P nuclear.In this structure, especially for using IP kernel, should increase and delete the plug and play that realizes virtual component easily, this just requires the interface of the IP kernel that designs must satisfy certain standard: being to guarantee interconnected between the virtual component on the one hand, is virtual component and being connected of system on the other hand.The restructural of system depends on the optional parameter situation of what and same virtual component of same class virtualization of function element to a great extent.Programmable special-purpose chip is occurred with the form of standalone module by FPGA, is not subjected to the different influence of FPGA manufacturer difference and technology.Drawn two socket pins on the programmable special-purpose chip module, when chip is debugged,, after debugging is finished, can be defined as other outside input and output pins as test point usefulness.On-the-spot Lonwork bus interface also is with modular form, can select as option.
What the applicant adopted in this platform is the MSP430 series processors of low-power consumption, and the programming of its FLASH technology makes the online modification program become very easy, need not to increase and revise any hardware, only needs new program download is once got final product.Therefore greatly improved application flexibility.
Fig. 3 is the annexation that constitutes between three printed circuit board of platform.Simulating signal on the base plate, switching value input signal and relay control signal link to each other with mainboard by three flat cables respectively, have sheet metal to isolate between mainboard and the base plate.Also there is a flat cable to connect between keyboard and display panel and the mainboard, usually keyboard and display panel is installed on the panel of device.
Fig. 4 is the schematic diagram of keyboard and display panel, and J2 connects LCD 21, and J4 connects mainboard.
Fig. 5 is special-purpose chip and A/D and a multiplexer interface in the mainboard, and U11, U12 eight select four traffic pilots among the figure, by special chip control, provides eight tunnel simulating signals to change to A/D converter U13 simultaneously, obtains 14 transformation results.
U2 is a microprocessor 2 among Fig. 6, and that select for use here is the MSP430F149 of TI company, in 48K FLASH-ROM is arranged, work clock is 12M.
Fig. 7 is the external interface signal of special chip 1, comprises data acquisition control and cpu i/f, switching value input, relay and LED indication control output, communication etc.
Fig. 8 is the interface principle of LonWorks fieldbus and microprocessor 2, and its core is neuron chip U19, in have three processors to be respectively applied for network processes, network interface and user application.What adopt here is the twisted-pair feeder transceiver, and communication speed can reach 78K.
Comprised among Fig. 9 that one of dual serial communication interface is the corresponding RS232 of U21 of standard, one is the corresponding RS485 of U6.U8, U9 are two I
2The C device is respectively applied for EEPROM and calendar clock.U3 is a watchdog circuit chip, also is the shaping circuit of frequency measurement signal simultaneously.U22-U24 finishes the work in the conversion of signals of varying level chip.
CON5 among Figure 10 is the attachment plug of pilot relay, and CON6 is the attachment plug of switching value input, and CON3 is the attachment plug of analog quantity input.
Figure 11 is the principle relevant with the switching value input, in order to improve antijamming capability, except adopting the photoelectricity isolation, has also increased magnetic bead L1A-L16A on each switching value input channel; Met full-wave rectification block CON13 on the power supply of switching value input, in order that open into the signal AC/DC universal, the strategic point of access stream circle T1 is in order to improve interference free performance.
In Figure 12, what relay output drove employing is the optical relay element, directly drives relay.Be added with electric arc at the place, contact of relay and absorb circuit.
Figure 13 is the conditioning part of simulating signal, the purpose that the voltage transformer (VT) front end increases strategic point stream circle is to improve antijamming capability, the feedback resistance of amplifier also all selects for use precision resistance to replace conventional potentiometer, and the intrinsic difference between each passage that causes is thus revised by the way that the different coefficients of each passage are set by software.
5.2 the hardware design of platform general introduction
Hardware design based on platform is the desirable approach of current product development.The hardware configuration of personal computer is set up the model based on the platform hardware design.Its fast development and universal opening and the dirigibility of depending on its platform to a great extent.In the hardware design field of intelligent electrical apparatus also at the open hardware design platform of pursuing a kind of high performance price ratio.All done a large amount of research in this field both at home and abroad for over ten years.But these platforms are based on all that microprocessor realizes, though DSP also can't overcome MCU itself intrinsic some shortcomings.Its hardware configuration is fixed, and the change of function need can be finished by revising and change software program.When hardware configuration need be adjusted, even local modification also will be from redesign printed circuit board (PCB), this wasted time and energy very much, has influenced the Time To Market of new product.Therefore, a kind of open, the hardware design platform of on-line reconfiguration is just very meaningful.For many years, it is generally acknowledged software in execution algorithm, particularly during complicated algorithm, best dirigibility and minimum cost are arranged, and hardware provides fast speed and higher cost, software design will spend more design time and realization time.Configurable logic has changed these viewpoints, though configurable logic device is more expensive than the gate array of masking film program, but it allows the deviser dynamically to change hardware in real time, recycling logic gate and change consideration to cost, hardware is quickened with the dirigibility of software, so as if the boundary between the hardware and software also thickened.It not only can need not to redesign the purpose that realizes the real time modifying circuit function under the situation of printed circuit board (PCB), and this modification can be finished under the situation that does not influence system works.Not only its function can be revised, and the structure of whole hardware to a certain extent also can on-line reorganization.As further, even can realize the remote diagnosis and the reparation of remote reconstruction and fault.From speed, it can realize the complicated protection algorithm that current single-chip microcomputer is difficult to realize by parallel hardware handles.For example, as the traveling-wave protection of current research focus, its frequency spectrum mainly is distributed in 10KHz between the 100KHz, and its protection algorithm requires data sampling speed to reach weekly more than 300.
Therefore the design philosophy of introducing hardware and software platform in the design of intelligent electric appliance has been complied with the needs of practical application, has satisfied long-range economic interests of user and manufacturer and technical requirement.
5.3 the formation of platform
Designing on the design basis of finishing the intelligent electrical apparatus special chip, making full use of the Reprogrammable degree characteristic of FPGA, be equipped with corresponding peripheral interface circuit and just can constitute all reconfigurable hardware design platform of 26S Proteasome Structure and Function.Platform structure of the present invention as shown in Figure 1, it mainly is made of three parts: first is programmable special-purpose chip (ASIC), and it is made of FPGA, with the form and the system interface of independent component; Second portion is the risc microcontroller of FLASH technology; Third part is corresponding peripheral interface circuit (electric current, voltage transformer (VT) and a signal condition thereof; Relay control and output; The switching value input; Keyboard shows; Calendar clock etc.).Why being called platform, is because under such framework, as long as relevant device is rationally programmed, just can satisfy a series of requirements of Automation of Electric Systems to intelligent cell, develops series of products.
The core of this platform is a programmable special-purpose chip.Compare with traditional ASIC, realize that reconfigurable hardware platform key is the design of configurable I P nuclear.In this structure, especially for using IP kernel, should increase and delete the plug and play that realizes virtual component easily, this just requires the interface of the IP kernel that designs must satisfy certain standard: being to guarantee interconnected between the virtual component on the one hand, is virtual component and being connected of system on the other hand.The restructural of system depends on the optional parameter situation of what and same virtual component of same class virtualization of function element to a great extent.For example, digital filtering module should be selected FFT, Kalman filter, wavelet transformation etc.What fft algorithm itself can select to import data for example counts from 8 o'clock to 1024 o'clock and the length of each point etc.; Each protection module allow to select input data from which passage, get the first-harmonic data or get the higher hamonic wave data, which definite value is given definite value be, protect enable signal from where waiting; Real-time multi-task (real time operating system; RTOS) scheduler module then will provide corresponding data to each protection algorithm by control is set; in case increase or delete a protection algoritic module; except will being provided with to the corresponding protection module; also task scheduling modules to be set, determine that the priority of each task is harmonious with the data message that guarantees corresponding task and this task needs.To realize not only in other modules such as the communication module that physical layer protocol also will realize the communication protocol of corresponding client layer.So, the notion of configuration software had obtained application in hardware design in the past, and we might as well just be called " configuration hardware ".
From the chip of realizing, consider it is the product that general-purpose platform just can not only limit to use same company, should support the programmable chip product of different company's different series even different process.Therefore, it is necessary formulating an external interface standard for this platform, and the product of the scale of feasible change fpga chip and replacing different manufacturers etc. does not influence the interface with system.Only need to revise the design part of new chip when the time comes, the hardware platform circuit is constant.A typical chip exterior interface definition is comprising the output of 16 tunnel analog quantity A/D interface sections, the input of 24 way switch amounts, the output of No. 16 relays, 16 pilot lamp or other switching values, the interface of frequency measurement input and chip and ppu etc.
Second portion is the MSP430 series microprocessor of low-power consumption in this platform, and the programming of its FLASH technology makes the online modification program become very easy, need not to increase and revise any hardware, only needs new program download is once got final product.Therefore greatly improved application flexibility.
The electric current of third part, voltage transformer (VT) and signal condition thereof; Relay; And switching value input etc. is integrated on the same printed circuit board as base plate, and the external cabling terminal directly is fixed on the base plate.The LONworks field-bus interface all is connected with mainboard in the hardwired mode of contact pin with independent platelet with special chip, mainboard is the designs of four layer printed circuit boards, also comprises microprocessor, communication interface, keyboard and display interface, A/D interface chip, calendar clock, watchdog circuit etc. in addition.Keyboard and demonstration are installed on the panel.Connect by flat cable between mainboard and panel and the base plate.
Can carry out different programmings with the FLASH microprocessor to the special chip in this platform according to different needs.
5.4 the method for hardware design platform reconstruct
The element that can programme in this platform has two, and another is the CPU of FLASH technology for special chip that is based on FPGA.Programming in the past can only change software section, can change hardware circuit structure and functions of pins at this platform by special chip is programmed.Just can expand the quantity of switching value etc. easily.
Difference according to fpga chip technology, the method of chip reconstruct (programming) is also correspondingly different: can select external ROM also can directly connect computing machine based on the reconstruct of the FPGA of RAM and use the JTEG interface, layout that can the online modification chip when even its maximum characteristics are system works, this especially is fit to the occasion of self-adaptation relay protection; Based on the chip of FLASH technology, can also can off-line programing by corresponding programmable device online modification; Programming based on the chip of anti-fuse structures then can only be passed through the programmable device off-line programing.
The CPU of FLASH technology then can directly pass through JTEG interface online modification.
Like this, can programme respectively to special chip and CPU respectively according to the purpose of design difference.As long as make in the design that the two is harmonious, the division of labor is clear and definite, different reconstruct combinations can be satisfied multiple design needs.
5.5 the typical case of platform uses
Intelligent electric appliance reconfigurable hardware design platform of the present invention, by the different programmings to programmable special-purpose chip 1 and microprocessor 2, can have following several typical case to use respectively: a. programmable special-purpose chip 1 is used for the SOC (system on a chip) of low-voltage variation; B. be used for, the protection scheme of low-pressure system; C. programmable special-purpose chip 1 is as coprocessor; D. realize the soft assembling of intelligent electric appliance.
The maximum characteristics of this platform are the rapidities of its configuration flexibility and data processing.There are data to show, realize that with FPGA FFT is the fastest in the current technology, realize that under the 100M clock time of one 1024 fft algorithm needs is less than 50 μ s.Therefore, can realize following difference in functionality in the intelligent electrical apparatus field respectively by reconstruct.
A). be used for the black box SOC (system on a chip) of low-voltage variation
Device is worked in the black box mode.Special chip is finished all functions of system, need not microprocessor chip, definite time protection function such as can be equipped with inverse time-lag protection and quick-break, prescribe a time limit.Chip is provided with serial port and external communication, finishes communication protocol by chip.By with the upper computer software communication, finish functions such as the setting of definite value and remote measure and communication remote control.At the bottom of the maximum characteristics of this scheme are simple, cost, the reliability height.
B). be used for, the protection scheme of low-pressure system
Asic chip is finished data acquisition, data processing (FFT), task scheduling and main tasks such as protection algorithm and failure wave-recording; Microprocessor is only finished the work relevant with man-machine interface, by with the microprocessor parallel interface, finish the exchange of internal data.This scheme especially is fit to the realization of the various device protection of 35KV and following electric pressure thereof because CPU has born man-machine interface and part self check work, and SOC more lays particular emphasis on the realization of defencive function.It is present replacement scheme based on the Microcomputer Protection product.Because the dirigibility of microprocessor, externally the interface of communication can flexible configuration, can select popular field-bus interface or Ethernet interface etc. to constitute electric substation automation system.
C). special chip is as coprocessor
Complicated protection algorithm normally data acquiring frequency height, data processing amount is big; therefore; can utilize ASIC to have the characteristics of high-speed data processing power, result with parallel mode and CPU communication, is finished operations such as protection criterion and control tripping operation by CPU.For example, the someone has proposed the application of wavelet algorithm in tranformer protection, and this scheme is the desirable solution of this demand.In addition; power supply quality detecting/monitoring to the electrical network electric energy also more and more is subjected to people's attention recently; common way is based on DSP power supply quality detector of exploitation separately; also the someone attempts to develop power supply quality monitoring and the incorporate device of protection; but owing to be subjected to the influence of microprocessor speed; only can realize 32 data sampling, the requirement that this and perfect power supply quality detect also has gap.This programme then can well satisfy this requirement, and therefore, this also is to realize that protection and power supply quality detect incorporate ideal scheme.
D). realize the soft assembling of intelligent electric appliance
So-called soft assembling, the hardware that is exactly the intelligent electrical apparatus product is general, carries out the configuration of function according to the different scenes that constitute electric substation automation system, makes device carry out different functions.This in fact also be it has often been said in the application of system programmable technology ISP (In System Programming) in transformer substation system.As further, can realize the remote diagnosis and the remote repairing of long-range assembling and fault.
5.6 specific embodiment: a route protection unit based on platform design
According to aforesaid application thinking, the JSY2000-ASIC route protection unit that adopted the Hardware platform design based on the intelligent electric appliance special chip of the present invention, and provided particular circuit configurations.
This design is carried out according to above-mentioned scheme b, and the FPGA that special chip utilizes altera corp to produce finishes realization, finishes data acquisition, data processing, protection control, task scheduling etc.External man-machine interfaces etc. are finished by the FLASH type super low power consuming single chip processor MSP430F149 that TI company produces.Comprise 9 key QWERTY keyboard, the LCDs of 320 * 240 dot matrix, Lonworks fieldbus, RS485 and RS232 communication interface etc.The complete machine performance test has reached every index request of GB/T7261-2000 regulation.
Major function and characteristics:
The function of JSY2000-ASIC route protection unit comprises:
A. function of measuring: accurate measurement three-phase current, three-phase voltage (0.2 grade), supply frequency (± parameter such as 0.02Hz).16 times that can measure dedicated tunnel with interior harmonic value (1 grade).
B. defencive function: defencive function has quick-break, quick-break in limited time, excess current, overload, low-frequency load reduction, reclosing (the band after-acceleration is jumped), zero-sequence current, residual voltage etc.
C. communication function: can finish " four is distant " function of remote signalling, remote measurement, remote control, remote regulating with standard 232/485 or Lonworks fieldbus and upper machine communication.
D. control function: can finish by panel isolating switch branch, closing operation and systematic parameter function is set.
Can open or close teleswitch and divide closing operation by hardware lock in addition, or protect definite value to set, the analog quantity channel coefficient be adjusted, the setting that the defencive function throwing is moved back and system is provided with.This protected location can store and show 20 SOE logouts, real-time circuit analog value, the real-time status of current/voltage harmonic wave histogram and circuit definition switching value.
The principal feature of this protected location is:
A. adopt the Microcomputer Protection special chip to realize the function of software realization in the past with hardware.Multiple functions such as protection, control, metering, supervision, constructing communication network that chip is integrated.Adopted idea of modular, functional configuration, expansion is convenient.
B. by hardware lock switch on the spot, three kinds of duties of a distant place and setting.Guaranteed authority effectively to system's parameters modification.
C. powerful communication function.Have RS232, RS485 standard interface.Also be furnished with the Lonworks field-bus interface in addition, can also expand Ethernet interface in case of necessity.
D. self diagnosis and monitoring function.In order to improve the reliability of system, the function for monitoring to various states is provided, comprise analog quantity, harmonic component, on off state, the real-time demonstration of system switching amount.In addition, except the system hardware self check, also designed the protection definite value, the timer-controlled self-inspection of key parameters such as passage coefficient.
E. man-machine interface close friend.Use 320 * 240 figure LCD display, the menu mode prompting operation.
The general utility functions key combines with special function keys, can switch between each functional picture efficiently.In addition, system has memory function to user's part operation, and the mode of the multiple step that simplifies the operation is provided according to systematic memory.
The human-machine interface function that system provides is divided into 10 parts:
1) shows primary system figure
Displaying contents comprises: the unit station number, and on off state, system time, measured value Uab, Ucb, U0, Ima, Imb, Imc, I0, f and pulse electric degree count value, current defencive function quick-break, in limited time, and overcurrent, in low week, state is moved back in the throwing of reclosing.Primary system figure can reflect the overall status of the circuit of protected location control comprehensively.All demonstration amounts all refresh in time or with the user corresponding change are set, and guarantee the real-time information that is that shows.Interface such as Fig. 4 .1.
2) show Event Log Table
This unit can be preserved and show 20 SOE incidents of record recently, and every logout comprises event type, time and working value.Every screen shows 10 records, switches new and old record by key up and down.
3) histogram and numerical value mode show higher hamonic wave jointly
The unit can show that 16 times of 10 passages are with interior harmonic wave histogram.The harmonic wave histogram refreshes in time, and per second refreshes once.
4) display switch amount tabulation
This unit can monitor the state of 32 way switch amounts.
5) definite value setting
Can be provided with 21 protection definite values.The direction of passage key is selected the definite value that will revise and is revised digital value, switches by acknowledgement key.System is checked automatically to the setting result of each protection definite value, avoids user error to import non-Par value.Open hardware lock and just can enter the function that definite value is provided with.And setting finishes need reaffirm just and can come into force.The sufficient like this reliability that has guaranteed to revise definite value.
6) the passage coefficient is adjusted
The tuning coefficient function can regulating system mutual inductor and each analog quantity channel coefficient.
7) function is thrown and is moved back
Can be provided with the unit 11 kinds of defencive functions input whether.
8) system's setting
Content comprises station number, time, communication port, the selection setting of communication speed.Revise authority also with the protection definite value require identical.
9) breaking-closing operating
Breaking-closing operating needs to open hardware lock, enters local control function.Then, the branch by special closes key operation.And the system requirements operating personnel close order and confirm dividing, and avoid unnecessary maloperation.In addition, system also according to the difference of operation, shows corresponding prompt information.
10) communication
This unit provides two kinds of communication modes, is respectively standard RS232/RS485 and Lonworks field-bus interface.The user can select different communication port networking and upper machine communication according to actual conditions.