CN102087621B - Processor device with self-diagnosis function - Google Patents
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Abstract
The invention discloses a processor device with the self-diagnosis function. The device on a circuit structure comprises a display module, a detection module, a power supply monitoring module, a key switch module, an insertion monitoring module and a groove number check module. Compared with a traditional processor device, the processor device with the self-diagnosis function, which is provided by the invention, has the advantages of low power consumption, no fan, real-time operation state display, unique bus communication mode, more self-diagnosis contents to the device and wide self-diagnosis coverage by adopting a double-port RAM (Random Access Memory) as a bus separation method, and the like. The device can be applied to the field of large-scale projects, such as a nuclear power plant and can ensure the high safety and the stability of the system.
Description
Technical field
The present invention is a kind of to system high security property; The processor of the self-diagnostic function of stability operation and design is a kind of processor of realizing the self-diagnostic function that comprises power supply supply voltage, FLASH, internal memory, bus, electrification reset, hand-reset and watchdog reset self diagnosis specifically.Can be applicable to heavy construction fields such as nuclear power station, can guarantee high security, the stability of system.
Background technology
In recent years; Along with automatic technology and fast development of computer technology; Electronic devices and components, superior manufacturing process, complete redundant means, advanced self-diagnosis technology add the application of advanced control theory highly reliably; Make the control function of DCS (Digital Control System) primary processor rise to a brand-new aspect, powerful control device is provided for carrying out simple or complicated control strategy by original simple control.But because coverage and some other factor of the security of system, stability, self diagnosis, at present domestic DCS system does not also use in nuclear plant safety level appearance control system.
The processor device of self-diagnostic function mainly solves following difficult point problem:
1) low-power consumption;
2) power supply monitoring voltage;
3) CPU is unusual;
4) memory diagnosis;
5) FLASH diagnosis;
6) insert monitoring and diagnosis;
7) self diagnosis of house dog.
Running status shows that existing processor device is external product in the control of nuclear plant safety appearance, and domestic corporation does not have the solution and the product of similar maturation.
Existing processor device major defect has the following aspects:
(1) power consumption higher, adopt fan or heat radiator to dispel the heat usually;
(2) running status shows single;
(3) self-diagnostic function is few, and coverage is little.
Therefore, exploitation is used for nuclear plant safety appearance control, and the processor with self-diagnostic function of high security, stability is very important.
Summary of the invention
The purpose of this invention is to provide and a kind ofly have the processor device of self-diagnostic function and adopt this device to carry out the method for self diagnosis, this processor device is applied to nuclear power station, for system provides high security stability.The processor device of this self-diagnostic function can be realized comprising the self diagnosis of power supply supply voltage, FLASH, internal memory, bus, electrification reset, hand-reset and watchdog reset self diagnosis.
To achieve these goals; The technical scheme that the present invention adopts is: the processor device of this self-diagnostic function is placed on the system board, links to each other with system bus through self bus driver, and the processor of said self-diagnostic function comprises key switch; Optical coupling isolator; CPLD and processor, the signal of said key switch pass to the CPLD of system after through optical coupling isolator, and said CPLD carries out data communication through multi-channel data transmission bus in the circuit and processor; The processor of said self-diagnostic function is provided with 3 kinds of operational modes and comprises normal operation, test and following dress pattern; Above-mentioned 3 kinds of operational modes are selected through 3 key switches and realized, it is characterized in that: when key switch was in fixed mode, processor read corresponding status information; The entry address of 3 key switch status informations is A1, the different conditions of the key switch of low 3 correspondences of data; Adopt optocoupler to isolate between said key switch and the CPLD, realize the isolation on electric.
Processor device of the present invention is the part of nuclear plant safety level appearance control system, and the main function that realizes has the following aspects:
(1) operational mode identification;
(2) identification of groove number;
(3) station number identification;
(4) state shows;
(5) configuration program is adorned down;
(6) with the communication of other device.
Station number recognition function of the present invention is discerned processing by 6 toggle switchs, and every of toggle switch has " 0 " and " 1 " two states, 64 station numbers are set altogether.The entry address of 6 station number information is A2, like BAR+0x00000004.Data line D0～D5 is corresponding to 6 station numbers, and CPLD carries out read operation to the address of 6 station number information, and minimum 6 of data is exactly corresponding station number.
The groove information of processor device of the present invention is made up of 4 status informations, and the groove information bit is fixed at mainboard, when the processor device of self-diagnostic function inserts cabinet; It will read groove information and judge whether the groove position of insertion is correct; The address of 4 groove information is A3, like BAR+0x00000008, and corresponding 4 grooves of data line D0～D3 number; Read operation is carried out in address to 4 groove information, and minimum 4 of data is exactly corresponding groove number.
6 LED lamps are adopted in the processor device design of self-diagnostic function, indicate power supply, operation, test, normal operation, following dress and error 6 kind state respectively.Power light is constant indicating status after system's power supply is normal, and the address of other 5 controllable LEDs is A4, like BAR+0x00000000.Corresponding 5 the controlled pilot lamp LED of data line D0～D4.
This processor device has also adopted one 4 lattice module to be used for showing concrete status information, and the address that dot matrix shows is A5, like BAR+0X00000010---and BAR+0x0000001C.Data line D0～D6 is 7 data bit of corresponding dot matrix respectively, and this lattice module has four, and primary address is A6; Like BAR+0x00000010, deputy address is A7, like BAR+0x00000014; Tertiary address is A8, and like BAR+0x00000018, the 4th address is A9; Like BAR+0x0000001C, respectively write operation is carried out in these 4 addresses and just can realize 4 positions of lattice module are shown control respectively.
The processor device of said self-diagnostic function carries out the following dress of configuration program through bus interface modes, and said processor is a flush bonding processor.
The processor device of said self-diagnostic function is inserted on the mainboard in the cabinet, and the LocalPlus Bus of processor is through the communication of the dual port RAM realization on other device of bus access of mainboard with other device.
The processor device of said self-diagnostic function can self diagnosis content comprise power supply supply voltage, FLASH, internal memory, bus, electrification reset, hand-reset and watchdog reset self diagnosis:
(1) self diagnosis of power supply voltage adopts the multiple power supplies monitoring chip; When any voltage of several kinds of WVs on the plate exceed normal value ± 10% the time; The corresponding output pin of monitoring chip will outputs level signals; Corresponding indicator of the power supply status is extinguished, and the resetting pin of power monitoring chip also can be exported reset signal simultaneously, passes to surveillance through mainboard;
(2) the FLASH self diagnosis of the processor device of self-diagnostic function adopts the mode of CRC32 verification to come the integrality of verification msg; The periodic duty stage according to carrying out verification operation excess time in this cycle; Divide a plurality of cycles to accomplish whole integrity checkings; Repeat this periodic process at a certain time interval, the content of supervision comprises RTS code and download file;
(3) self diagnosis to main board bus mainly is whether the Local bus of verifying mainboard exists fault; The main method that main board bus is kept watch on is through the Local bus anti-operation to be carried out writing for twice in certain predefined address that is used to test its function of dual port RAM, after writing, carries out retaking of a year or grade at every turn;
(4) to the self diagnosis of house dog and core processor, house dog and core processor each have independently clock, after power supply electrifying is accomplished; WatchDog Timer starts immediately, and the dog program of feeding of core processor begins in the effective time of WatchDog Timer, to feed dog, overflows in case feed the dog time; House dog will be exported a lasting reset signal, stop the program of core processor, under the normal situation of running state of programs; The self diagnosis processor is kept watch on the house dog state cycle of carrying out through the counter register of visit house dog; In each program run cycle, core processor reads the count value of Watch Dog Timer, and compares to confirm the house dog running status with last cycle read value; When core processor detects the inefficacy of house dog clock; Core processor stops to feed dog and terminator, and when house dog clock failure or self diagnosis processor fault, module output fault-signal is given monitor module;
(5) manual reset circuit detects, and also through being transferred to monitor module after the signal Processing, monitor module is only reported to the police hand-reset and handled as one in hand-reset.
After the system power supply input, after the DC/DC conversion, obtain three kinds of required voltages of processor device of self-diagnostic function, adopt the power monitoring IC of special use for the monitor module of these three kinds of supply voltages; After power supply electrifying was accomplished, power monitoring IC exported power-on reset signal, and processor device adopts LED to show; Supply with under the situation about all existing when three kinds of power supplys, LED is bright, otherwise LED goes out; Show fault, when overvoltage or low pressure appearred in supply voltage, power monitoring IC will export reset signal; The fault of the processor means monitor board mounted power voltage of self-diagnostic function, the processor device of self-diagnostic function is exported to monitor module to reset signal after treatment, and monitor module picks up counting simultaneously; When surpassing the specific time, keep watch on certainly and think the processor device fault generating.
After adopting technique scheme, the present invention compared with prior art has following beneficial effect:
1. the processor device of self-diagnostic function of the present invention is except the inspection to internal memory, increased the diagnosis that diagnosis, watchdog reset, hand-reset and power supply electrifying to the integrated circuit board power supply reset;
2. the present invention has adopted the processor of low-power consumption, reduces the power consumption of system, realizes no fan heat radiation;
3. the present invention has adopted 4 LED lattice modules, not only can display digit but also can character display, to compare with present LCDs, and lattice module has strengthened shock resistance through the mounting means of contact pin welding;
4. the self diagnosis of the processor device of self-diagnostic function of the present invention has adopted the method that timesharing is kept watch on, and has reduced the working time that self diagnosis takies system, the promptness of increase system output.
Description of drawings
Fig. 1 is the theory diagram of processor device;
Fig. 2 is an operational mode identification circuit block diagram;
Fig. 3 is the communication block diagram of treating apparatus and other device;
Fig. 4 is the processor device program flow chart.
Embodiment
Fig. 1 is the theory diagram of processor device of the present invention, and Fig. 2 is a processor device operational mode identification circuit block diagram of the present invention, like Fig. 1, Fig. 2, shown in Figure 3; The processor device of self-diagnostic function of the present invention is arranged on the system board bus; The processor of self-diagnostic function comprises key switch, optical coupling isolator, CPLD and flush bonding processor; The signal of said key switch is delivered to CPLD through optical coupling isolator; Said CPLD carries out data communication through multi-channel data transmission bus in the circuit and processor, and the processor of said self-diagnostic function is provided with 3 kinds of operational modes and comprises normal operation, test and following dress pattern, and above-mentioned 3 kinds of operational modes are selected through 3 key switches and realized; When key switch is in fixed mode; Processor reads corresponding status information, and the entry address of 3 key switch status informations is A1, the different conditions of the key switch of low 3 correspondences of data; Adopt optocoupler to isolate between said key switch and the CPLD, realize the isolation on electric.
The processor device design of self-diagnostic function of the present invention adopts 6 LED lamps to indicate power supply, operation, test, normal operation, following dress and error 6 kind state respectively.Power light is constant indicating status after system's power supply is normal, and the address of other 5 controllable LEDs is A4, like BAR+0x00000000.Corresponding 5 LED of data line D0～D4, except the LED lamp, this processor device has also adopted one 4 lattice module to be used for showing concrete status information, and the address that dot matrix shows is A5, like BAR+0X00000010-BAR+0x0000001C.Data line D0～D6 is 7 data bit of corresponding dot matrix respectively, and this lattice module has four, and primary address is A6; Like BAR+0x00000010, deputy address is A7, like BAR+0x00000014; Tertiary address is A8, and like BAR+0x00000018, the 4th address is A9; Like BAR+0x0000001C, respectively write operation is carried out in these 4 addresses and just can realize 4 positions of lattice module are shown control respectively.
Power supply adopts the power monitoring chip of multichannel; When any voltage of several kinds of WVs on the plate exceed normal value ± 10% the time; The corresponding output pin of monitoring chip will the output low level signal; Corresponding indicator of the power supply status is extinguished, and the resetting pin of power monitoring chip also can be exported reset signal simultaneously, passes to monitor module through mainboard.After the power supply input, after the DC/DC conversion, obtain three kinds of required voltages of processor device, and the electric sequence that requires according to core processor carries out electrifying startup.For the supervision of these three kinds of supply voltages, module adopts special-purpose power monitoring IC, and after power supply electrifying was accomplished, power monitoring IC exported power-on reset signal, and reset time is adjustable.For power supply, processor device adopts LED to show, has only when three kinds of power supplys and supplies with under the situation about all existing, and LED is just bright, the demonstration fault otherwise LED goes out.When overvoltage or low pressure appearred in supply voltage, power monitoring IC will export reset signal after supply voltage recovers normal certain hour.According to this characteristic, processor device can be kept watch on the fault of board mounted power voltage.Processor device is exported to monitor module to reset signal after treatment; After reset signal produces; Monitor module picks up counting, and when surpassing the specific time, this special time is greater than the time that resets with hand-reset that starts; Think that from supervision processor device fault generating, supply voltage fault also are to cause one of overtime reason of reset signal.
House dog and core processor each have independently clock; After power supply electrifying is accomplished; WatchDog Timer starts immediately, and hello the dog that the dog program of feeding of core processor begins in the effective time of WatchDog Timer, not stop is overflowed in case feed the dog time; House dog will be exported a lasting reset signal, stop the program of core processor.Under the normal situation of running state of programs, program is kept watch on the house dog state cycle of carrying out through the counter register of visit house dog.In each program run cycle, core processor reads the count value of Watch Dog Timer, and compares to confirm the house dog running status with last cycle read value.For the count value that makes the WatchDog Timer that the close cycle of core processor reads all is different, the count value of WatchDog Timer will comprise fixing TG numerical value and two parts of change count value.When core processor detected the inefficacy of house dog clock, core processor stopped to feed dog and terminator.When house dog clock failure or core processor malfunctions, module output fault-signal is given monitor module.For the situation of Watch Dog Timer and handling procedure simultaneous faults, should in fault management, be summed up as the processor device fault, can export fault-signal equally and give monitor module.
This processor device have normal operation, test and under adorn 3 kinds of operational modes, these 3 kinds of patterns adopt 3 key switch to realize, when stirring key switch to the pattern of fixing, processor just can read corresponding status information.The address of 3 key switch status informations is A1, like BAR+0x0000000C.Corresponding 3 the key switch states of data line D0～D2 carry out read operation to the address of 3 key switch states, and minimum 3 of data is exactly corresponding key switch state, and this address is read-only not to be write.In order to realize the isolation on electric, adopt optocoupler to isolate between key switch and the CPLD.
The station number recognition function of this processor device is discerned processing by 6 toggle switchs, and every of toggle switch has " 0 " and " 1 " two states, 64 station numbers can be set altogether.The address of 6 station number information is A2, like BAR+0x00000004.Corresponding 6 station numbers of data line D0～D5 carry out read operation to the address of 6 station number information, and minimum 6 of data is exactly corresponding station number, and this address is read-only not to be write.
The groove information of this processor device is made up of 4 status informations.Because the groove information bit is fixed at mainboard, when this processor device inserted cabinet, it will read groove information and judge whether the groove position of insertion is correct.The address of 4 groove information is A3, like BAR+0x00000008.Corresponding 4 grooves of data line D0～D3 number carry out read operation to the address of 4 groove information, and minimum 4 of data is exactly the groove number of correspondence, and this address is read-only not to be write.
This processor device carries out the following dress of configuration program through interface.Said processor is a flush bonding processor.
This processor device is on the mainboard that is inserted in the cabinet, and the LocalPlus Bus of the core processor of this device is through the communication of the dual port RAM realization on other device of bus access of mainboard with other device.
The FLASH of this processor device keeps watch on and adopts software; Can Flash equipment successful initialization be to carry out through vendor id and the device id that reads chip, according to the result who reads whether with the Flash handbook in the value the stipulated consistent associative operation that can correctly begin to carry out Flash of verifying whether.For the integrality of FLASH data, adopt the mode of doing the CRC32 verification to come the integrality of verification msg, check code reads from Flash.In the time of initialization, accomplish the verification operation of total data.Later on the periodic duty stage according to operating part verification operation excess time in this cycle, divide a plurality of cycles to accomplish whole integrity checkings, repeat this periodic process later on as required at a certain time interval.The content of keeping watch on mainly comprises RTS code and download file etc.
Internal memory is divided into variable storage area and immutable memory block.The initialization of immutable memory block mainly comprises and in internal memory, writes data two parts to the internal memory clear operation with the system initialization time in the internal memory.Can these two steps successful execution can carry out through the method that writes retaking of a year or grade comparison then.Immutable memory block is mainly used in the storage data in the internal memory, in operate as normal, just is used to read.So the main method of checking is done the CRC32 verification exactly.
Supervision to main board bus mainly is whether the Local bus of verifying mainboard exists fault.Because being the dual port RAM through mainboard Local bus and other device, processor device links to each other; And the read or write speed of dual port RAM itself is slow; Yet supervisory work can not occupy the too many running time again; So the main method that main board bus is kept watch on be through the Local bus to certain predefined address that is used to test its function of dual port RAM, particular location is set according to practical programs, carries out writing for twice anti-operation.After writing, carry out retaking of a year or grade at every turn, detect according to the method and whether can successfully write.Whether the physical link that can verify main board bus in this way is intact.
Hand-reset also is one of processor device situation about resetting, so hand-reset is also through being transferred to monitor module after the signal Processing.But monitor module is only reported to the police hand-reset and is handled as one, do not handle as the fault of processor device.
The process that the processor device of self-diagnostic function carries out self diagnosis is: at first through key switch the mode of operation of this processor is selected; Mode of operation information is sent to CPLD and carries out showing through display module after the logical process; CPLD accomplishes identification and the processing to station number signal in the system and groove information simultaneously; Information after the processing is sent to flush bonding processor and carries out the dependent diagnostic program implementation, reaches the diagnosis capability to each module in the system
The present invention adopts the processor of PowerPC framework to reduce the power consumption of device, and no fan has prevented the indeterminate fauit of being introduced by fan.Secondly the present invention has adopted 4 site array modules to increase the diversified demonstration means of device.Last the present invention has increased some self diagnosis items for the reliability of enhanced system and the determinacy of running status, has enlarged the coverage of self diagnosis.
Claims (9)
1. processor device with self-diagnostic function; The processor device of said self-diagnostic function is placed on the system board, links to each other with system bus through self bus driver, and the processor of said self-diagnostic function comprises key switch; Optical coupling isolator; CPLD and processor, the signal of said key switch pass to CPLD after through optical coupling isolator, and CPLD carries out data communication through multi-channel data transmission bus in the circuit and processor; The processor that it is characterized in that said self-diagnostic function is provided with 3 kinds of operational modes and comprises normal operation, test and following dress pattern; Above-mentioned 3 kinds of operational modes are selected through 3 key switches and are realized that when key switch was in fixed mode, processor read corresponding status information; The entry address of 3 key switch status informations is A1, the different conditions of the key switch of low 3 correspondences of data; Adopt optocoupler to isolate between said key switch and the CPLD; Realize the isolation on electric, the content that the processor device of said self-diagnostic function can self diagnosis comprises power supply supply voltage, FLASH, internal memory, bus, electrification reset, hand-reset and watchdog reset self diagnosis:
(1), the self diagnosis of power supply voltage adopts the multiple power supplies monitoring chip; When any voltage of several kinds of WVs on the plate exceed normal value ± 10% the time; The corresponding output pin of monitoring chip will outputs level signals; Corresponding indicator of the power supply status is extinguished, and the resetting pin of power monitoring chip also can be exported reset signal simultaneously, passes to surveillance through mainboard;
(2), the FLASH self diagnosis of the processor device of self-diagnostic function adopts the mode of CRC32 verification to come the integrality of verification msg; The periodic duty stage according to carrying out verification operation excess time in this cycle; Divide a plurality of cycles to accomplish whole integrity checkings; Repeat this periodic process at a certain time interval, the content of supervision comprises RTS code and download file;
(3), the self diagnosis to main board bus mainly is whether the Local bus of verifying mainboard exists fault; The main method that main board bus is kept watch on is through the Local bus anti-operation to be carried out writing for twice in certain predefined address that is used to test its function of dual port RAM, after writing, carries out retaking of a year or grade at every turn;
(4), to the self diagnosis of house dog and core processor, house dog and core processor each have independently clock, after power supply electrifying is accomplished; WatchDog Timer starts immediately, and the dog program of feeding of core processor begins in the effective time of WatchDog Timer, to feed dog, overflows in case feed the dog time; House dog will be exported a lasting reset signal, stop the program of core processor, under the normal situation of running state of programs; The self diagnosis processor is kept watch on the house dog state cycle of carrying out through the counter register of visit house dog; In each program run cycle, core processor reads the count value of Watch Dog Timer, and compares to confirm the house dog running status with last cycle read value; When core processor detects the inefficacy of house dog clock; Core processor stops to feed dog and terminator, and when house dog clock failure or self diagnosis processor fault, module output fault-signal is given monitor module;
(5), manual reset circuit detects, also through being transferred to monitor module after the signal Processing, monitor module is only reported to the police hand-reset and is handled as one in hand-reset.
2. a kind of processor device according to claim 1 with self-diagnostic function; It is characterized in that: the station number recognition function of the processor device of self-diagnostic function is discerned processing by 6 toggle switchs, and every of toggle switch has " 0 " and " 1 " two states, 64 station numbers are set altogether; The entry address of 6 station number information is A2; Data line D0～D5 is corresponding to 6 station numbers, and CPLD is to the read operation of carrying out of 6 station number information, and minimum 6 of data is exactly corresponding station number.
3. a kind of processor device according to claim 1 with self-diagnostic function; It is characterized in that: the groove information of the processor device of self-diagnostic function is made up of 4 status informations; The groove information bit is fixed at mainboard, when the processor device of self-diagnostic function inserts cabinet, reads groove information and judges the groove position of inserting; The entry address of 4 groove information is A3, and minimum 4 of data is exactly corresponding groove number.
4. a kind of processor device according to claim 1 with self-diagnostic function; It is characterized in that: 6 pilot lamp LED are adopted in the processor device design of self-diagnostic function; Indicate power supply, operation, test, normal operation, following dress and error 6 kind state respectively; Said power light LED is constant indicating status after system's power supply is normal, and the entry address of other 5 controlled pilot lamp LED is A4, respectively corresponding 5 the controlled pilot lamp LED of data line D0～D4.
5. a kind of processor device with self-diagnostic function according to claim 4 is characterized in that: the processor device of self-diagnostic function has adopted one 4 lattice module to be used for showing concrete status information, and the entry address that dot matrix shows is A5; Data line D0～D6 is 7 data bit of corresponding dot matrix respectively; This lattice module has four, and primary address is A6, and deputy address is A7; Tertiary address is A8; The 4th address is A9, respectively write operation is carried out in these 4 addresses, realizes that 4 to lattice module show control respectively.
6. a kind of processor device with self-diagnostic function according to claim 1 is characterized in that: the processor device of said self-diagnostic function carries out the following dress of configuration program through bus interface modes, and said processor is a flush bonding processor.
7. a kind of processor device according to claim 1 with self-diagnostic function; It is characterized in that: the processor device of said self-diagnostic function is inserted on the mainboard in the cabinet, and said processor is through the communication of the dual port RAM realization on other device of bus access of mainboard with other device.
8. a kind of processor device with self-diagnostic function according to claim 1 is characterized in that: after the system power supply input, after the DC/DC conversion, obtain three kinds of required voltages of processor device of self-diagnostic function; For the supervision of these three kinds of supply voltages, module adopts special-purpose power monitoring IC, after power supply electrifying is accomplished; Power monitoring IC exports power-on reset signal, and processor device adopts pilot lamp LED to show, supplies with when three kinds of power supplys under the situation about all existing; Pilot lamp LED is bright, otherwise pilot lamp LED goes out the demonstration fault; When overvoltage or low pressure appearred in supply voltage, power monitoring IC will export reset signal, the fault of the processor means monitor board mounted power voltage of self-diagnostic function; The processor device of self-diagnostic function is exported to monitor module to reset signal after treatment; Simultaneously monitor module picks up counting, and when surpassing the specific time, keeps watch on certainly and thinks the processor device fault generating.
9. adopt any one described a kind of processor device of claim 1-8 to carry out the method for self diagnosis with self-diagnostic function; It is characterized in that; The process that the processor device of described self-diagnostic function carries out self diagnosis is: at first through key switch the mode of operation of this processor is selected; Mode of operation information is sent to CPLD and carries out showing through display module after the logical process; CPLD accomplishes identification and the processing to station number signal in the system and groove information simultaneously, and the information after the processing is sent to flush bonding processor and carries out the dependent diagnostic program implementation, reaches the self diagnostic capability to each module in the system.
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Families Citing this family (16)
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| CN110737234B (en) * | 2019-10-21 | 2021-04-13 | 江苏云涌电子科技股份有限公司 | Intranet safety monitoring device |
| CN115858229A (en) * | 2023-02-24 | 2023-03-28 | 南京芯驰半导体科技有限公司 | Watchdog management method, watchdog and computer readable storage medium |
| CN117112284B (en) * | 2023-10-25 | 2024-02-02 | 西安热工研究院有限公司 | DCS controller trusted state sensing method and related device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1460950A (en) * | 2003-01-15 | 2003-12-10 | 西安交通大学 | Restructurable hardware designing platform for intelligent electric equipment |
| CN101373891A (en) * | 2008-09-16 | 2009-02-25 | 成都瑞科电气有限公司 | Mainboard using 32-bit DSP as kernel for microcomputer protection device |
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2009
- 2009-12-04 CN CN200910241332A patent/CN102087621B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1460950A (en) * | 2003-01-15 | 2003-12-10 | 西安交通大学 | Restructurable hardware designing platform for intelligent electric equipment |
| CN101373891A (en) * | 2008-09-16 | 2009-02-25 | 成都瑞科电气有限公司 | Mainboard using 32-bit DSP as kernel for microcomputer protection device |
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| CN102087621A (en) | 2011-06-08 |
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Address after: 100084 No. 1, Nongda South Road, No. 9, bright city, Silicon Valley, Beijing, Haidian District Patentee after: Beijing Guangli Nuclear Power Co., Ltd. Patentee after: China General Nuclear Power Corporation Address before: 100084 No. 1, Nongda South Road, No. 9, bright city, Silicon Valley, Beijing, Haidian District Patentee before: Beijing Guangli Nuclear Power Co., Ltd. Patentee before: China Guangdong Nuclear Power Group Co., Ltd. |