CN117242580A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN117242580A
CN117242580A CN202180097332.4A CN202180097332A CN117242580A CN 117242580 A CN117242580 A CN 117242580A CN 202180097332 A CN202180097332 A CN 202180097332A CN 117242580 A CN117242580 A CN 117242580A
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igbt
diode
semiconductor substrate
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大佐贺毅
阿多保夫
秦佑贵
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Mitsubishi Electric Corp
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Abstract

半导体基板(1)具有漂移层(8)。IGBT区域(2)及二极管区域(3)设置于半导体基板(1)，在半导体基板(1)的表面具有发射极电极(16)。感测IGBT区域(4)设置于半导体基板(1)，与IGBT区域(2)相比面积小，在半导体基板(1)的表面具有与发射极电极(16)分离的感测发射极电极(20)。感测二极管区域(5)设置于半导体基板(1)，与二极管区域(3)相比面积小，在半导体基板(1)的表面具有与发射极电极(16)分离的感测阳极电极(21)。感测二极管区域(5)以大于或等于漂移层(8)的厚度的量与IGBT区域(2)分离。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
反向导通型绝缘栅双极晶体管(RC-IGBT)被广泛用于逆变器等电力转换装置。近年来，以逆变器的小型化及成本降低为目的搭载的RC-IGBT的元件尺寸正在变小。如果为了减小通电损耗及通断损耗而使IGBT区域的面积比率变大，则二极管区域相对地变小。如此，在续流时超过二极管的峰值浪涌正向电流，有时产生破坏。因此，提出了设置对二极管的通电电流进行监视的感测二极管区域，对施加了导致破坏的电流这一情况进行检测的技术(例如，参照专利文献1)。
专利文献1：日本特开2009-135414号公报
发明内容
但是，在以往的半导体装置中，存在感测二极管区域的电流检测精度低的问题。
本发明就是为了解决上述这样的课题而提出的，其目的在于，得到能够提高感测二极管区域的电流检测精度的半导体装置。
本发明涉及的半导体装置的特征在于，具有：半导体基板，其具有漂移层；IGBT区域及二极管区域，它们设置于所述半导体基板，在所述半导体基板的表面具有发射极电极；感测IGBT区域，其设置于所述半导体基板，与所述IGBT区域相比面积小，在所述半导体基板的所述表面具有与所述发射极电极分离的感测发射极电极；以及感测二极管区域，其设置于所述半导体基板，与所述二极管区域相比面积小，在所述半导体基板的所述表面具有与所述发射极电极分离的感测阳极电极，所述感测二极管区域以大于或等于所述漂移层的厚度的量与所述IGBT区域分离。
发明的效果
在本发明中，使感测二极管区域以大于或等于漂移层的厚度的量与IGBT区域及感测IGBT区域分离。由此，能够在续流动作时抑制续流电流流过IGBT区域及感测IGBT区域，能够提高感测二极管区域的电流检测精度。
附图说明
图1是表示实施方式1涉及的半导体装置的平面图。
图2是沿图1的I-II的剖视图。
图3是沿图1的III-IV的剖视图。
图4是沿图1的V-VI的剖视图。
图5是表示二极管电流检测电路的图。
图6是表示实施方式2涉及的半导体装置的俯视图。
图7是沿图6的I-II的剖视图。
图8是表示实施方式3涉及的半导体装置的俯视图。
图9是沿图8的I-II的剖视图。
具体实施方式
参照附图，对实施方式涉及的半导体装置进行说明。对相同或相应的结构要素标注相同的标号，有时省略重复说明。
实施方式1
图1是表示实施方式1涉及的半导体装置的平面图。该半导体装置是在1个半导体基板1设置有IGBT区域2和二极管区域3的RC-IGBT。在半导体基板1设置有感测IGBT区域4、感测二极管区域5及栅极焊盘6。以将这些区域包围的方式在半导体基板1的外周设置有末端区域7。
图2是沿图1的I-II的剖视图。半导体基板1具有N-型的漂移层8。在漂移层8之上设置有P型体层9。在漂移层8之下设置有N型缓冲层10。
在IGBT区域2，在P型体层9的表层设置有N型发射极层11。在将N型发射极层11和P型体层9贯通的沟槽内隔着栅极绝缘膜设置有沟槽栅极12。在N型缓冲层10之下设置有P型集电极层13。沟槽栅极12连接至用于与栅极电源连接的栅极焊盘6。
在二极管区域3，在P型体层9的表层设置有P型阳极层14。在将P型体层9贯通的沟槽内隔着栅极绝缘膜设置有沟槽栅极12。在N型缓冲层10之下设置有N型阴极层15。
在IGBT区域2和二极管区域3这两者，在半导体基板1的表面设置有发射极电极16。发射极电极16与P型体层9、N型发射极层11及P型阳极层14连接。为了实现沟槽栅极12与发射极电极16的绝缘，在沟槽栅极12之上设置有绝缘膜17。在IGBT区域2和二极管区域3这两者，在半导体基板1的背面设置有集电极(collector)电极(electrode)18。集电极电极18与P型集电极层13及N型阴极层15连接。
图3是沿图1的III-IV的剖视图。感测IGBT区域4的构造与IGBT区域2相同。在感测IGBT区域4，在半导体基板1的表面设置的感测发射极电极20与P型体层9及N型发射极层11连接，与发射极电极16分离。在IGBT区域2与感测IGBT区域4之间存在分离区域19。分离区域19是不存在N型发射极层11、P型阳极层14、沟槽栅极12的区域。感测IGBT区域4仅设置于感测发射极电极20的正下方。
图4是沿图1的V-VI的剖视图。感测二极管区域5的构造与二极管区域3相同。在感测二极管区域5，在半导体基板1的表面设置的感测阳极电极21与P型体层9及P型阳极层14连接，与发射极电极16分离。感测二极管区域5仅设置于感测阳极电极21的正下方。
IGBT区域2的面积的总和SI大于二极管区域3的面积的总和SD(SI＞SD)。感测IGBT区域4的面积SSI小于IGBT区域2的面积的总和SI(SI＞SSI)。感测二极管区域5的面积SSD小于二极管区域3的面积的总和SD(SD＞SSD)。
图5是表示二极管电流检测电路的图。感测IGBT区域4的感测发射极电极20与包含IGBT区域2及二极管区域3在内的主要部分的发射极电极16经由感测电阻Ra连接。感测二极管区域5的感测阳极电极21与主要部分的发射极电极16经由感测电阻Rb连接。
在电阻Ra流过与IGBT区域2和感测IGBT区域4的面积比相当的电流。因此，通过对感测IGBT区域4的感测发射极电极20与IGBT区域2的发射极电极16之间的端子间电压进行测定，从而能够对流过IGBT区域2的电流进行检测。
在电阻Rb流过与二极管区域3和感测二极管区域5的面积比相当的电流。因此，通过对感测二极管区域5的感测阳极电极21与IGBT区域2的发射极电极16之间的端子间电压Vb进行测定，从而能够对流过二极管区域3的电流ID进行检测。例如，使用Vb、SD、SSD、Rb如下述这样地示出电流ID。
ID＝(Vb/Rb)﹡(SD/SSD)
同样地，如下述这样地表示Vb。
Vb＝Rb﹡ID﹡(SSD/SD)
因此，通过由电压测定电路对Vb进行测定，能够对ID进行检测。
通过使用感测二极管区域5对二极管区域3的电流进行监视，从而能够对二极管区域3的过电流进行检测而向保护功能进行反馈。在续流动作时，电流从基板背面在倾斜45度的范围内流过漂移层8。如果该电流流过IGBT区域2及感测IGBT区域4，则感测二极管区域5的电流检测精度下降。因此，在本实施方式中，使感测二极管区域5以大于或等于漂移层8的厚度的量与IGBT区域2及感测IGBT区域4分离。由此，能够在续流动作时抑制电流流过IGBT区域2，能够提高感测二极管区域5的电流检测精度。
另外，通过使感测二极管区域5以大于或等于漂移层8的厚度的量与感测IGBT区域4分离，从而感测二极管区域5的电流检测精度进一步提高。
另外，将IGBT区域2与感测IGBT区域4分离的分离区域19的宽度d1也大于漂移层8的厚度d2(d1＞d2)。即，感测IGBT区域4以大于或等于漂移层8的厚度的量与IGBT区域2分离。由此，抑制电流流过IGBT区域2，感测IGBT区域4的电流检测精度提高。
实施方式2
图6是表示实施方式2涉及的半导体装置的俯视图。图7是沿图6的I-II的剖视图。在本实施方式中，在感测二极管区域5的周边配置有二极管区域3。将从感测二极管区域5的外端部至包围感测二极管区域5的二极管区域3与IGBT区域2的边界为止的距离设为d3，则d3＞d1。
虽然需要将感测二极管区域5与IGBT区域2分离，但如果将用于分离的区域设为分离区域19，则对半导体装置的通电作出贡献的区域减少。因此，在本实施方式中，在从感测二极管区域5算起漂移层8的厚度以内的区域配置有二极管区域3。在续流动作时，感测二极管区域5周边的二极管区域3也进行续流动作。因此，即使不将对通电不做贡献的分离区域19设置得大，也能够确保流过感测二极管区域5的电流。因此，能够提高感测二极管区域5的电流检测精度，能够使分离区域19变小而实现半导体装置的小型化。
此外，分离区域19是没有P型阳极层14等的区域，需要将二极管区域3的阳极与感测二极管区域5的阳极在电位上进行分离。由于设想的是通过附加感测电阻而使二极管区域3与感测二极管区域5的电位差扩大数V，因此将分离区域19的宽度设为大于或等于20μm。
实施方式3
图8是表示实施方式3涉及的半导体装置的俯视图。图9是沿图8的I-II的剖视图。IGBT区域2与二极管区域3在俯视观察时以沿沟槽栅极12的条带状交替地配置。半导体基板1被分割成包含第1区域22和第2区域23的大于或等于2个区域。第1区域22和第2区域23在沟槽栅极12的延伸方向上相邻。在相邻的区域之间沟槽栅极12及扩散层等被截断。在第1区域22和第2区域23，IGBT区域2与二极管区域3的重复方式是相反的。由此，变得是将由于逆变器动作而主要发热的IGBT区域2彼此分离地配置，因此能够抑制半导体装置整体的发热，提高通电能力。
优选在感测IGBT区域4的周边配置IGBT区域2，在感测二极管区域5的周边配置二极管区域3。但是，在将感测IGBT区域4和感测二极管区域5配置于相同区域的情况下，在感测IGBT区域4和感测二极管区域5的周边区域，一个沟槽栅极12设置于IGBT区域2和二极管区域3这两者。在这种情况下，无法将该沟槽栅极12向发射极进行接地。因此，在二极管区域3具有电容，半导体装置的输入电容、反馈电容增加。
因此，将感测IGBT区域4配置于第1区域22的IGBT区域2中，将感测二极管区域5配置于第2区域23的二极管区域3中。配置有感测IGBT区域4的第1区域22的IGBT区域2与配置有感测二极管区域5的第2区域23的二极管区域3相邻。在相邻的第1区域22的IGBT区域2和第2区域23的二极管区域3分别设置的沟槽栅极12不相连。因此，能够将在二极管区域3设置的沟槽栅极12向发射极进行接地而抑制电容的增加。由此，半导体装置的输入电容、反馈电容仅存在于IGBT区域，因此能够减小通断损耗，能够实现半导体装置的小型化。
另外，将从感测二极管区域5的外端部至包围感测二极管区域5的二极管区域3与IGBT区域2的边界为止的距离设为d4，则d4＞d1。由此，与实施方式2同样地，能够提高感测二极管区域5的电流检测精度，能够使分离区域19变小而实现半导体装置的小型化。
此外，半导体基板1不限于由硅形成，也可以由与硅相比带隙大的宽带隙半导体形成。宽带隙半导体例如是碳化硅、氮化镓类材料或金刚石。由这样的宽带隙半导体形成的半导体芯片由于耐压性及容许电流密度高，因此能够小型化。通过使用该小型化的半导体芯片，从而组装有该半导体芯片的半导体装置也能够小型化、高集成化。另外，由于半导体芯片的耐热性高，因此能够使散热器的散热鳍片小型化，能够使水冷部空冷化，因而能够使半导体装置进一步小型化。另外，由于半导体芯片的电力损耗低且高效，因此能够使半导体装置高效化。
标号的说明
1半导体基板，2IGBT区域，3二极管区域，4感测IGBT区域，8漂移层，16发射极电极，20感测发射极电极，22第1区域，23第2区域

Claims (6)

1.一种半导体装置，其特征在于，具有：
半导体基板，其具有漂移层；
IGBT区域及二极管区域，它们设置于所述半导体基板，在所述半导体基板的表面具有发射极电极；
感测IGBT区域，其设置于所述半导体基板，与所述IGBT区域相比面积小，在所述半导体基板的所述表面具有与所述发射极电极分离的感测发射极电极；以及
感测二极管区域，其设置于所述半导体基板，与所述二极管区域相比面积小，在所述半导体基板的所述表面具有与所述发射极电极分离的感测阳极电极，
所述感测二极管区域以大于或等于所述漂移层的厚度的量与所述IGBT区域分离。
2.根据权利要求1所述的半导体装置，其特征在于，
在从所述感测二极管区域算起所述漂移层的厚度以内的区域配置有所述二极管区域。
3.根据权利要求2所述的半导体装置，其特征在于，
所述半导体基板被分割成第1区域和第2区域，
所述IGBT区域和所述二极管区域具有沟槽栅极，
所述IGBT区域和所述二极管区域在俯视观察时以沿所述沟槽栅极的条带状交替地配置，
在所述第1区域和所述第2区域，所述IGBT区域与所述二极管区域的重复方式是相反的，
所述感测IGBT区域配置于所述第1区域的所述IGBT区域中，
所述感测二极管区域配置于所述第2区域的所述二极管区域中。
4.根据权利要求1至3中任一项所述的半导体装置，其特征在于，
所述感测二极管区域以大于或等于所述漂移层的厚度的量与所述感测IGBT区域分离。
5.根据权利要求1至4中任一项所述的半导体装置，其特征在于，
所述感测IGBT区域以大于或等于所述漂移层的厚度的量与所述IGBT区域分离。
6.根据权利要求1至5中任一项所述的半导体装置，其特征在于，
所述半导体基板由宽带隙半导体形成。
CN202180097332.4A 2021-04-26 2021-04-26 半导体装置 Pending CN117242580A (zh)

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