CN115291446A

CN115291446A - Array substrate, display panel and display device

Info

Publication number: CN115291446A
Application number: CN202211012791.0A
Authority: CN
Inventors: 常红燕; 康报虹
Original assignee: HKC Co Ltd
Current assignee: HKC Co Ltd
Priority date: 2022-08-23
Filing date: 2022-08-23
Publication date: 2022-11-04
Anticipated expiration: 2042-08-23
Also published as: WO2024040832A1; CN115291446B

Abstract

The array substrate comprises a substrate base plate, the substrate base plate comprises a display area and a measuring area located on the periphery of the display area, the display area is provided with a plurality of color resistors arranged along a first direction, one of the color resistors in any two adjacent columns of the color resistors extends to the measuring area along a second direction, and therefore redundant color resistors are formed in the measuring area; the first direction and the second direction are perpendicular to each other; the measurement area is further provided with a reference identifier configured to determine an offset of the redundant color resistance in the first direction relative to the reference identifier. The application solves the problem that the width and the offset of the color resistance block in the display area cannot be accurately monitored in the prior art.

Description

Array substrate, display panel and display device

Technical Field

The present application relates to the field of display technologies, and in particular, to an array substrate, a display panel, and a display device.

Background

A Liquid Crystal Display (LCD) is mainly composed of a Thin Film Transistor (TFT) array substrate, a Color Filter (CF) substrate, and a Liquid Crystal Layer (Liquid Crystal Layer) disposed between the two substrates. With the development of display technology, COA (Color filter array) technology has been developed, in which Color resistor blocks are formed on a thin film transistor array substrate.

In the process of manufacturing the liquid crystal display panel, the width of the color resistance blocks in the display area and the offset generated by the color resistance blocks need to be monitored, so as to provide accurate process parameters for the liquid crystal display panel produced in large batch. At present, the measurement of the width of the color resistance block and the offset of the color resistance block is started from the side edge of the color resistance block, but the color resistance blocks manufactured on the thin film transistor array substrate can be mutually overlapped and do not grab the edge easily, so that the width of the color resistance block and the offset of the color resistance block are not easy to accurately measure.

Disclosure of Invention

The embodiment of the application provides an array substrate, display panel and display device, forms a plurality of redundant color resistances that separate each other through extending the color resistance that sets up in the display area to the measuring area to set up the benchmark sign in the measuring area, so that measure the offset of redundant color resistance for the benchmark sign, solved prior art and can't accurately monitor the problem to the width and the offset of display area color resistance piece.

The invention is realized in such a way, and the array substrate comprises a substrate, wherein the substrate comprises a display area and a measuring area positioned at the periphery of the display area, the display area is provided with a plurality of color resistors arranged along a first direction, and one of the color resistors in any two adjacent columns of the color resistors extends to the measuring area along a second direction so as to form redundant color resistors in the measuring area; the first direction and the second direction are perpendicular to each other;

the measurement area is further provided with a reference identifier configured to determine an offset of the redundant color resistance in the first direction with respect to the reference identifier.

According to the array substrate provided by the embodiment of the application, one of two columns of color resistors which are adjacent to each other in any of the plurality of color resistors arranged in the display area along the first direction extends to the measurement area along the second direction, so that redundant color resistors are formed in the measurement area, the edge of each redundant color resistor is easy to grab, the width measurement of each redundant color resistor is more accurate, the measurement area is also provided with the reference mark, the offset of each redundant color resistor relative to the reference mark can be measured, the measured offset can be more accurate due to the fact that the edge of each redundant color resistor is obvious, the monitoring result of each redundant color resistor is used as the monitoring result of each color resistor block in the display area, and the accurate monitoring of the width and the offset of each color resistor block in the display area is achieved.

In one embodiment, the measuring area is provided with a reference layer, and the redundant color resistor is positioned on one side of the reference layer far away from the substrate base plate;

the reference mark is arranged on the reference layer.

In one embodiment, a measurement reference hole penetrating through the reference layer is formed in the reference layer, the measurement reference hole includes two hole edges oppositely arranged along the first direction, and the reference mark is the hole edge;

the redundant color resistor comprises two side edges which are oppositely arranged along the first direction;

the hole edges are parallel to the side edges.

In one embodiment, along the first direction, the orthographic projection of the measurement reference hole on the substrate base plate is located between the orthographic projections of two adjacent redundant color resistors on the substrate base plate.

In one embodiment, the orthographic projection of the measurement reference hole on the substrate base plate is positioned in the orthographic projection of the redundant color resistance on the substrate base plate.

In one embodiment, the reference layer is a metal layer having a signal line extending in the first direction, and the measurement reference hole is disposed on the signal line.

In one embodiment, a reference retaining wall is arranged on one side of the reference layer away from the substrate base plate, and the reference retaining wall is positioned between two adjacent redundant color resistors;

the benchmark barricade includes the edge two wall borders that the first direction set up relatively, the benchmark sign does the wall border.

In one embodiment, each redundant color resistor is provided with a color resistor hole, and the color resistor hole penetrates through the redundant color resistor along the thickness direction of the substrate base plate.

In one embodiment, the measurement reference hole is a rectangular hole.

In one embodiment, the color-resisting holes are rectangular holes.

The application provides an array substrate's beneficial effect lies in: compared with the prior art, one of the two adjacent columns of color resistances in the plurality of color resistances arranged along the first direction in the display area extends to the measurement area along the second direction, so that the redundant color resistance is formed in the measurement area, the edge of the redundant color resistance is easy to grasp, the width measurement of the redundant color resistance is more accurate, the measurement area is also provided with a reference mark, the offset of the redundant color resistance relative to the reference mark can be measured, the measured offset can be more accurate due to the obvious edge of the redundant color resistance, the monitoring result of the redundant color resistance is used as the monitoring result of the color resistance block in the display area, and the accurate monitoring of the width and the offset of the color resistance block in the display area is realized.

The embodiment of the application also provides a display panel, which comprises the array substrate, the color film substrate and the liquid crystal layer, which are described in any one of the embodiments; the color film substrate and the array substrate are arranged in a box-to-box mode, and the liquid crystal layer is arranged between the color film substrate and the array substrate.

The application provides a display panel's beneficial effect lies in: the array substrate is adopted, one of two adjacent color resistors in a plurality of color resistors arranged in the display area along the first direction is extended to the measurement area along the second direction, so that redundant color resistors are formed in the measurement area, the edge of each redundant color resistor is easily grabbed, the width measurement of each redundant color resistor is more accurate, the measurement area is also provided with a reference mark, the offset of each redundant color resistor relative to the reference mark can be measured, the measured offset can be more accurate due to the fact that the edge of each redundant color resistor is more obvious, the monitoring result of each redundant color resistor is used as the monitoring result of a color resistor block in the display area, and the width and the offset of each color resistor block in the display area are accurately monitored.

The embodiment of the application further provides a display device, which comprises the display panel and the backlight module arranged on one side of the display panel.

The application provides a display device's beneficial effect lies in: the display panel is adopted, one of the two adjacent columns of color resistors in the plurality of color resistors arranged in the display area along the first direction is extended to the measurement area along the second direction, so that the redundant color resistors are formed in the measurement area, the edge of each redundant color resistor is easy to grab, the width measurement of each redundant color resistor is more accurate, the measurement area is also provided with a reference mark, the offset of each redundant color resistor relative to the reference mark can be measured, the measured offset can be more accurate due to the fact that the edge of each redundant color resistor is more obvious, the monitoring result of each redundant color resistor is used as the monitoring result of the color resistor block in the display area, and the accurate monitoring of the width and the offset of the color resistor block in the display area is realized.

Drawings

Fig. 1 is a first schematic view illustrating positions of redundant color resists in a measurement area on an array substrate according to an embodiment of the present disclosure;

fig. 2 is a schematic diagram illustrating a position of a redundant color resistor in a measurement area on an array substrate according to an embodiment of the present application;

fig. 3 is a third schematic diagram illustrating the positions of redundant color resists in a measurement area on an array substrate according to an embodiment of the present application;

fig. 4 is a partial top view of an array substrate according to an embodiment of the present disclosure;

FIG. 5 isbase:Sub>A sectional view A-A of FIG. 4;

fig. 6 is a first distribution diagram of positions of measurement reference holes of an array substrate according to a first embodiment of the present disclosure;

fig. 7 is a second location distribution diagram of measurement reference holes of an array substrate according to a first embodiment of the present disclosure;

fig. 8 is a distribution diagram of positions of measurement reference holes of an array substrate according to an embodiment of the present disclosure;

fig. 9 is a partial top view of an array substrate provided in the second embodiment of the present application;

FIG. 10 is a sectional view taken along line B-B of FIG. 9;

fig. 11 is a schematic structural diagram of a display panel according to a third embodiment of the present application;

fig. 12 is a schematic structural diagram of a display device according to a fourth embodiment of the present application.

Reference numerals: 1. a display area; 2. a peripheral zone;

10. a substrate base plate;

3. a measurement zone; 31. redundant color resistance; 311. a side edge; 312. a color resistance hole; 32. a reference layer; 321. a signal line; 33. measuring a reference hole; 332. the edge of the hole; 34. a datum retaining wall; 341. the edge of a wall;

100. an array substrate; 200. a color film substrate; 300. a liquid crystal layer; 400. a backlight module; 401. a light guide plate; 402. a light source assembly; 403. an optical film.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

It will be understood that when an element is referred to as being "secured to" or "disposed on" another element, it can be directly on the other element or be indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or be indirectly connected to the other element.

It will be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in an orientation or positional relationship indicated in the drawings for convenience in describing the application and to simplify the description, and are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed in a particular orientation, and be constructed in operation as a limitation of the application.

Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

It should be noted that, in the embodiments of the present application, the same reference numerals are used to refer to the same components or parts, and for the same parts in the embodiments of the present application, only one of the components or parts may be used as an example to refer to the reference numeral, and it should be understood that, for other similar components or parts, the reference numerals are also used.

The embodiment of the application provides an array substrate, a display panel and a display device, and solves the problem that the width and the offset of a color block in a display area cannot be accurately monitored in the prior art.

Example one

The array substrate of the first embodiment of the application is a COA type array substrate, and the COA type array substrate includes a substrate 10, a Thin Film Transistor (TFT) layer, a color filter layer, and a transparent conductive layer, which are sequentially stacked. The substrate 10 includes a display region 1 and a peripheral region 2 located at the periphery of the display region 1, and in the display region 1, the transparent conductive layer generally includes a pixel electrode and a common electrode for driving liquid crystal to rotate. In order to display the thin film transistor layer below the color filter layer, the driving voltages on the pixel electrodes corresponding to the liquid crystals at different positions in the display area 1 need to be controlled and adjusted to form different display luminances.

In the manufacturing process of the structure of the thin film transistor, the thin film transistor layer generally includes a first metal layer, a gate insulating layer, an active layer, a second metal layer, and a passivation layer, which are sequentially stacked. The first metal layer is disposed on a side close to the substrate 10, and the passivation layer is disposed on a side close to the color filter layer. The first metal layer comprises a plurality of scanning lines and a grid electrode used for forming a TFT; the second metal layer includes a plurality of data lines and source and drain electrodes for forming the TFTs.

In some embodiments, referring to fig. 1, the substrate 10 includes a measurement region 3 located at the periphery of the display region 1, the measurement region 3 is located in the peripheral region 2, the display region 1 is substantially square, the measurement region 3 is a square ring, in some embodiments, the display region 1 may have other shapes, such as a circle, and correspondingly, the measurement region 3 is a circular ring.

The display area 1 is provided with a plurality of color resistors arranged along the first direction X, the color resistors may be red, blue and green photoresist blocks, and the red, blue and green photoresist blocks may be arranged in a triangle, square, linear or mosaic configuration in the display area 1. Of course, in some embodiments, the plurality of color resists in the display area 1 may also be red, blue, green, and white resist blocks. The plurality of color resists may be formed using a dyeing method, an etching method, a printing method, a dry film method, or an electro-deposition method, but is not limited thereto.

Referring to fig. 4, one of the two adjacent columns of color resistors extends to the measurement area 3 along the second direction Y to form a redundant color resistor 31 in the measurement area 3; the first direction X and the second direction Y are perpendicular to each other, and the first direction X and the second direction Y are perpendicular to the thickness direction Z of the base substrate 10, respectively. The color resistor extends to the measuring area 3 to form the redundant color resistor 31, so that the environment around the color resistor blocks in the display area 1 can be consistent, the width W of the redundant color resistor 31 is equivalent to the width of the corresponding color resistor block in the display area 1, the width of the color resistor blocks in the display area 1 can be monitored by monitoring the width W of the redundant color resistor 31 of the measuring area 3, and the difficulty of monitoring the width of the color resistor blocks in the display area 1 is greatly reduced. Because a certain distance is left between two adjacent redundant color resistors 31, two side edges of the redundant color resistors 31 in the first direction X are very obvious, which is beneficial to accurately measuring the width W of the redundant color resistors 31, thereby obtaining an accurate width value of the color resistor block in the display area 1.

The measurement area 3 is further provided with a reference mark configured to determine an offset D of the redundant color resistor 31 in the first direction X with respect to the reference mark. That is, the reference mark is not moved when the redundant color resistor 31 is manufactured, and the offset D of the color resistor block in the display area 1 can be obtained by measuring the offset D of the redundant color resistor 31 relative to the reference mark.

The redundant color resistors 31 of the measurement area 3 are arranged at intervals, specifically, the redundant color resistors 31 are arranged at intervals, that is, when a red redundant color resistor and a blue redundant color resistor are arranged, the green redundant color resistor in the middle is not arranged, for example, the color of the color resistor blocks arranged at the edge of the display area 1 is red, green and blue in sequence, then the redundant color resistor 31 at the edge of the measurement area 3 close to the display area 1 corresponds to the color resistor blocks of red, blue and green in sequence, so that the width W and the offset D of the redundant color resistor 31 are equivalent to the width and the offset of the color resistor block in the display area 1, the width and the offset of the color resistor block in the display area 1 can be monitored by monitoring the width W and the offset D of the redundant color resistor 31, and the difficulty of monitoring the width and the offset of the color resistor block in the display area 1 is greatly reduced. Moreover, the edge of each redundant color resistor 31 is obvious, so that the measuring equipment can well grasp the edge when measuring the width W of the redundant color resistor 31, the width W of the redundant color resistor 31 can be accurately measured, and the width of the color resistor block in the display area 1 can be accurately monitored.

Specifically, referring to fig. 1, the color resists in the display area 1 extend along the second direction Y to the redundant color resists 31 formed in the measurement area 3 and are located on two sides of the measurement area 3 along the second direction Y; of course, referring to fig. 2, the redundant color resists 31 may be located only on either side of the measurement area 3 along the second direction Y; referring to fig. 3, the redundant color resistors 31 are located at four corners of the measurement area 3, that is, only the color resistors at four corners of the display area 1 extend into the measurement area 3 along the second direction Y, where it should be noted that the color resistors at four corners of the display area 1 are different, for example, the redundant color resistors include a red color block, a green color block, and a blue color block, or the color resistors at four corners are respectively a red color block, a green color block, a blue color block, and a white color block, so that the widths and offsets of the color blocks with different colors can be accurately monitored, and only the four color resistors in the display area 1 need to extend to the measurement area 3, which greatly reduces the manufacturing cost of the color resistors.

In some embodiments, referring to fig. 4 and 5, the measurement area 3 is provided with a reference layer 32, and the redundant color resists 31 are located on the side of the reference layer 32 away from the substrate base plate 10; the reference mark is provided on the reference layer 32, and the reference layer 32 is provided with a measurement reference hole 33 penetrating the reference layer 32.

Through the arrangement, the measurement reference hole 33 is fixed, so that the measurement reference hole 33 can be used as a reference object, the offset D of the redundant color resistor 31 relative to the measurement reference hole 33 can be accurately measured, the offset of the color resistor block in the display area 1 can be accurately monitored, the measurement accuracy of the width W and the offset D of the redundant color resistor 31 can be further improved by monitoring the offset of the color resistor block in the display area 1 through the measurement reference hole 33 and combining the measurement result of the width W of the redundant color resistor 31, and the monitoring of the color resistor block in the display area 1 is more accurate.

In one embodiment, referring to fig. 4, the measurement reference hole 33 includes two hole edges 332 oppositely disposed along the first direction X, the reference being identified as the hole edges 332; the redundant color resistor 31 comprises two side edges 311 oppositely arranged along the first direction X; the hole edge 332 and the side edge 311 are parallel to each other. That is, the hole edges 332 and the side edges 311 are perpendicular to the first direction X, which facilitates measuring the distance between one of the hole edges 332 and one of the side edges 311, thereby accurately obtaining the offset D of the redundant color resistor 31 relative to the measurement reference hole 33.

In some embodiments, referring to fig. 4, the measurement datum hole 33 is a rectangular hole, such that the hole edge 332 of the rectangular hole is parallel to the side edge 311 of the redundant color resistor 31, and the distance between the hole edge 332 and the side edge 311 is conveniently measured, so as to obtain the offset D of the redundant color resistor 31 relative to the measurement datum hole 33. In order to measure the offset D of the redundant color resistor 31 relative to the measurement reference hole 33 conveniently, the measurement reference hole 33 needs to have a reference edge or a reference point which can be measured conveniently, so the shape of the measurement reference hole 33 is not limited to the square hole, the measurement reference hole 33 can also be a circular hole, and the offset D of the redundant color resistor 31 relative to the measurement reference hole 33 can also be obtained by measuring the distance between the center of the circle and the side edge 311 of the redundant color resistor 31.

In one embodiment, referring to fig. 6, along the first direction X, the orthographic projection of the measurement reference hole 33 on the substrate base plate 10 is located between the orthographic projections of two adjacent redundant color resists 31 on the substrate base plate 10. Therefore, the hole edge of the measurement reference hole 33 and the edge of the redundant color resistor 31 are obvious, and the offset of the redundant color resistor 31 relative to the measurement reference hole 33 can be measured quickly and accurately by the measuring equipment.

Because there are a plurality of redundant color resistors 31, a measurement reference hole 33 can be disposed between every two adjacent redundant color resistors 31, so that each redundant color resistor 31 can correspond to one measurement reference hole 33, the distance between the redundant color resistor 31 and the measurement reference hole 33 becomes closer, and the measurement is more convenient, of course, only one measurement reference hole 33 can be disposed, and the offset D of each redundant color resistor 31 relative to the measurement reference hole 33 can be measured, so that the offset D of each redundant color resistor 31 can be ensured to be measured relative to the same reference object, so that the measurement result is more accurate, and the manufacturing steps of the measurement reference holes 33 can be reduced by only disposing one measurement reference hole 33, and the manufacturing efficiency is improved.

In one embodiment, referring to fig. 7, the orthographic projection of the measurement reference hole 33 on the substrate base plate 10 is located within the orthographic projection of the redundant color resistor 31 on the substrate base plate 10. That is, the redundant color resistor 31 covers the measurement reference hole 33, and at this time, the redundant color resistor 31 is light-permeable, so that the offset D of the redundant color resistor 31 relative to the measurement reference hole 33 can be measured by measuring the distance between the side edge 311 of the redundant color resistor 31 and the hole edge 332 of the measurement reference hole 33, and at this time, the surface of the side of the reference layer 32 between two adjacent redundant color resistors 31, which is far away from the substrate base plate 10, is flat, which is beneficial to smooth laying of the transparent conductive layer manufactured after the redundant color resistor 31.

In some embodiments, referring to fig. 6 to 8, the reference layer 32 is disposed on the substrate base plate 10, the redundant color resists 31 are disposed on the reference layer 32, the reference layer 32 is a metal layer, the metal layer has a signal line 321 extending along the first direction X, and the measurement reference hole 33 is disposed on the signal line 321. Since the installation position of the signal line 321 on the metal layer is fixed, installing the measurement reference hole 33 on the signal line 321 is equivalent to providing a reference object at the installation position of the measurement reference hole 33, which can reduce the difficulty of installing the measurement reference hole 33 and improve the efficiency of installing the measurement reference hole 33.

It should be noted that the reference layer 32 may be a first metal layer in the thin-film transistor layer or a second metal layer, in this embodiment, the reference layer 32 is taken as the first metal layer for description, and the signal line 321 is a scan line included in the first metal layer.

Referring to fig. 6, the specific arrangement of the measurement reference hole 33 on the signal line 321 may be: the measurement reference hole 33 is disposed in the middle of the signal line 321, the measurement reference hole 33 is located between two adjacent redundant color resistors 31, and the size of the measurement reference hole 33 is smaller than that of the signal line 321 in the second direction Y, so that it is ensured that the measurement reference hole 33 does not cut off the signal line 321 and does not affect the signal transmission performance of the signal line 321.

Referring to fig. 7, the specific arrangement of the measurement reference hole 33 on the signal line 321 may also be: the measurement reference hole 33 is arranged in the middle of the signal line 321, the orthographic projection of the measurement reference hole 33 on the substrate base plate 10 is positioned in the orthographic projection of the redundant color resistor 31 on the substrate base plate 10, and the size of the measurement reference hole 33 is smaller than that of the signal line 321 in the second direction Y, so that the measurement reference hole 33 can be ensured not to cut off the signal line 321 and not to influence the signal transmission performance of the signal line 321.

Referring to fig. 8, the specific arrangement of the measurement reference hole 33 on the signal line 321 may also be: in the second direction Y, the measurement reference hole 33 is disposed on at least one side of the signal line 321, and it should be noted that, if the measurement reference holes 33 are disposed on both sides of the signal line 321, the measurement reference holes 33 on both sides of the signal line 321 are spaced from each other, so that it can be ensured that the signal line 321 is not cut off, and the signal transmission performance of the signal line 321 is not affected.

In one embodiment, referring to fig. 6 to 9, each redundant color resistor 31 is provided with a color resistor hole 312, and the color resistor hole 312 penetrates through the redundant color resistor 31 along the thickness direction Z of the substrate base plate 10. Because the transparent conducting layer is manufactured behind the redundant color resistor 31, the insulating layer is also arranged between the transparent conducting layer and the redundant color resistor 31, the transparent conducting layer above the redundant color resistor 31 can be electrically connected with the metal layer below the redundant color resistor 31 by arranging the color resistor hole 312, if the color resistor hole 312 is not arranged, the redundant color resistor 31 is not penetrated in the dry etching process when the insulating layer is manufactured, and thus the transparent conducting layer above the redundant color resistor 31 and the metal layer below the redundant color resistor 31 cannot be conducted.

It should be noted that, the position of the color resistor hole 312 on the redundant color resistor 31 should ensure that the transparent conductive layer and the metal layer are connected to form a pixel electrode through the color resistor hole 312, compared with the prior art that the metal layer at the position below the color resistor hole 312 is a square block, which may interfere with the bottom of the color resistor block and is not good for grabbing the edge of the aperture of the color resistor hole 312, the metal layer in the first embodiment of the present application is disposed on the substrate 10 in an integral layer, so that the edge of the color resistor hole 312 close to the aperture at one side of the substrate 10 is easier to identify, which is beneficial to measuring the size of the color resistor hole 312. The size of the color resistance hole 312 can be monitored by measuring the size of the color resistance hole 312, when the size of the color resistance hole 312 changes, the width and the offset of the redundant color resistance 31 are changed, the color resistance block in the display area 1 can be known to change without specifically measuring the width and the offset of the redundant color resistance 31, the width W and the offset D of the redundant color resistance 31 can be specifically measured according to actual needs, and the monitoring efficiency of the color resistance block in the display area 1 is improved.

In some embodiments, referring to fig. 6 to 9, the color-resisting holes 312 are rectangular holes, so that the length and the width M of the color-resisting holes 312 are easily measured, and when the measured length or the measured width M of the color-resisting holes 312 changes, it is indicated that the through holes on the color-resisting blocks in the display area 1 also change, and accurate monitoring of the color-resisting blocks in the display area 1 can be realized, so as to adjust the size and the arrangement position of the color-resisting blocks.

Of course, in order to measure the size of the color resistance hole 312 conveniently, the color resistance hole 312 may also be set as a circular hole, so that it can be monitored whether the size of the color resistance hole 312 changes only by measuring the diameter of the circular hole, thereby facilitating accurate monitoring of the size change of the through hole on the color resistance block in the display area 1.

The size of the color resistor hole 312 is measured, the width W of the redundant color resistor 31 is measured, the offset D of the redundant color resistor 31 is measured at the same time, the measurement results can be combined, so that the measurement accuracy of the width W and the offset D of the redundant color resistor 31 is improved, the redundant color resistor 31 can be comprehensively monitored, and the change of color resistor blocks in the display area 1 can be comprehensively monitored.

Example two

Referring to fig. 9 to 10, an array substrate provided in embodiment two of the present application is different from that provided in embodiment one only in the structure of the auxiliary measurement structure. In the second embodiment of the present application, a reference retaining wall 34 is disposed on a side of the reference layer 32 away from the substrate base plate 10, and the reference retaining wall 34 is located between two adjacent redundant color resists 31; the reference retaining wall 34 includes two wall edges 341 oppositely disposed along the first direction X, and the reference is identified as the wall edge 341.

The reference retaining wall 34 and the redundant color resistor 31 are disposed on the same layer, and the offset D of the redundant color resistor 31 can be obtained by measuring the distance between one wall edge 341 of the reference retaining wall 34 and the side edge 311 of the redundant color resistor 31, that is, the offset of the color resistor block in the display area 1.

In some embodiments, referring to fig. 10, in the manufacturing process of the array substrate, one of the processes before the redundant color resistors 31 is manufactured is to manufacture an insulating layer, a reference wall 34 may be disposed on the insulating layer, in which the reference layer 32 is the insulating layer, and the reference wall 34 is located between two adjacent redundant color resistors 31, so that after the redundant color resistors 31 are manufactured, the distance between the redundant color resistors 31 and the reference wall 34 may be measured, so as to know the offset D of the offset of the position of the redundant color resistors 31 disposed on the insulating layer, and thus obtain the offset of the color resistor blocks of the display area 1.

It should be noted that, in order to make the arrangement of the reference retaining wall 34 not increase the thickness of the array substrate, the height of the reference retaining wall 34 in the thickness direction Z of the substrate 10 may be set to be the same as the thickness of the redundant color resistor 31, which not only facilitates the measurement of the distance between the reference retaining wall 34 and the side edge 311 of the redundant color resistor 31, but also does not increase the thickness of the array substrate.

EXAMPLE III

Referring to fig. 11, a third embodiment of the present application provides a display panel, including the array substrate 100, the color filter substrate 200, and the liquid crystal layer 300 in any of the above embodiments; the color film substrate 200 and the array substrate 100 are arranged in a box-to-box manner, and the liquid crystal layer 300 is arranged between the color film substrate 200 and the array substrate 100.

The detailed structure of the array substrate 100 can refer to the above embodiments, and is not repeated herein; it can be understood that, since the array substrate 100 is used in the display panel of the present application, the embodiment of the display panel of the present application includes all technical solutions of all embodiments of the array substrate 100, and can achieve the technical effects achieved by the technical solutions.

Example four

Referring to fig. 12, a display device according to a fourth embodiment of the present disclosure includes the display panel according to any one of the above embodiments and a backlight module 400 disposed at one side of the display panel.

The backlight module 400 includes a light guide plate 401, a light source module 402 and an optical film 403, and the backlight module 400 is used for providing illumination for the lcd panel.

In application, the display device may be or may be applied to various electronic apparatuses.

For example, the electronic device may be a desktop computer, a notebook computer, a smart phone, a tablet computer, an e-reader, an in-vehicle computer, a navigator, a digital camera, a smart television, a smart wearable device, and other electronic devices of various types. The display device provided by the fourth embodiment of the application has very wide application prospect.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. An array substrate, comprising a substrate (10), wherein the substrate (10) comprises a display area (1) and a measurement area (3) located at the periphery of the display area (1), and is characterized in that the display area (1) is provided with a plurality of color resistors arranged along a first direction, and one of any two adjacent columns of the color resistors extends to the measurement area (3) along a second direction, so as to form a redundant color resistor (31) in the measurement area (3); the first direction and the second direction are perpendicular to each other;

the measurement area (3) is further provided with a reference identifier configured to determine an offset of the redundant color resistance (31) in the first direction relative to the reference identifier.

2. The array substrate of claim 1,

the measuring area (3) is provided with a reference layer (32), and the redundant color resistance (31) is positioned on one side of the reference layer (32) far away from the substrate base plate (10);

the reference mark is arranged on the reference layer (32).

3. The array substrate of claim 2,

a measurement reference hole (33) penetrating through the reference layer (32) is formed in the reference layer (32), the measurement reference hole (33) comprises two hole edges (332) oppositely arranged along the first direction, and the reference mark is the hole edge (332);

the redundant color resistor (31) comprises two side edges (311) which are oppositely arranged along the first direction;

the hole edge (332) and the side edge (311) are parallel to each other.

4. The array substrate of claim 3,

along the first direction, the orthographic projection of the measurement reference hole (33) on the substrate base plate (10) is positioned between the orthographic projections of two adjacent redundant color resistors (31) on the substrate base plate (10);

or the orthographic projection of the measurement reference hole (33) on the substrate base plate (10) is positioned in the orthographic projection of the redundant color resistance (31) on the substrate base plate (10).

5. The array substrate of claim 3 or 4,

the reference layer (32) is a metal layer having a signal line (321) extending in the first direction, and the measurement reference hole (33) is provided on the signal line (321).

6. The array substrate of claim 2,

a reference retaining wall (34) is arranged on one side, far away from the substrate base plate (10), of the reference layer (32), and the reference retaining wall (34) is located between two adjacent redundant color resistors (31);

benchmark barricade (34) include along two wall borders (341) that first direction set up relatively, the benchmark sign is wall border (341).

7. The array substrate of claim 3 or 4,

each redundant color resistor (31) is provided with a color resistor hole (312), and the color resistor holes (312) penetrate through the redundant color resistors (31) along the thickness direction of the substrate base plate (10).

8. The array substrate of claim 7,

the measuring reference hole (33) is a rectangular hole;

and/or the color resistance hole (312) is a rectangular hole.

9. A display panel, comprising:

the array substrate (100) of any one of claims 1-8;

the color film substrate (200) is arranged in a box-to-box mode with the array substrate (100);

the liquid crystal layer (300) is located between the color film substrate (200) and the array substrate (100).

10. A display device comprising the display panel as claimed in claim 9 and a backlight module (400) disposed at one side of the display panel.