CN115001494B - Background self-adaptive self-calibration method for interleaved sampling - Google Patents
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Abstract
The invention provides a background self-adaptive self-calibration method for interleaved sampling, which comprises the following three steps: a.1/4 sample rate mixing downsampling; b.I/Q mirror calibration; c.1/4 sample rate mixing up-sampling. The step a is divided into three steps of digital I/Q mixing, digital low-pass filtering and double extraction, the step b is divided into three steps of calculating conjugate autocorrelation expectation and modulus expectation, calculating a calibration coefficient a and calibrating, and the step c is divided into three steps of double interpolation, digital low-pass filtering and digital I/Q up mixing. The invention does not need known input signals in the calibration process, has no limiting requirement on the input signals, and improves the application range of calibration. The calibration of the invention is realized by completely relying on digital signal operation, no participation of any analog device is involved, the stability and reliability of the calibration are improved, and the normal operation of a TIADC system is not affected in the calibration process. The calibration method is simple to deploy, can be realized in an FPGA, and can also be realized in a DSP, CPU, GPU processor and the like.
Description
Technical Field
The invention belongs to the technical field of time interleaving sampling, and particularly relates to a background self-adaptive self-calibration method of interleaving sampling.
Background
With the continuous advancement of electronic system digitization and continuous improvement of signal instantaneous bandwidth, the conversion rate and conversion accuracy of analog-to-digital conversion have raised higher and higher requirements. In the fields of radar, signal acquisition, high-speed oscilloscopes, nuclear physics, communication systems, etc., analog-to-digital conversion rates and effective sampling bits are required while maintaining a high level. Due to the limitation of manufacturing process and the like, a single ADC chip is difficult to simultaneously achieve two key technical indexes of high speed and high resolution. The sampling system adopts a plurality of ADCs to sample the same signal at different moments, so that the limitation of the sampling rate of a single-chip high-precision ADC can be broken through, the sampling rate can be doubled, and the sampling system can meet the requirements of high resolution and high sampling rate. This technique is called Time-interleaved sampling (Time-INTERLEAVED ADC, TIADC), and is the most popular technique for solving the problem of high-speed and high-resolution sampling. Meanwhile, as the current domestic ADC sampling rate and sampling precision index are poor, if the limitation of the single-chip ADC capacity can be broken through, the TIADC technology for realizing high-performance sampling on the system level has important strategic significance for the localization of key equipment in China.
In a time interleaved sampling system, physical characteristics between different channels are not likely to be completely uniform due to device mismatch, voltage instability, and other environmental factors. This is manifested in several aspects, including inter-channel amplitude response, frequency response, and delay response. Thus, in an interleaved sampling system, there may be mismatch errors due to channel inconsistencies. These mismatch factors mainly include bias error, gain error, and time error. These errors introduce additional spurs and noise in the output spectrum, severely affecting the performance of the TIADC system.
The problem of mismatch of TIADC systems has attracted considerable attention in the industry and a great deal of research effort has been directed to achieving high-precision calibration of TIADC systems. TIADC calibration can be roughly divided into foreground calibration and background calibration. The foreground calibration refers to inputting a known signal to the TIADC system, then testing the system mismatch according to the output of the TIADC system, converting the test result into a calibration parameter, and carrying out mismatch calibration on the TIADC system. In calibration, foreground calibration requires disconnecting the input of the TIADC system and feeding it with a known signal. The background calibration guidelines do not require these complex procedures. Background calibration refers to the automatic completion of calibration of channel mismatch by signal processing of the output of the TIADC system when the TIADC system is actually operating. Background calibration can be further divided into analog calibration and digital calibration. Background simulation calibration means that calibration parameters are detected according to the output of a TIADC system, and then the parameters of a front-end simulation circuit of the TIADC system are adjusted, so that calibration is realized. The background digital calibration standard refers to digital signal processing of the output of the TIADC system, so that calibration is directly completed.
Obviously, when the foreground calibration is calibrated, the TIADC system cannot work normally, and the calibration parameters also change along with the change of environment and input. Therefore, foreground calibration is not as good as background calibration. The characteristics of the analog circuit can be changed along with the process and environment conversion, so that the background analog calibration is difficult to realize and the performance is poor.
Disclosure of Invention
The invention aims to provide a background self-adaptive self-calibration method of interleaved sampling, which is a background digital calibration method applied to dual-channel interleaved sampling (TIADC).
In order to achieve the above purpose, the invention adopts the following technical scheme:
the invention provides a background self-adaptive self-calibration method for interleaved sampling, which comprises the following steps:
Step a:1/4 sample rate mixed downsampling
Step a.1: digital I/Q mixing
The sampling signal of the two-channel TIADC system is copied into A, B signal copies, and the signal copies A are multiplied by the digital sequences [1,0, -1,0, -1,0. ] with the same number to obtain an I-path signal di; multiplying the signal copy B with an equal number of digital sequences [0, -1,0, -1,0,1. ], to obtain a Q-channel signal dq;
Step a.2: digital low pass filtering
Respectively carrying out convolution operation on the I path signal di and the Q path signal dq and a group of low-pass filter coefficients to obtain a filtered I path signal dfi and a filtered Q path signal dfq;
step a.3: double extraction
Reserving even points in the digital sequences of the I-path signal dfi and the Q-path signal dfq, removing odd points, or reserving odd points and removing even points to obtain an I-path signal df2I and a Q-path signal df2Q;
Step b: I/Q mirror calibration
Step b.1: calculating conjugate autocorrelation expectation and modulo expectation
The I path of signal df2I and the Q path of signal df2Q are copied into three copies, and the copy 1 and the copy 2 perform the calculation of the conjugate autocorrelation expectation and the modulo expectation to obtain the conjugate autocorrelation expectation rx and the modulo expectation cx;
step b.2: calculating the calibration coefficient a
Calculating a calibration coefficient a according to the conjugated autocorrelation expectation rx and the modulus expectation cx;
Step b.3: calibration of
Calibrating the signals df2I and df2Q of the copy 3 by using a calibration coefficient a, and removing mismatched images to obtain calibrated I/Q signals cdf2I and cdf2Q;
Step c:1/4 sample rate mixed upsampling
Step c.1: double interpolation
Inserting a value of 0 between the calibrated I-path signals cdf2I (n) and cdf2I (n+1) to obtain a new I-path signal sequence cf2I as follows: cdf2i (1), 0, cdf2i (2), 0, cdf2i (3), 0, … …; inserting a value of 0 between the calibrated Q-channel signals cdf2Q (n) and cdf2Q (n+1) to obtain a new Q-channel signal sequence cf2Q as follows: cdf2q (1), 0, cdf2q (2), 0, cdf2q (3), 0, … …;
Step c.2: digital low pass filtering
Carrying out convolution operation on the I-path signal cf2I and the Q-path signal cf2Q and a group of low-pass filter coefficients respectively, so as to obtain a filtered I-path signal f2I and a filtered Q-path signal f2Q;
step c.3: digital I/Q up-mixing
1) Let signal S 3 (n) =f2i (n) +i·f2q (n);
2) Constructing a signal S lo (n) = [1,0, -1,0, ] +i· [0,1,0, -1, ];
3) Complex multiplying S 3 (n) by S lo (n) to obtain a signal S 4(n)＝S3(n)·Slo (n);
4) The real part of the signal S 4 (n), the final calibrated signal csig, is taken.
In the step a.1, the number of sampling points contained in the sampling signal copy is at least equal to or more than 4096, and the number of the sampling points is a power exponent of 2.
In the steps a.2 and c.2, the characteristics of the low-pass filter should ensure that: signals below 1/4 sample rate are passed and signals above 1/4 sample rate are blocked.
In said step b.1, conjugate autocorrelation is expectedMode desire/>Where S 1 (N) is a complex signal including I/Q signals, S 1 (N) =df 2i (N) +i·df2q (N), and N is the number of points of the S 1 (N) signal samples.
In said step b.2, the calibration coefficients
In the step b.3, the calibration is performed on S 1 (n) according to the calibration coefficient a, so as to obtain S 2(n),S2(n)＝S1(n)+a·S1 * (n), the real part of the complex signal S 2 (n) is the signal cdf2i (n), and the imaginary part is the signal cdf2q (n).
Compared with the prior art, the invention has the beneficial effects that:
1. The invention discloses a self-adaptive blind calibration method. In the calibration process, known input signals are not needed, and the input signals are not required in a limiting manner, so that the application range of calibration is improved.
2. The invention relates to a calibration method for complete backstage. The calibration process does not affect the proper operation of the TIADC system.
3. The invention is a completely digital calibration method, the calibration is realized completely by digital signal operation, no participation of any analog device is involved, and the stability and reliability of the calibration are improved.
4. The calibration method adopted by the invention is simple to deploy, and can be realized in the FPGA or in the DSP, CPU, GPU and other processors.
Drawings
FIG. 1 is a general flow chart of a background adaptive self-calibration method of interleaved sampling provided by the present invention;
FIG. 2 is a flow chart of step a 1/4 sample rate mixed downsampling according to the present invention;
FIG. 3 is a flow chart of the step b I/Q mirror calibration of the present invention;
FIG. 4 is a flow chart of the step c 1/4 sample rate mixing up-sampling according to the present invention;
FIG. 5 is a schematic diagram of a dual channel TIADC system in which the method of the present invention may be implemented;
FIG. 6 is a diagram of one implementation of the signal distribution circuit of FIG. 5;
FIG. 7 is a graph of sampling effects of the dual channel TIADC system of FIG. 5;
FIG. 8 is a graph of the output power of TIADC system signals without calibration by the method of the present invention;
fig. 9 is a graph of the output power of TIADC system signals after calibration using the method of the present invention.
Detailed Description
The invention is further illustrated in the following examples, which are intended to be illustrative of the invention and not to be limiting of the scope of the invention, and various equivalent modifications to the invention are intended to be included within the scope of the claims of the invention by those skilled in the art.
The background self-adaptive self-calibration method for interleaved sampling provided by the invention, as shown in fig. 1, can be generally divided into three steps: a.1/4 sample rate mixing downsampling; b.I/Q mirror calibration; c.1/4 sample rate mixing up-sampling.
Each of the above steps is described in detail below:
Step a.1/4 sample Rate Mixer downsampling
As shown in fig. 2, the 1/4 sample rate mixed downsampling may be further decomposed into three steps, digital I/Q mixing, digital low pass filtering, and double decimation.
The digital I/Q mixing method is to copy the sampling signal of the dual-channel TIADC system into A, B copies. The number of sampling points contained in the sampling signal replica should be at least equal to or more than 4096, and the number of points should be a power exponent of 2. Let N be the number of samples of the sample signal replica. Wherein the signal replica a is multiplied by an equal number of digital sequences [1,0, -1,0, -1,0. ], resulting in an I-way signal di; the signal replica B is multiplied with an equal number of digital sequences [0, -1,0, -1,0, 1.], resulting in a Q-way signal dq.
The digital low-pass filtering method is to perform convolution operation on the I-path signal di and the Q-path signal dq and a group of low-pass filter coefficients respectively, so as to obtain a filtered I-path signal dfi and a filtered Q-path signal dfq. The characteristics of the low pass filter should ensure that: signals below 1/4 sample rate are passed and signals above 1/4 sample rate are blocked. Low pass filter coefficient calculation methods of this nature are well known in the art and can be quickly calculated using MATLAB tools.
The double extraction method is to reserve even points in the digital sequence of the I-path signal dfi and the Q-path signal dfq, and remove odd points (or alternatively, reserve odd points and remove even points). Thus obtaining an I-way signal df2I and a Q-way signal df2Q. The points of df2i and df2q are N/2.
Step b.I/Q mirror calibration
As shown in fig. 3, the I/Q mirror calibration can be further decomposed into four steps: calculating conjugate autocorrelation expectation, calculating modulus expectation, calculating calibration coefficient a and calibrating. The I-path signal df2I and the Q-path signal df2Q are copied into three copies, and the copies 1 and 2 perform the calculation of the conjugate autocorrelation expectation and the modulo expectation to obtain the conjugate autocorrelation expectation rx and the modulo expectation cx. The calibration coefficients a are then calculated from the conjugate autocorrelation expectation rx and the modulo expectation cx. In calculating the conjugate autocorrelation expectation and the modulo expectation, all signal points of the signals df2i and df2q need to be used. Therefore, the calibration coefficient a can be calculated after the calculation of the conjugate autocorrelation expectation rx and the modulus expectation cx is completed. After the calibration coefficient a is calculated, calibrating the signals df2I and df2Q of the copy 3 by using the calibration coefficient a, and removing mismatch images to obtain calibrated I/Q signals cdf2I and cdf2Q.
The following describes a specific calculation method for realizing the above four steps, respectively.
Signal S 1(n)＝df2i(n)+i·df2q(n),S1 (n) is a complex signal including an I/Q signal. The following discussion will be in terms of complex signal S 1 (n).
1) Calculation of the conjugate autocorrelation expectation rx
N is the number of points of the S 1 (N) signal samples.
2) Calculating modulo expected cx
3) Calculating the calibration coefficient a
4) Calibrating S 1 (n) according to the calibration coefficient a to obtain S 2 (n)
S2(n)＝S1(n)+a·S1 *(n)
The real part of the complex signal S 2 (n) is the signal cdf2i (n) and the imaginary part is the signal cdf2q (n).
Step c.1/4 sample Rate Mixer upsampling
As shown in fig. 4, the 1/4 sample rate mixing up-sampling can be further decomposed into three steps of double interpolation, digital low pass filtering and digital I/Q up-mixing.
The method of the double interpolation is to insert a value of 0 between the signals cdf2i (n) and cdf2i (n+1); a value of 0 is inserted between cdf2q (n) and cdf2q (n+1). The new signal sequence cf2i is thus obtained as: cdf2i (1), 0, cdf2i (2), 0, cdf2i (3), 0, … …; the new signal sequence cf2q is: cdf2q (1), 0, cdf2q (2), 0, cdf2q (3), 0, … ….
The digital low-pass filtering method comprises the following steps: and respectively carrying out convolution operation on the I-path signal cf2I and the Q-path signal cf2Q and a group of low-pass filter coefficients, thereby obtaining a filtered I-path signal f2I and a filtered Q-path signal f2Q. The characteristics of the low pass filter should ensure that: signals below 1/4 sample rate are passed and signals above 1/4 sample rate are blocked. Low pass filter coefficient calculation methods of this nature are well known in the art and can be quickly calculated using MATLAB tools.
The digital I/Q up-mixing method comprises the following steps:
1) Let signal S 3 (n) =f2i (n) +i·f2q (n)
2) Construction signal S lo (n) = [1,0, -1,0, ] +i· [0,1,0, -1, ]
3) Complex multiplication of S 3 (n) with S lo (n) yields signal S 4(n)＝S3(n)·Slo (n)
4) The real part of the signal S 4 (n), the final calibrated signal csig, is taken.
The background self-adaptive self-calibration method of interleaved sampling provided by the invention needs to operate in a two-channel interleaved sampling system, and a specific example of a two-channel TIADC system capable of implementing the method is shown in FIG. 5.
As shown in fig. 5, the input analog signal is converted into two paths, namely an analog signal se:Sub>A and an analog signal B, by the signal distribution circuit, and the analog signal se:Sub>A and the analog signal B are sampled by two ADC chips, namely an ADC-se:Sub>A and an ADC-B, respectively, so as to obtain se:Sub>A sampled digital signal se:Sub>A and se:Sub>A sampled digital signal B. The sampled digital signal A and the sampled digital signal B enter a processor, and the background self-adaptive self-calibration method for interleaving sampling is adopted to perform interleaving processing, so that the interleaved digital signal is obtained. In addition, the dual-channel TIADC system also has a clock source circuit. The clock source circuit is capable of generating a sampling clock a, a sampling clock B, and a system clock. The phase difference between the sampling clock A and the sampling clock B is 90 degrees, and the sampling clocks are respectively input into the ADC-A and the ADC-B and used as sampling clocks of the two ADC chips. The system clock is input to the processor as a processing clock for the processor.
One possible circuit implementation of the two-channel TIADC system shown in fig. 5 is given below:
a. The signal distribution circuit may be implemented using the circuit shown in fig. 6, wherein the balun chip may be of the type: TCM1-83X+ from Mini company;
The possible models of ADC-A and ADC-B are: an ADC083000 from TI;
c. the possible models of the processor are: XC7VX690T of Xilinx company;
d. the possible types of clock sources are: HMC7044 from ADI corporation.
The sampling effect of the two-channel TIADC system shown in fig. 5 is shown in fig. 7. The sampling sequence points of the ADC-A are as follows: an-1, an, an+1 … …; the sampling sequence points of ADC-B are: bn-1, bn, bn+1 … …. Since the phase difference between sampling clocks A and B is 90 DEG, A [ n-1], A [ n ], A [ n+1] … … and B [ n-1], B [ n ], B [ n+1] … … are alternately arranged, and then the following sequence is obtained: an-1, bn-1, an, bn, an+1, bn+1 … ….
Obviously, if the sampling clocks a and B can be kept exactly 90 ° out of phase, then their alternately sampled sequence is equivalent to the result of sampling at twice the sampling frequency. However, the phase difference between the sampling clocks a and B cannot be kept exactly 90 ° due to the interference of the environment, the process, and the like. Thus, alternating sampling may cause errors. The method provided by the invention can be used for realizing the self-adaptive calibration of the dual-channel TIADC system when being deployed in a processor.
The effects of the present invention are described below in a set of comparative data.
Taking a two channel TIADC with a sample rate of 6GSPS as an example. The input signal is a 240MHz sine wave signal.
The output power spectrum of the TIADC system signal is shown in fig. 8 when calibration is not performed using the present invention. Due to the mismatch between the channels, the signal-to-noise ratio (SNR) is only 28.6dBc and the number of significant bits (ENOB) is only 4.46 bits. Meanwhile, the difference between the main signal and the mismatch signal, i.e., SFDR, is only 28.63dBc.
After calibration using the method of the present invention, the power spectrum of the TIADC output signal is shown in fig. 9. The signal-to-noise ratio (SNR) was 56.3dBc and the effective number of bits (ENOB) was 9.06 bits. Meanwhile, the difference between the main signal and the mismatch signal, i.e., SFDR, is 70.12dBc. Therefore, the method of the invention improves SNR by 27.7dBc, ENOB by 4.6 bits and SFDR by 41.49dB.
Compared with other TIADC system calibration methods, the most important point gain of the invention is as follows:
1. The invention discloses a self-adaptive blind calibration method. No known input signal is required in the calibration process and there is no limiting requirement for the input signal. This improves the applicability of the calibration.
2. The invention relates to a calibration method for complete backstage. The calibration process does not affect the proper operation of the TIADC system.
3. The invention is a completely digital calibration method, the calibration is realized completely by digital signal operation, no analog device participates, and the stability and the reliability of the calibration are improved.
4. The calibration method adopted by the invention is simple to deploy, and can be realized in the FPGA or in the DSP, CPU, GPU and other processors.
The foregoing description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and any simple modification, variation and equivalent structural transformation of the above embodiment according to the technical substance of the present invention still fall within the scope of the technical solution of the present invention.
Claims (6)
1. A background self-adaptive self-calibration method of interleaved sampling is characterized by comprising the following steps:
Step a:1/4 sample rate mixed downsampling
The method comprises three steps of digital I/Q mixing, digital low-pass filtering and double extraction;
Step a.1: digital I/Q mixing
The sampling signal of the two-channel TIADC system is copied into A, B signal copies, and the signal copies A are multiplied by the digital sequences [1,0, -1,0, -1,0. ] with the same number to obtain an I-path signal di; multiplying the signal copy B with an equal number of digital sequences [0, -1,0, -1,0,1. ], to obtain a Q-channel signal dq;
Step a.2: digital low pass filtering
Respectively carrying out convolution operation on the I path signal di and the Q path signal dq and a group of low-pass filter coefficients to obtain a filtered I path signal dfi and a filtered Q path signal dfq;
step a.3: double extraction
Reserving even points in the digital sequences of the I-path signal dfi and the Q-path signal dfq, removing odd points, or reserving odd points and removing even points to obtain an I-path signal df2I and a Q-path signal df2Q;
Step b: I/Q mirror calibration
The method comprises the steps of calculating conjugate autocorrelation expectation and modulus expectation, calculating a calibration coefficient a and calibrating;
step b.1: calculating conjugate autocorrelation expectation and modulo expectation
The I path of signal df2I and the Q path of signal df2Q are copied into three copies, and the copy 1 and the copy 2 perform the calculation of the conjugate autocorrelation expectation and the modulo expectation to obtain the conjugate autocorrelation expectation rx and the modulo expectation cx;
step b.2: calculating the calibration coefficient a
Calculating a calibration coefficient a according to the conjugated autocorrelation expectation rx and the modulus expectation cx;
Step b.3: calibration of
Calibrating the signals df2I and df2Q of the copy 3 by using a calibration coefficient a, and removing mismatched images to obtain calibrated I/Q signals cdf2I and cdf2Q;
Step c:1/4 sample rate mixed upsampling
The method comprises three steps of double interpolation, digital low-pass filtering and digital I/Q up-mixing;
step c.1: double interpolation
Inserting a value of 0 between the calibrated I-path signals cdf2I (n) and cdf2I (n+1) to obtain a new I-path signal sequence cf2I as follows: cdf2i (1), 0, cdf2i (2), 0, cdf2i (3), 0, … …; inserting a value of 0 between the calibrated Q-channel signals cdf2Q (n) and cdf2Q (n+1) to obtain a new Q-channel signal sequence cf2Q as follows: cdf2q (1), 0, cdf2q (2), 0, cdf2q (3), 0, … …;
Step c.2: digital low pass filtering
Carrying out convolution operation on the I-path signal cf2I and the Q-path signal cf2Q and a group of low-pass filter coefficients respectively, so as to obtain a filtered I-path signal f2I and a filtered Q-path signal f2Q;
step c.3: digital I/Q up-mixing
1) Let signal S 3 (n) =f2i (n) +i·f2q (n);
2) Constructing a signal S lo (n) = [1,0, -1,0, ] +i· [0,1,0, -1, ];
3) Complex multiplying S 3 (n) by S lo (n) to obtain a signal S 4(n)＝S3(n)·Slo (n);
4) The real part of the signal S 4 (n), the final calibrated signal csig, is taken.
2. The background adaptive self-calibration method of interleaved sampling according to claim 1 wherein: in the step a.1, the number of sampling points contained in the sampling signal copy is at least equal to or more than 4096, and the number of the sampling points is a power exponent of 2.
3. The background adaptive self-calibration method of interleaved sampling according to claim 1 wherein: in the steps a.2 and c.2, the characteristics of the low-pass filter should ensure that: signals below 1/4 sample rate are passed and signals above 1/4 sample rate are blocked.
4. The background adaptive self-calibration method of interleaved sampling according to claim 1 wherein: in said step b.1, conjugate autocorrelation is expectedMode desire/>Where S 1 (N) is a complex signal including I/Q signals, S 1 (N) =df 2i (N) +i·df2q (N), and N is the number of points of the S 1 (N) signal samples.
5. The background adaptive self-calibration method of interleaved sampling according to claim 4 wherein: in said step b.2, the calibration coefficients
6. The background adaptive self-calibration method of interleaved sampling according to claim 4 wherein: in the step b.3, the calibration is performed on S 1 (n) according to the calibration coefficient a, so as to obtain S 2(n),S2(n)＝S1(n)+a·S1 * (n), the real part of the complex signal S 2 (n) is the signal cdf2i (n), and the imaginary part is the signal cdf2q (n).
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