CN115776299A - Low-complexity time mismatch error calibration method for TIADC - Google Patents
Low-complexity time mismatch error calibration method for TIADC Download PDFInfo
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Abstract
The invention provides a low-complexity time mismatch error calibration method for a TIADC, and belongs to the technical field of digital signal processing and high-speed high-precision TIADC. The time mismatch problem that estimation and calibration are the most difficult in the TIADC system is solved. The technical scheme is as follows: the method comprises the following steps: s1: converting an externally input continuous analog signal into digital signals of M channels; s2, combining into a signal y [ n ]; s3: obtaining an output signal after ADC calibration of each channel; s4: estimating the time mismatch error of ADC residue of each channel; s5: the estimated time mismatch error signal is fed back as input to the series modified taylor compensation calibration block. The beneficial effects of the invention are as follows: when the frequency of a 16-bit TIADC input signal is in the whole Nyquist frequency band and is subjected to 3-order calibration, the SFDR of the TIADC system is averagely improved by 56.2dB, and the SNR is averagely improved by 55.6dB.
Description
Technical Field
The invention relates to the technical field of digital signal processing and high-speed and high-precision TIADC, in particular to a low-complexity TIADC time mismatch error calibration method.
Background
Along with the wide application of digital signal processing technology in digital receivers, military radars, test instrument acquisition and other aspects, the analog-to-digital converter ADC as a bridge connecting analog signals and digital signals is becoming more and more important. However, due to the limitations of semiconductor materials and manufacturing processes, it is difficult to achieve both high speed and high accuracy for a monolithic ADC. However, the proposed time-interleaved analog-to-digital converter TIADC makes it possible to implement high speed and high accuracy. The principle is that a plurality of same low-speed and high-precision ADCs alternately sample the same analog input signal x (t), and under the ideal condition, the method not only can maintain the original ADC precision conversion degree, but also can increase the sampling rate by times.
However, due to the non-ideal characteristics of the circuit and the mismatch characteristics between different channels of the TIADC, many mismatch errors exist inside the channels of the constituent TIADC system. If these mismatch errors are not calibrated, the dynamic performance indicators of the entire TIADC system will be adversely affected. It has been shown by current calibration methods that time mismatch is more difficult to detect and calibrate than gain mismatch and bias mismatch. Based on this, how to eliminate the time mismatch error in the TIADC becomes a hot problem of domestic and foreign research.
Currently, for TIADC time mismatch error estimation and calibration, in the literature: WANG C Y, WU J T.A multiple Timing-skip Calibration Technique Using Zero-cross Detection [ J ]. Circuits and Systems I: regular Papers, IEEE Transactions on,2009,56 (6): 1102-1114. In the literature: YUE X Z, SHANG L Z, YONG C L, et al, timing Mismatch Compensation in Time-Interleaved ADCs Based on Multichannel calibration [ J ]. IEEE Transactions on Instrumentation & Measurement,2011,60 (4): 1123-1131. Digital Interpolation filters are used to compensate for Mismatch errors, but once the Mismatch error parameters change, the filter parameters also change, which is clearly not conducive to calibrating Mismatch errors in real Time. In the literature: CHEN S, WANG L, ZHANG H, et al, all-Digital Calibration of Timing Mismatch Error in Time-Interleaved Analog-to-Digital Converters [ J ]. IEEE Transactions on real Large Scale Integration Systems,2017,25 (9): 2552-2560. In the literature: JAMAL S M, FU D, SINGH M P, et al. Calibration of sample-time error in a two-channel time-interleaved analog-to-digital converter [ J ]. Circuits and Systems I: regular Papers, IEEE Transactions on,2004,51 (1): 130-139. A method for calibrating a Hilbert filter is proposed, but this method is only applicable to 2 channels, cannot be extended to any channel, and limits the sampling rate of the entire system to some extent. In the literature: ELBORNSSON J, GUSTAFSSON F, EKLUND J E.Blind equalization of time errors in the three-dimensional ADC system [ J ]. IEEE Transactions on Signal Processing,2005,53 (4): 1413-1424. A blind estimation algorithm is proposed, which has the significant advantage that the relevant information of the input Signal does not need to be known, but the input Signal spectrum is required to have the sparse characteristic, the calculation process is complicated, and the method is generally not beneficial to engineering realization. In the literature: a method for adaptively correcting errors of channels of Wanaguajun, li Ming and TIADC (time adaptive correction of analog to digital converter) channel [ J ]. School of Western-Ann electronic science and technology, 2013,40 (03): 27-35) proposes a calibration method for introducing reference channels, which not only needs redundant ADC reference channels, but also has convergence speed related to ADC precision of the reference channels and general calibration effect. In addition, most existing TIADC channel mismatch calibration methods are only applicable to TIADC systems with the precision of below 14 bits, and for TIADC systems with higher precision (16 bits and above), the application is very little, and the applicability is not verified.
How to solve the above problems is the subject of the present invention.
Disclosure of Invention
The invention aims to provide a low-complexity time mismatch error calibration method for TIADC; the time mismatch problem that the estimation and calibration are the most difficult in the TIADC system is solved; when the frequency of a 16-bit TIADC input signal is within the whole Nyquist frequency band, after 3-order calibration, the SFDR of the TIADC system is averagely improved by 56.2dB, and the SNR is averagely improved by 55.6dB. Compared with the traditional Taylor compensation method, the hardware implementation scale is further reduced.
In order to achieve the purpose of the invention, the invention adopts the technical scheme that: a low complexity TIADC time mismatch error calibration method includes the following components:
the clock frequency division module is used for generating sampling clock signals of all sub-ADC channels in the TIADC;
the analog-to-digital conversion module is used for converting continuous analog signals input from the outside into digital signals through the ADC;
the data compound module is used for outputting each signal into a path of signal;
the error estimation module is used for extracting the time mismatch error of each channel ADC by adopting a linear approximation and statistical method;
and the error calibration module is used for calibrating the time mismatch error of each channel ADC by adopting a serial improved Taylor compensation method.
A low-complexity TIADC time mismatch error calibration method comprises the following steps:
s1: the analog-to-digital conversion module converts an externally input continuous analog signal x (t) into digital signals y of M channels under the control of the clock frequency division module 1 [n]，y 2 [n]，…，y m [n]，…y M [n]And transmitting to the data compound module; m =1,2, \ 8230;, M;
wherein: y is m [n]Represents the M channel ADC actual sampling value, M =1,2, \8230;, M;
s2, using a data compound module to carry out digital signal y on M channels of the TIADC system 1 [n],y 2 [n],...,y m [n],…y M [n]Combine into one-way signal y [ n ]]And will be combinedy[n]Transmitting to an error calibration module;
wherein: m =1,2, \ 8230;, M;
s3: error calibration module based on serial improved Taylor compensation is adopted to combine signals y [ n ] of TIADC]Calibrating, and combining the calibrated signals
Carrying out certain time delay and M times of downsampling to respectively obtain output signals after the ADC is calibrated
And transmitting to an error estimation module;
wherein:
representing the digital signal after the M channel ADC calibration, M =1,2, \ 8230;, M;
s4: and estimating the residual time mismatch error of each channel ADC by adopting an error estimation module based on linear approximation and statistics, and regarding the channel ADC1 as a reference channel, and considering that the channel ADC1 has no time mismatch error. Obtaining M-1 time mismatch errors delta t 2 ，Δt 3 ，…，Δt m ，…，Δt M Transmitting the obtained M-1 time mismatch errors and the data 0 to the data compounding module;
wherein: Δ t m Representing the time mismatch error of the mth channel ADC, M =2,3 \8230;, M;
s5: use of data composition module to combine 0, Δ t 2 ，Δt 3 ，…，Δt m ，…，Δt M Combining into one path of signal, and combining the combined [0, delta t 2 ，Δt 3 ，…，Δt m ，…，Δt M ]The signal is fed back as input to a series modified taylor compensation calibration block.
The step S3 specifically includes the following steps:
s3.1: for m channel ADC actual sampling value y m Expanded by Taylor series as:
wherein: x is a radical of a fluorine atom m (t) represents the mth channel ADC ideal sample value,
representing the i-th derivative, at, of the ideal sample value of the m-th channel ADC m Representing the m channel ADC time mismatch error; l is the order of time mismatch error expansion;
s3.2: based on step S3.1, the m channel ADC actual sampling value y m Is developed into ideal sampling value x m Error polynomial of (t) and time mismatch
A form of a sum; generally, the error energy contained in the higher-order error term is smaller or even negligible;
neglecting the polynomial of the order of the time mismatch error to a power greater than 4, the expression of step S3.1 is rewritten as:
wherein: x is a radical of a fluorine atom m (t) denotes the m-th channel ADC ideal sample value, x' m (t)，x″ m (t)，x″′ m (t)，
Respectively 1,2,3 and 4-order derivatives of ideal sampling values of the m channel ADC;
because the m channel ideal sampling value x is corrected in error m (t) is unknown, and therefore cannot be obtained
The m channel ADC actual sampling value y can be used m To replace x m (t) thereby obtaining an approximation
S3.3: eliminating error term of order 1, using table of step S3.2Estimate of the expression minus the 1 st order error term Δ t m y′ m To obtain the output of the m channel ADC after 1 order error compensation
Comprises the following steps:
s3.4: elimination of 2 nd order error term for Δ t m y′ m To find a first derivative and multiply by
Obtaining:
s3.5: output after 1 order error compensation
Subtracting the expression of the step S3.4 to obtain the output after the 2-order error compensation
Comprises the following steps:
s3.6: eliminating 3 order error term pair
Finding a derivative and multiplying by
Obtaining:
s3.7: output after 2-order error compensation
Subtracting the expression in step 3.6 to obtain the output after 3-order error compensation
Comprises the following steps:
the step S4 specifically includes the following steps:
s4.1: setting the actual sampling values of the m-th channel and the m + 1-th channel of the TIADC system as y m [n]And y m+1 [n]；
According to the linear approximation principle, the actual difference D of adjacent sub-ADC channels m Approximated as the actual sampling time interval T of adjacent sub-ADC channels s +ΔT m+1 -ΔT m Multiplied by the derivative y 'of the sub-ADC channel output' m [n]；m＝1，2，…，M；
For a 4-channel TIADC, the following approximation equation is given:
wherein: t is s Denotes the sampling period, y 'of the TIADC' m [n]Representing derivatives of actual sampled values of m-th channel ADC
Wherein Δ T m (ΔT m ＝Δt m T s ) And Δ T m+1 (ΔT m+1 ＝Δt m+1 T s ) Respectively representing the time mismatch error quantities of the m-th channel and the m + 1-th channel;
s4.2: difference D to the expression of step S4.1 m M =1,2,3,4; taking the absolute value and calculating expectation to obtain:
wherein: e represents expectation;
s4.3: for a generalized stationary signal, the expected value of itself and other derivatives is a constant value and has a time-invariant property. While each sub-ADC in the TIADC of this experiment samples the same analog input sinusoidal signal x (t). Therefore, the expected value of the derivative of each sub-ADC output is considered to be the same as the expected value of the derivative of the original input signal x (t), i.e.:
E(|y′ m [n]|)＝E(|x′(t)D＝δ
wherein: e (| y' m [n]I) represents the expectation of the absolute value of the ADC output derivative of the mth channel, E (| x' (t) |) represents the expectation of the absolute value of the derivative of the input signal, and delta represents a constant;
s4.4: substituting the expression of step 4.3 into the expression of step 4.2 yields:
s4.5: based on step S4.4 expression, A m M =1,2,3,4; is a function that approximates the actual sampling interval with respect to adjacent sub-ADC channels;
considering that the sum of all adjacent sub-ADC channel time intervals is a constant value MT s ；
Wherein: m is the number of sub-ADC channels in the TIADC;
each A is m The values are added and averaged to give the following formula:
s4.6: based on the expression of step S4.5,
is related to the whole system sampling period T s Proportional to time mismatch Δ T m Irrelevant; and subtracting the expression in the step 4.4 from the expression in the step 4.5 to obtain the correlation quantity containing the time mismatch error:
s4.7: by using the minimum meanSquare LMS method vs. Δ t m Performing iteration according to the following iteration formula:
Δt m (n+1)＝Δt m (n)+μ×B m
wherein: Δ t m (n) a time mismatch error value at a previous time; Δ t m (n + 1) a time mismatch error value at a subsequent time; μ is the iteration step size of the algorithm.
Compared with the prior art, the invention has the following beneficial effects:
(1) The time mismatch error calibration scheme based on the low-complexity TIADC provided by the invention is completely completed in a digital domain, while most of the traditional calibration schemes are completed in a digital-analog mixed domain or an analog domain and are easily influenced by factors such as external environment temperature and the like.
(2) When the input signal is at a lower frequency, f in /f s ＝0.11，f s =500MHz, there are many spurious spectra before misalignment, where spurious-free dynamic range SFDR =46.2dB, signal-to-noise ratio SNR =42.2dB, significant number ENOB =6.72; after third-order calibration, most of the spurious spectrum has been substantially suppressed, with a spurious-free dynamic range SFDR =104.1dB, a signal-to-noise ratio SNR =96.3dB, and a significant number ENOB =15.7. When the input signal is at a higher frequency, f in /fs＝0.347，f s =500MHz, with a lot of spurious spectra before misalignment, where spurious-free dynamic range SFDR =36.1dB, signal-to-noise ratio SNR =32.3dB, significant number ENOB =5.07; after third-order calibration, most of the spurious spectrum has been substantially suppressed, with a spurious-free dynamic range SFDR =97.1dB, a signal-to-noise ratio SNR =93.5dB, and a significant number ENOB =15.23. When the input signal is in the whole Nyquist frequency band, the SFDR is averagely improved by 58.4dB and the SNR is averagely improved by 55.7dB before and after the third-order calibration. Finally, when the input signal is of multiple frequencies, f in /fs＝0.147、0.247、0.347，f in =500MHz, the spurious spectrum is mostly suppressed after third order calibration.
(3) The error estimation module provided by the invention adopts a linear approximation and statistical method, the method only contains addition and subtraction operation, multiplication operation is not involved, and hardware resource consumption and algorithm complexity are reduced to a certain extent.
(4) The error calibration module provided by the invention adopts a serial improved Taylor compensation structure, and has fewer adders, multipliers and differentiators compared with the traditional Taylor compensation structure. For example, for a four-channel TIADC, the number of differentiators, multipliers and adders used in the improved taylor compensation structure is reduced by 15 compared with that used in a conventional taylor compensation structure. Similarly, if the number of TIADC channels continues to increase, the resource consumption will decrease even more.
(5) In the calibration scheme provided by the invention, the estimation module and the calibration module form a feedback type calibration structure together, so that the mismatch error can be estimated and calibrated in real time.
(6) The calibration scheme provided by the invention can be popularized to any M-channel TIADC system, and is very suitable for engineering application.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention.
FIG. 1 is a schematic diagram of the system of the present invention;
FIG. 2 is a block diagram of a TIADC system of the present invention, (a) is a TIADC schematic diagram, and (b) is a TIADC timing diagram;
FIG. 3 is a graph of adjacent subchannel ADC sampling waveforms in the TIADC of the present invention;
FIG. 4 is a schematic diagram of the four-channel TIADC time mismatch error extraction of the present invention;
FIG. 5 is a block diagram of the improved third order cascaded Taylor compensation of the present invention;
FIG. 6 is a block diagram of an overall four-channel TIADC time mismatch error calibration algorithm of the present invention;
FIG. 7 is a graph of the output spectrum of the four-channel TIADC of the present invention before and after the third-order correction when inputting low frequency,
the calibration chart is (a) a chart before calibration, (b) a first-order calibration chart, (c) a second-order calibration chart, and (d) a third-order calibration chart;
FIG. 8 is a graph of the output spectrum of the four-channel TIADC of the present invention before and after the third-order correction when inputting high frequency,
the calibration chart is (a) a chart before calibration, (b) a first-order calibration chart, (c) a second-order calibration chart, and (d) a third-order calibration chart;
FIG. 9 illustrates the SFDR and SNR changes before and after third-order calibration for a four-channel TIADC of the present invention at different input frequencies;
FIG. 10 is a diagram of output spectra before and after three-order correction when the four-channel TIADC of the present invention is applied to multi-frequency input;
the calibration chart includes (a) a chart before calibration, (b) a first-order calibration chart, (c) a second-order calibration chart, and (d) a third-order calibration chart.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. Of course, the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example 1
Referring to fig. 1, the invention provides a low-complexity time mismatch error calibration method for TIADC, comprising the following components:
the clock frequency division module is used for generating sampling clock signals of all sub-ADC channels in the TIADC;
the analog-to-digital conversion module is used for converting continuous analog signals input from the outside into digital signals through the ADC;
the data compound module is used for outputting each signal into a path of signal;
the error estimation module extracts the time mismatch error of each channel ADC by adopting a linear approximation and statistical method;
and the error calibration module is used for calibrating the time mismatch error of each channel ADC by adopting a serial improved Taylor compensation method.
A low-complexity TIADC time mismatch error calibration method comprises the following steps:
s1: the analog-to-digital conversion module converts an externally input continuous analog signal x (t) into digital signals y of M channels under the control of the clock frequency division module 1 [n]，y 2 [n]，…，y m [n]，…y M [n]And transmitting to the data compound module; m =1,2, \ 8230;, M;
wherein: y is m [n]Represents the M channel ADC actual sampling value, M =1,2, \8230;, M;
s2: digital signal y of M channels of TIADC system by using data compound module 1 [n]，y 2 [n]，…，y m [n]，…y M [n]Combine into one-way signal y [ n ]]And combine the combined y [ n ]]Transmitting to an error calibration module;
wherein: m =1,2, \ 8230;, M;
s3: error calibration module based on serial improved Taylor compensation is adopted to carry out combination on TIADC signals y [ n [ ]]Calibrating, and combining the calibrated signals
Carrying out certain time delay and M times of downsampling to respectively obtain output signals after the ADC is calibrated
And transmitting to an error estimation module;
wherein:
representing the digital signal after calibration of the mth channel ADC, M =1,2, \8230;, M;
s4: and estimating the residual time mismatch error of each channel ADC by adopting an error estimation module based on linear approximation and statistics, and regarding the channel ADC1 as a reference channel, wherein the channel ADC1 is considered to have no time mismatch error. Obtaining M-1 time mismatch error quantities delta t 2 ，Δt 3 ，…，Δt m ，…，Δt M Transmitting the obtained M-1 time mismatch error quantities and the data 0 to the data compounding module;
wherein: Δ t m Representing the time mismatch error of the mth channel ADC, M =2,3 \8230;, M;
s5: use of data composition module to combine 0, Δ t 2 ,Δt 3 ,…，Δt m ，…，Δt M The signals are combined into a signal of one path,and will combine the [0, Δ t [ ] 2 ,Δt 3 ，…，Δt m ，…，Δt M ]The signal is fed back as input to a series modified taylor compensation calibration block.
The step S3 specifically includes the following steps:
s3.1: ADC actual sampling value y for m channel m Expanded by Taylor series as:
wherein: x is the number of m (t) represents the mth channel ADC ideal sample value,
representing the i-th derivative, at, of the ideal sample value of the m-th channel ADC m Representing the m channel ADC time mismatch error; l is the order of time mismatch error expansion;
s3.2: based on step S3.1, the m channel ADC actual sampling value y m Is developed into ideal sampling value x m Error polynomial of (t) and time mismatch
A form of a sum; generally, the error energy contained in the higher-order error term is smaller or even negligible;
neglecting polynomials of more than 4 times the time mismatch error order, the expression of step S3.1 is rewritten as:
wherein: x is a radical of a fluorine atom m (t) denotes the m-th channel ADC ideal sample value, x' m (t)，x″ m (t)，x″′ m (t)，
Respectively 1,2,3 and 4 order derivatives of ideal sampling values of the ADC of the mth channel;
since the mth channel is ideal in error calibrationSampling value x m (t) is unknown and thus cannot be obtained
The m channel ADC actual sampling value y can be used m To replace x m (t) to approximately obtain
S3.3: eliminating the 1 st order error term and subtracting the estimated value Δ t of the 1 st order error term from the expression of step S3.2 m y′ m To obtain the output of the m channel ADC after 1 order error compensation
Comprises the following steps:
s3.4: elimination of 2 nd order error term for Δ t m y′ m Finding a derivative and multiplying by
Obtaining:
s3.5: output after 1 order error compensation
Subtracting the expression of the step S3.4 to obtain the output after the 2-order error compensation
Comprises the following steps:
s3.6: elimination of 3 th order error term, pair
Finding a derivative and multiplying by
Obtaining:
s3.7: output after 2-order error compensation
Subtracting the expression in the step 3.6 to obtain the output after 3-order error compensation
Comprises the following steps:
the step S4 specifically includes the following steps:
s4.1: setting the actual sampling values of the m-th channel and the m + 1-th channel of the TIADC system as y m [n]And y m+1 [n]；
According to the linear approximation principle, the actual difference D of the adjacent sub-ADC channels m Approximated as the actual sampling time interval T of the adjacent sub-ADC channels s +ΔT m+1 -ΔT m Multiplied by the derivative y 'of the sub-ADC channel output' m [n]；m＝1，2，…，M；
For a 4-channel TIADC, the following approximation equation is given:
wherein: t is s Denotes the sampling period, y 'of TIADC' m [n]Representing the derivative of the actual sampled value, Δ T, of the m-th channel ADC m (ΔT m ＝Δt m T s ) And Δ T m+1 (ΔT m+1 ＝Δt m+1 T s ) Respectively representing the time mismatch error quantities of the m-th channel and the m + 1-th channel;
s4.2: difference D of expression to step S4.1 m M =1,2,3,4; taking the absolute value and calculating the expectation, obtaining:
wherein: e represents expectation;
s4.3: for a generalized stationary signal, the expected value of itself and other derivatives is a constant value and has a time-invariant property. While each sub-ADC in the TIADC of this experiment samples the same analog input sinusoidal signal x (t). Therefore, the expected value of the derivative of each sub-ADC output is considered to be the same as the expected value of the derivative of the original input signal x (t), i.e.:
E(|y′ m [n]|)＝E(|x'(t)|)＝δ
wherein: e (| y' m [n]|) represents the expectation of the absolute value of the output derivative of the m-th channel ADC, E (| x' (t) |) represents the expectation of the absolute value of the derivative of the input signal, and delta represents a constant;
s4.4: substituting the expression of step 4.3 into the expression of step 4.2 can result in:
s4.5: based on step S4.4 expression, A m M =1,2,3,4; is a function that approximates the actual sampling interval with respect to adjacent sub-ADC channels;
considering that the sum of all adjacent sub-ADC channel time intervals is a constant value MT s ；
Wherein: m is the number of ADC channels in the TIADC;
each A is m The values are added and averaged to give the following formula:
s4.6: based on the expression of step S4.5,
is related to the whole system sampling period T s Proportional to the time mismatch Δ T m Irrelevant; and subtracting the expression in the step 4.4 from the expression in the step 4.5 to obtain the correlation quantity containing the time mismatch error:
s4.7: using least mean square LMS method to measure delta t m Performing iteration according to the following iteration formula:
Δt m (n+1)＝Δt m (n)+μxB m
wherein: Δ t m (n) a time mismatch error value at a previous time; Δ t m (n + 1) a time mismatch error value at a subsequent time; μ is the iteration step size of the algorithm.
Example 2
On the basis of embodiment 1, first, the four-channel TIADC system of the present invention will be described, in which the sampling rate of the four-channel TIADC system is set to 500MHz, that is, the sampling rate of each internal ADC is set to 250MHz, the resolution is set to 16 bits, and the range is ± 1v. Gaussian white noise is added in the simulation process to simulate various inherent noises such as quantization error, random noise and the like in the actual system. Meanwhile, regarding the channel ADC1 as a reference channel, adding [0.01,0.02,0.03 ] to the channels ADC2, ADC3 and ADC4 in sequence]T S Time mismatch error.
Fig. 2a and 2b show a schematic diagram and a timing diagram, respectively, of an M-channel TIADC system architecture. Wherein T is s Representing the TIADC sampling interval, f s Represents the TIADC sampling frequency; .
FIG. 3 is a waveform diagram of sampling of adjacent sub-channel ADCs in the TIADC of the present invention. Wherein the black point and the white point respectively represent an ideal sampling value and an actual sampling value, and it can be seen from the figure that, according to the linear approximation principle, the actual difference value D of the adjacent sub-ADC channels m Can be approximated as the actual sampling time interval T of the adjacent sub-ADC channels s +ΔT m+1 -ΔT m Multiplied by the derivative y 'of the sub-ADC channel output' m [n]。
FIG. 4 is a schematic diagram of the four-channel TIADC time mismatch error extraction of the present invention. As can be seen from the figure, the estimation module only contains addition and subtraction operations, and does not relate to relatively complex multiplication operations, so that the hardware resource consumption and the algorithm complexity are reduced to a certain extent.
Fig. 5 is a diagram of the improved third order cascade taylor compensation of the present invention. As can be seen from the figure, the number of differentiators, multipliers and adders is small.
Table 1 is a consumption comparison table of the four-channel TIADC improvement of the present invention and the conventional three-order cascaded taylor compensation structure; it can be seen from the table that, taking the four-channel TIADC as an example, the number of differentiators, multipliers and adders used in the improved taylor compensation structure is reduced by 15 compared with the traditional taylor compensation structure. Similarly, if the number of TIADC channels continues to increase, the resource consumption will decrease even more.
Table 1: consumption comparison table of four-channel TIADC improved structure and traditional three-order cascade Taylor compensation structure
FIG. 6 is an overall block diagram of the four-channel TIADC time mismatch error calibration algorithm of the present invention. As can be seen from the figure, the error compensation module and the error estimation module together form a feedback type calibration structure, so as to estimate and calibrate the time mismatch error in real time.
FIG. 7 shows a four-channel TIADC of the present invention at low frequency input (f) in /f s ＝0.11，f s =500 MHz), output spectrogram before and after each calibration stage. As can be seen from fig. 7 (a), at a lower frequency of the input signal, there are many spurious spectra before misalignment, where spurious-free dynamic range SFDR =46.2dB, signal-to-noise ratio SNR =42.2dB, and significant number ENOB =6.72; as can be seen from fig. 7 (b), after the first-order calibration, the spurious spectrum is suppressed, wherein the spurious-free dynamic range SFDR =77.9dB, the signal-to-noise ratio SNR =75.2dB, and the significant digit ENOB =12.2; as can be seen from FIG. 7 (c), after the second-order calibration, the spurious spectrum is also suppressed, wherein the spurious-free dynamic range SFDR =100.2dB, the signal-to-noise ratio SNR =95.5dB, and the effectiveDigit ENOB =15.57; as can be seen from fig. 7 (d), after the third-order calibration, the spurious spectrum is suppressed even more, where the spurious-free dynamic range SFDR =104.1dB, the signal-to-noise ratio SNR =96.3dB, and the significant number ENOB =15.7.
FIG. 8 shows a four-channel TIADC of the present invention at high frequency input (f) in /f s ＝0.347，f s =500 MHz), output spectrograms before and after each calibration. As can be seen from fig. 8 (a), at higher frequencies of the input signal, there are many spurious spectra before misalignment, where spurious-free dynamic range SFDR =36.1dB, signal-to-noise ratio SNR =32.3dB, significant number ENOB =5.07; as can be seen from fig. 8 (b), after the first-order calibration, the spurious spectrum is suppressed, where spurious-free dynamic range SFDR =63.1dB, signal-to-noise ratio SNR =62.7dB, and effective number ENOB =10.12; as can be seen from fig. 8 (c), after the second-order calibration, the spurious spectrum is also suppressed, where the spurious-free dynamic range SFDR =94.1dB, the signal-to-noise ratio SNR =90.7dB, and the significant number ENOB =14.77; as can be seen from fig. 8 (d), after the third-order calibration, the spurious spectrum is more suppressed, wherein the spurious-free dynamic range SFDR =97.1dB, the signal-to-noise ratio SNR =93.5dB, and the significant bit ENOB =15.23.
Table 2 is a table of the improved Taylor compensation effect for different orders of the four-channel TIADC of the present invention. It can be seen from the table that when the cascade order of the taylor compensation reaches the fourth order and the fifth order, each dynamic performance index of the TIADC slightly changes relative to the third order cascade calibration. Because, it is assumed that the time mismatch error is of the order of 10 -2 The order of magnitude of the fourth and fifth order error terms, respectively, reaches 10 -8 And 10 -10 . The compensation for higher order error terms is negligible. Therefore, the calibration can be completed by utilizing the third-order cascade taylor compensation in the aspect of the compromise consideration of calibration performance and resource consumption.
Table 2: table of taylor compensation effect improved by different orders of four-channel TIADC
FIG. 9 shows the SFDR and SNR variations before and after three-order calibration of the four-channel TIADC input signals of the present invention over the entire Nyquist frequency band. It is clear from the figure that the input signal of the present invention is applicable in the entire Nyquist band, wherein the SFDR is improved by 58.4dB averagely and the SNR is improved by 55.7dB averagely.
FIG. 10 shows a four-channel TIADC of the present invention at multi-frequency input (f) in /f s ＝0.147、0.247、0.347，f in =500 MHz), output spectrograms before and after each calibration. As can be seen from fig. 10 (a), when the input signal has multiple frequencies, there are many spurious spectra before being calibrated; as can be seen from fig. 10 (b), after first-order calibration, the spurious spectrum is suppressed; as can be seen from fig. 10 (c), after the second-order calibration, the stray spectrum is suppressed compared to the first-order calibration; as can be seen from fig. 10 (d), the spurious spectrum suppression is more significant after the third-order calibration.
By adopting the technical scheme, the invention provides a low-complexity TIADC time mismatch error calibration scheme, which adopts linear approximation and statistical principles to carry out correlation operation on output signals between adjacent channels to estimate time mismatch errors, and then utilizes an improved Taylor series expansion-based high-order error correction method to carry out error compensation, thereby further reducing the hardware realization scale.
The time mismatch error calibration method based on low complexity is suitable for a high-precision TIADC system, wherein the error compensation module and the error estimation module form a feedback type calibration structure together so as to estimate and calibrate the time mismatch error in real time. Compared with other methods, the method can finish the TIADC system calibration of any channel with lower complexity, and has good calibration effect in the whole Nyquist sampling frequency no matter when the input signal is single-frequency or multi-frequency.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (3)
1. A low-complexity TIADC time mismatch error calibration method is characterized by comprising the following steps:
s1: the analog-to-digital conversion module converts an externally input continuous analog signal x (t) into digital signals y of M channels under the control of the clock frequency division module 1 [n]，y 2 [n]，…，y m [n]，…y M [n]And transmitting to the data compound module; m =1,2, \ 8230;, M;
wherein: y is m [n]Represents the M channel ADC actual sampling value, M =1,2, \8230;, M;
s2, using a data compound module to carry out digital signal y on M channels of the TIADC system 1 [n]，y 2 [n]，…，y m [n]，…y M [n]Combine into one-way signal y [ n ]]And combine the combined y [ n ]]Transmitting to an error calibration module;
wherein: m =1,2, \ 8230;, M;
s3: error calibration module based on serial improved Taylor compensation is adopted to carry out combination on TIADC signals y [ n [ ]]Calibrating, and combining the calibrated signals
Carrying out certain time delay and M times of downsampling to respectively obtain output signals after the ADC calibration
And transmitting to an error estimation module;
wherein:
representing the digital signal after calibration of the mth channel ADC, M =1,2, \8230;, M;
s4: estimating the residual time mismatch error of the ADC of each channel by using an error estimation module based on linear approximation and statistics to obtain M-1 time mismatch errors delta t 2 ，Δt 3 ，…，Δt m ，…，Δt M Transmitting the obtained M-1 time mismatch errors and the data 0 to the data compounding module;
wherein: Δ t m To representTime mismatch error for mth channel ADC, M =2,3 \8230;, M;
s5: use of data composition module to combine 0, Δ t 2 ，Δt 3 ，…，Δt m ，…，Δt M Combining into one path of signal, and combining the combined [0, delta t 2 ，Δt 3 ，…，Δt m ，…，Δt M ]The signal is fed back as input to the serial modified taylor compensation calibration block.
2. The method according to claim 1, wherein the step S3 specifically comprises the steps of:
s3.1: ADC actual sampling value y for m channel m Using a Taylor series expansion as:
wherein: x is a radical of a fluorine atom m (t) represents the mth channel ADC ideal sample value,
representing the i-th derivative, at, of the ideal sample value of the m-th channel ADC m Representing the m channel ADC time mismatch error; l is the order of time mismatch error expansion;
s3.2: based on step S3.1, the m channel ADC actual sampling value y m Is developed into ideal sampling value x m (t) and time mismatch error polynomial
The form of a sum;
neglecting polynomials of more than 4 times the time mismatch error order, the expression of step S3.1 is rewritten as:
wherein: x is the number of m (t) denotes the m-th channel ADC ideal sample value, x' m (t)，x″ m (t)，x″′ m (t)，
Respectively 1,2,3 and 4 order derivatives of ideal sampling values of the ADC of the mth channel;
s3.3: eliminating the 1 st order error term and subtracting the estimated value Δ t of the 1 st order error term from the expression of step S3.2 m y′ m To obtain the output of the m channel ADC after 1 order error compensation
Comprises the following steps:
s3.4: elimination of 2 nd order error term for Δ t m y′ m Finding a derivative and multiplying by
Obtaining:
s3.5: output after 1 order error compensation
Subtracting the expression of the step S3.4 to obtain the output after 2-order error compensation
Comprises the following steps:
s3.6: elimination of 3 th order error term, pair
Finding a derivative and multiplying by
Obtaining:
s3.7: output after 2-order error compensation
Subtracting the expression in step 3.6 to obtain the output after 3-order error compensation
Comprises the following steps:
3. the method according to claim 1, wherein the step S4 specifically comprises the following steps:
s4.1: setting the actual sampling values of the m-th channel and the m + 1-th channel of the TIADC system as y m [n]And y m+1 [n]；
According to the linear approximation principle, the actual difference D of the adjacent sub-ADC channels m Approximated as the actual sampling time interval T of the adjacent sub-ADC channels s +ΔT m+1 -ΔT m Multiplied by the derivative y 'of the sub-ADC channel output' m [n]；m＝1，2，…，M；
For a 4-channel TIADC, the following approximation equation is given:
wherein: t is a unit of s Denotes the sampling period, y 'of the TIADC' m [n]Representing the derivative of the actual sampling value of the mth channel ADC; delta T m (ΔT m ＝Δt m T s ) And Δ T m+1 (ΔT m+1 ＝Δt m+1 T s ) Respectively representing the time mismatch error quantities of the m-th channel and the m + 1-th channel;
s4.2: difference D of expression to step S4.1 m M =1,2,3,4; taking the absolute value and calculating the expectation, obtaining:
wherein: e represents expectation;
s4.3: the expected value of the derivative of each sub-ADC output is the same as the expected value of the derivative of the original input signal x (t), i.e.:
E(|y′ m (n)|)＝E(|x′(t)|)＝δ
wherein: e (| y' m (n) |) represents the expectation of the absolute value of the output derivative of the m-th channel ADC, E (| x' (t) |) represents the expectation of the absolute value of the derivative of the input signal, and delta represents a constant;
s4.4: substituting the expression of step 4.3 into the expression of step 4.2 yields:
s4.5: based on step S4.4 expression, A m M =1,2,3,4; is a function that approximates the actual sampling interval with respect to adjacent sub-ADC channels;
considering that the sum of all adjacent sub-ADC channel time intervals is a constant value MT s ；
Wherein: m is the number of sub-ADC channels in the TIADC;
each A is m The values are added up to average out,the following formula is obtained:
s4.6: based on the expression of step S4.5,
is related to the whole system sampling period T s Proportional to time mismatch Δ T m Irrelevant; and subtracting the expression in the step 4.4 from the expression in the step 4.5 to obtain the correlation quantity containing the time mismatch error:
s4.7: using least mean square LMS method to measure delta t m Iteration is carried out, and the iteration formula is as follows:
Δt m (n+1)＝Δt m (n)+μ×B m
wherein: Δ t m [n]A time mismatch error value at a previous time; Δ t m (n + 1) a time mismatch error value at a subsequent time; μ is the iteration step size of the algorithm.
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| CN117728838A (en) * | 2024-02-08 | 2024-03-19 | 深圳市山海半导体科技有限公司 | Analog-to-digital conversion device and calibration method for ADC offset error |
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| CN117491744A (en) * | 2024-01-02 | 2024-02-02 | 石家庄博铭仪器有限公司 | Comprehensive time-frequency parameter measurement method for wide-range arbitrary frequency point |
| CN117491744B (en) * | 2024-01-02 | 2024-03-29 | 石家庄博铭仪器有限公司 | Comprehensive time-frequency parameter measurement method for wide-range arbitrary frequency point |
| CN117728838A (en) * | 2024-02-08 | 2024-03-19 | 深圳市山海半导体科技有限公司 | Analog-to-digital conversion device and calibration method for ADC offset error |
| CN117728838B (en) * | 2024-02-08 | 2024-05-28 | 深圳市山海半导体科技有限公司 | Analog-to-digital conversion device and calibration method for ADC offset error |
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