CN115001494A - Interleaving sampling background self-adaptive self-calibration method - Google Patents
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Abstract
The invention provides a background self-adaptive self-calibration method for interleaved sampling, which comprises the following three steps: 1/4 sampling rate mixing downsampling; b.I/Q mirror calibration; and c.1/4 sampling rate mixing up-sampling. The step a is divided into three steps of digital I/Q frequency mixing, digital low-pass filtering and double decimation, the step b is divided into three steps of calculating conjugate autocorrelation expectation and modulus expectation, calculating calibration coefficient a and calibrating, and the step c is divided into three steps of double interpolation, digital low-pass filtering and digital I/Q up-mixing. The invention does not need to know the input signal in the calibration process, has no restrictive requirement on the input signal and improves the application range of calibration. Moreover, the calibration of the invention is realized completely depending on digital signal operation without any analog device, thereby improving the stability and reliability of the calibration and having no influence on the normal work of the TIADC system in the calibration process. The calibration method is simple to deploy, can be realized in an FPGA (field programmable gate array) and also can be realized in processors such as a DSP (digital signal processor), a CPU (central processing unit), a GPU (graphic processing unit) and the like.
Description
Technical Field
The invention belongs to the technical field of time interleaved sampling, and particularly relates to a background self-adaptive self-calibration method for interleaved sampling.
Background
With the continuous advancement of electronic system digitization and the continuous improvement of instantaneous signal bandwidth, higher and higher requirements are put forward on the conversion rate and conversion precision of analog-digital conversion. In the fields of radar, signal acquisition, high-speed oscilloscopes, nuclear physics, communication systems and the like, analog-to-digital conversion rate and effective sampling digit are required to be kept at a high level at the same time. Due to the limitations of manufacturing processes and the like, it is difficult for a single ADC chip to simultaneously consider two key technical indexes, namely high speed and high resolution. The multiple ADCs are adopted to sample the same signal at different moments, so that the limitation of the sampling rate of a single-chip high-precision ADC can be broken through, and the sampling rate is increased by multiple times, so that the sampling system can meet the requirements of high resolution and high sampling rate at the same time. This technique is called Time-interleaved ADC (TIADC), and is the most popular technical solution to solve the problem of high-speed and high-resolution sampling. Meanwhile, because the sampling rate and the sampling precision index of the current domestic ADC are poorer, if the capability limit of a single-chip ADC can be broken through, the TIADC technology for realizing high-performance sampling on a system level has important strategic significance on the localization of key equipment in China.
In a time-interleaved sampling system, due to the existence of environmental factors such as device mismatch and voltage instability, the physical characteristics of different channels cannot be completely consistent. This is reflected in the amplitude response, frequency response and delay response among channels. Thus, in an interleaved sampling system, there can be mismatch errors due to channel non-uniformity. These mismatch factors mainly include offset error, gain error and time error. These errors introduce additional spurs and noise into the output spectrum, which severely affect the performance of the TIADC system.
The mismatch problem of TIADC systems has attracted extensive attention in the industry and a great deal of research has been directed to achieving high accuracy calibration of TIADC systems. TIADC calibration can be roughly divided into foreground calibration and background calibration. The foreground calibration is to input a known signal to the TIADC system, then test the system mismatch condition according to the output of the TIADC system, convert the test result into calibration parameters, and perform mismatch calibration on the TIADC system. In calibration, foreground calibration requires disconnecting the input of the TIADC system and feeding it with a known signal. Background calibration does not require these complex processes. Background calibration refers to automatically completing calibration of channel mismatch by performing signal processing on the output of the TIADC system when the TIADC system actually works. The background calibration can be further divided into analog calibration and digital calibration. Background analog calibration refers to that calibration is realized by adjusting parameters of a front-end analog circuit of the TIADC system after calibration parameters are detected according to the output of the TIADC system. While the latter digital calibration means that the output of the TIADC system is digitally signal processed to directly complete the calibration.
Obviously, foreground calibration is performed when the TIADC system does not work normally, and the calibration parameters change with the change of environment and input. Therefore, foreground calibration is inferior to background calibration. The characteristics of the analog circuit can change along with the change of the process and the environment, so that the background analog calibration is difficult to realize and has poor performance.
Disclosure of Invention
The invention aims to provide a background self-adaptive self-calibration method for interleaved sampling, which is a background digital calibration method applied to dual-channel interleaved sampling (TIADC).
In order to achieve the purpose, the invention adopts the technical scheme that:
the invention provides a background self-adaptive self-calibration method for interleaved sampling, which comprises the following steps:
step a: 1/4 sampling rate mixer downsampling
Step a.1: digital I/Q mixing
Copying a sampling signal of the dual-channel TIADC system into A, B two signal copies, multiplying the signal copy A by a digital sequence [1,0, -1,0,1,0, -1,0. ] with the same number to obtain a path I signal di; multiplying the signal copy B by an equal number of digital sequences [0, -1,0,1,0, -1,0,1. ] to obtain a Q-path signal dq;
step a.2: digital low pass filtering
Performing convolution operation on the I path signal di and the Q path signal dq with a group of low-pass filter coefficients respectively to obtain a filtered I path signal dfi and a filtered Q path signal dfq;
step a.3: double extraction
Reserving even points in the digital sequence of the path I signal dfi and the path Q signal dfq, and removing odd points, or reserving odd points and removing even points to obtain a path I signal df2I and a path Q signal df 2Q;
step b: I/Q mirror calibration
Step b.1: computing conjugate autocorrelation expectation and modulo expectation
The I path signal df2I and the Q path signal df2Q are copied into three copies, and the copy 1 and the copy 2 perform calculation of the conjugate autocorrelation expectation and the modulus expectation to obtain a conjugate autocorrelation expectation rx and a modulus expectation cx;
step b.2: calculating a calibration coefficient a
Calculating a calibration coefficient a according to the conjugate autocorrelation expected rx and the modulus expected cx;
step b.3: calibration
Calibrating signals df2I and df2Q of the replica 3 by using a calibration coefficient a, and removing mismatched images to obtain calibrated I/Q signals cdf2I and cdf 2Q;
step c: 1/4 sample rate mixing upsampling
Step c.1: double interpolation
A value 0 is inserted between the calibrated I-path signals cdf2I (n) and cdf2I (n +1), and the new I-path signal sequence cf2I is obtained as follows: cdf2i (1),0, cdf2i (2),0, cdf2i (3),0, … …; a value 0 is inserted between the calibrated Q-path signals cdf2Q (n) and cdf2Q (n +1), and a new Q-path signal sequence cf2Q is obtained as follows: cdf2q (1),0, cdf2q (2),0, cdf2q (3),0, … …;
step c.2: digital low pass filtering
Performing convolution operation on the I path signal cf2I and the Q path signal cf2Q and a group of low-pass filter coefficients respectively to obtain a filtered I path signal f2I and a filtered Q path signal f 2Q;
step c.3: digital I/Q upmix
1) Order signal S 3 (n)＝f2i(n)+i·f2q(n)；
2) Construction signal S lo (n)＝[1,0,-1,0,...]+i·[0,1,0,-1,...]；
3) Will S 3 (n) and S lo (n) complex multiplying to obtain a signal S 4 (n)＝S 3 (n)·S lo (n)；
4) Taking signal S 4 The real part of (n), the final calibrated signal csig.
In the step a.1, the number of sampling points contained in the sampling signal copy should be at least more than or equal to 4096, and the number of the sampling points should be a power exponent of 2.
In said step a.2 and step c.2, the characteristics of the low-pass filter should ensure that: any signal below the 1/4 sample rate is passed and any signal above the 1/4 sample rate is blocked.
In said step b.1, conjugate autocorrelation expectation
Die expectation
Wherein S 1 (n) is a complex signal including I/Q signals, S 1 (N) ═ df2i (N) + i · df2q (N), N is S 1 (n) number of points of signal samples.
In said step b.2, calibrating the coefficients
In the step b.3, according to the calibration coefficient a, the S is compared 1 (n) calibrating to obtain S 2 (n)，S 2 (n)＝S 1 (n)+a·S 1 * (n) complex signal S 2 The real part of (n) is the signal cdf2i (n), and the imaginary part is the signal cdf2q (n).
Compared with the prior art, the invention has the beneficial effects that:
1. the invention discloses an adaptive blind calibration method. In the calibration process, known input signals are not needed, and the input signals have no restrictive requirements, so that the application range of calibration is widened.
2. The invention relates to a completely background calibration method. The calibration process does not affect the normal operation of the TIADC system.
3. The invention is a completely digital calibration method, the calibration is realized by completely depending on digital signal operation without any analog device, and the stability and the reliability of the calibration are improved.
4. The calibration method adopted by the invention is simple to deploy, and can be realized in FPGA, DSP, CPU, GPU and other processors.
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FIG. 1 is a general flow diagram of a background adaptive self-calibration method for interleaved sampling according to the present invention;
FIG. 2 is a schematic flow chart of the step a 1/4 sampling rate mixing downsampling according to the present invention;
FIG. 3 is a flow chart illustrating the step b I/Q mirror calibration of the present invention;
FIG. 4 is a flow chart illustrating the step c 1/4 of sampling rate mixing up-sampling according to the present invention;
FIG. 5 is a schematic diagram of a dual channel TIADC system in which the method of the present invention may be implemented;
FIG. 6 is an implementation of the signal distribution circuit of FIG. 5;
FIG. 7 is a graph of the sampling effect of the dual channel TIADC system of FIG. 5;
FIG. 8 is a graph of the output power of a TIADC system signal without calibration using the method of the present invention;
FIG. 9 is a graph of the output power of a TIADC system signal after calibration using the method of the present invention.
Detailed Description
The invention is further described with reference to the following examples, which are intended to illustrate the invention and not to limit the scope of the invention, which is intended to be within the scope of the claims appended hereto.
As shown in fig. 1, the background adaptive self-calibration method for interleaved sampling provided by the present invention can be generally divided into three steps: 1/4 sampling rate mixing downsampling; b.I/Q mirror calibration; and c.1/4 sampling rate mixing up-sampling.
Each of the above steps is described in detail below:
step a.1/4 sampling rate mixing downsampling
As shown in fig. 2, the 1/4 sampling rate mixing downsampling can be further decomposed into three steps of digital I/Q mixing, digital low-pass filtering and double decimation.
The digital I/Q mixing method is to duplicate the sampled signal of the two-channel TIADC system into A, B two copies. The number of sampling points contained in the copy of the sampled signal should be at least > 4096 and the number of points should be a power exponent of 2. Let N be the number of sampling points of the sampled signal replica. Multiplying the signal copy A by a digital sequence [1,0, -1,0,1,0, -1,0. ] with the same quantity to obtain a path I signal di; the signal copy B is multiplied by an equal number of digital sequences [0, -1,0,1,0, -1,0,1. ] to obtain a Q-path signal dq.
The digital low-pass filtering method is to perform convolution operation on the I path signal di and the Q path signal dq respectively with a group of low-pass filter coefficients, so as to obtain a filtered I path signal dfi and a filtered Q path signal dfq. The characteristics of the low-pass filter should ensure that: any signal below the 1/4 sample rate is passed and any signal above the 1/4 sample rate is blocked. Low-pass filter coefficient calculation methods of this nature are well known in the art and can be quickly calculated using MATLAB tools.
The double decimation is performed by keeping even dots and removing odd dots in the digital sequence of the I-path signal dfi and the Q-path signal dfq (or keeping odd dots and removing even dots). Thus, the I-path signal df2I and the Q-path signal df2Q are obtained. The points for df2i and df2q are N/2.
Step b.I/Q mirror calibration
As shown in fig. 3, the I/Q mirror calibration can be further decomposed into four steps: calculating a conjugate autocorrelation expectation, calculating a modulus expectation, calculating a calibration coefficient a and calibrating. The I path signal df2I and the Q path signal df2Q are copied into three copies, and the copy 1 and the copy 2 perform calculation of the conjugate autocorrelation expectation and the modulus expectation to obtain the conjugate autocorrelation expectation rx and the modulus expectation cx. A calibration coefficient a is then calculated from the conjugate autocorrelation expectation rx and the modulo expectation cx. All signal points of signals df2i and df2q need to be used in calculating the conjugate autocorrelation expectation and the modulo expectation. Therefore, the calibration coefficient a can be calculated only after the computation of the conjugate autocorrelation expected rx and the modulo expected cx is completed. After the calibration coefficient a is calculated, the signals df2I and df2Q of the replica 3 are calibrated by using the calibration coefficient a, and the mismatch mirror images are removed to obtain calibrated I/Q signals cdf2I and cdf 2Q.
The following describes specific calculation methods for implementing the above four steps.
Recording signal S 1 (n)＝df2i(n)+i·df2q(n)，S 1 And (n) is a complex signal including the I/Q signal. The following discussion will refer to the complex signal S 1 (n)。
1) Computing a conjugate autocorrelation expectation rx
N is S 1 (n) number of points of signal samples.
2) Calculating the modulo expectation cx
3) Calculating a calibration coefficient a
4) According to the calibration coefficient a, for S 1 (n) calibrating to obtain S 2 (n)
S 2 (n)＝S 1 (n)+a·S 1 * (n)
Complex signal S 2 The real part of (n) is the signal cdf2i (n), and the imaginary part is the signal cdf2q (n).
Step c.1/4 sampling Rate mixing Up-sampling
As shown in fig. 4, the 1/4 sampling rate mixing up-sampling can be further decomposed into three steps of double interpolation, digital low-pass filtering and digital I/Q up-mixing.
The method of double interpolation is to insert a value of 0 between the signals cdf2i (n) and cdf2i (n + 1); a value of 0 is inserted between cdf2q (n) and cdf2q (n + 1). The new signal sequence cf2i is thus obtained as: cdf2i (1),0, cdf2i (2),0, cdf2i (3),0, … …; the new signal sequence cf2q is: cdf2q (1),0, cdf2q (2),0, cdf2q (3),0, … ….
The method of the digital low-pass filtering is as follows: and performing convolution operation on the I path signal cf2I and the Q path signal cf2Q and a group of low-pass filter coefficients respectively to obtain a filtered I path signal f2I and a filtered Q path signal f 2Q. The characteristics of the low-pass filter should ensure that: any signal below the 1/4 sample rate is passed and any signal above the 1/4 sample rate is blocked. Low-pass filter coefficient calculation methods of this nature are well known in the art and can be quickly calculated using MATLAB tools.
The method of digital I/Q upmixing is as follows:
1) let signal S 3 (n)＝f2i(n)+i·f2q(n)
2) Construction signal S lo (n)＝[1,0,-1,0,...]+i·[0,1,0,-1,...]
3) Will S 3 (n) and S lo (n) complex multiplying to obtain a signal S 4 (n)＝S 3 (n)·S lo (n)
4) Taking signal S 4 The real part of (n), the final calibrated signal csig.
The background self-adaptive self-calibration method for interleaved sampling provided by the invention needs to operate in a dual-channel interleaved sampling system, and a specific example of the dual-channel TIADC system capable of implementing the method is shown in FIG. 5.
As shown in fig. 5, the input analog signal is converted into two paths, i.e., an analog signal a and an analog signal B, by the signal distribution circuit, and the analog signal a and the analog signal B are sampled by two ADC chips, i.e., ADC-a and ADC-B, respectively, to obtain a sampled digital signal a and a sampled digital signal B. The sampled digital signal A and the sampled digital signal B enter a processor, and the interleaving processing is carried out by adopting the background self-adaptive self-calibration method for interleaving sampling, so that the digital signal after the interleaving processing is obtained. In addition, the dual channel TIADC system also has a clock source circuit. The clock source circuit is capable of generating a sampling clock a, a sampling clock B and a system clock. The phase difference between the sampling clock A and the sampling clock B is 90 degrees, and the sampling clock A and the sampling clock B are respectively input into the ADC-A and the ADC-B and used as sampling clocks of the two ADC chips. The system clock is input to the processor as a processing clock of the processor.
One possible circuit implementation of the dual channel TIADC system shown in fig. 5 is given below:
a. the signal distribution circuit can be implemented by using the circuit shown in fig. 6, where possible types of balun chip are: TCM1-83X + from Mini corporation;
possible models of ADC-A and ADC-B are: ADC083000 by TI company;
c. possible models of processors are: xilinx corporation's XC7VX 690T;
d. possible types of clock sources are: HMC7044 from ADI.
The sampling effect of the two-channel TIADC system shown in fig. 5 is shown in fig. 7. The sampling sequence points of ADC-A are as follows: a [ n-1], A [ n +1] … …; the sampling sequence points of ADC-B are: bn-1, Bn +1 … …. Since the phase difference between the sampling clocks A and B is 90 deg., then the following sequences are obtained after A [ n-1], A [ n +1] … … and B [ n-1], B [ n +1] … … are alternately arranged: a [ n-1], B [ n-1], A [ n ], B [ n ], A [ n +1], B [ n +1] … ….
Obviously, if the phase difference between the sampling clocks a and B can be kept strictly 90 °, the sequence after alternating sampling thereof is equivalent to the result of sampling at twice the sampling frequency. However, the phase difference between the sampling clocks a and B cannot be maintained at exactly 90 ° due to external factors such as environment and process. Therefore, the alternate sampling may have errors. By deploying the method in the processor, the adaptive calibration of the dual-channel TIADC system can be realized.
The effect of the present invention is illustrated below with a set of comparative data.
Take a two-channel TIADC with a sampling rate of 6GSPS as an example. The input signal is a 240MHz sine wave signal.
Without calibration using the present invention, the output power spectrum of the TIADC system signal is shown in fig. 8. Due to the mismatch between the channels, the signal to noise ratio (SNR) is only 28.6dBc and the effective number of bits (ENOB) is only 4.46 bits. At the same time, the difference between the main signal and the mismatch signal, i.e. the SFDR, is only 28.63 dBc.
The power spectrum of the TIADC output signal after calibration using the method of the present invention is shown in fig. 9. The signal to noise ratio (SNR) was 56.3dBc and the number of significant bits (ENOB) was 9.06 bits. Meanwhile, the difference between the main signal and the mismatch signal, i.e., the SFDR, is 70.12 dBc. Therefore, the method of the invention improves SNR by 27.7dBc, improves ENOB by 4.6 bits and improves SFDR by 41.49 dB.
Compared with other TIADC system calibration methods, the most important gain points of the invention are as follows:
1. the invention relates to an adaptive blind calibration method. There is no need for a known input signal in the calibration process and there are no limiting requirements on the input signal. This improves the applicability of the calibration.
2. The invention relates to a completely background calibration method. The calibration process does not affect the normal operation of the TIADC system.
3. The invention is a completely digitalized calibration method, and the calibration is realized by completely depending on digital signal operation without any analog device, thereby improving the stability and reliability of the calibration.
4. The calibration method adopted by the invention is simple to deploy, can be realized in FPGA, and can also be realized in processors such as DSP, CPU, GPU and the like.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the present invention, and all simple modifications, changes and equivalent structural changes made to the above embodiment according to the technical spirit of the present invention still fall within the protection scope of the technical solution of the present invention.
Claims (6)
1. A background self-adaptive self-calibration method for interleaved sampling is characterized by comprising the following steps:
step a: 1/4 sampling rate mixer downsampling
The method comprises three steps of digital I/Q frequency mixing, digital low-pass filtering and double decimation;
step a.1: digital I/Q mixing
Copying a sampling signal of the dual-channel TIADC system into A, B two signal copies, multiplying the signal copy A by a digital sequence [1,0, -1,0,1,0, -1,0. ] with the same number to obtain a path I signal di; multiplying the signal copy B by an equal number of digital sequences [0, -1,0,1,0, -1,0,1. ] to obtain a Q-path signal dq;
step a.2: digital low pass filtering
Performing convolution operation on the I path signal di and the Q path signal dq with a group of low-pass filter coefficients respectively to obtain a filtered I path signal dfi and a filtered Q path signal dfq;
step a.3: double extraction
Reserving even points in the digital sequence of the path I signal dfi and the path Q signal dfq, and removing odd points, or reserving odd points and removing even points to obtain a path I signal df2I and a path Q signal df 2Q;
step b: I/Q mirror calibration
The method comprises three steps of calculating a conjugate autocorrelation expectation and a modulus expectation, calculating a calibration coefficient a and calibrating;
step b.1: computing conjugate autocorrelation expectation and modulo expectation
The I path signal df2I and the Q path signal df2Q are copied into three copies, and the copy 1 and the copy 2 perform calculation of the conjugate autocorrelation expectation and the modulus expectation to obtain a conjugate autocorrelation expectation rx and a modulus expectation cx;
step b.2: calculating a calibration coefficient a
Calculating a calibration coefficient a according to the conjugate autocorrelation expected rx and the modulus expected cx;
step b.3: calibration
Calibrating the signals df2I and df2Q of the replica 3 by using the calibration coefficient a, and removing mismatched images to obtain calibrated I/Q signals cdf2I and cdf 2Q;
step c: 1/4 sample rate mixing upsampling
The method comprises three steps of double interpolation, digital low-pass filtering and digital I/Q up-mixing;
step c.1: double interpolation
A value 0 is inserted between the calibrated I-path signals cdf2I (n) and cdf2I (n +1), and a new I-path signal sequence cf2I is obtained as follows: cdf2i (1),0, cdf2i (2),0, cdf2i (3),0, … …; a value 0 is inserted between the calibrated Q-path signals cdf2Q (n) and cdf2Q (n +1), and a new Q-path signal sequence cf2Q is obtained as follows: cdf2q (1),0, cdf2q (2),0, cdf2q (3),0, … …;
step c.2: digital low pass filtering
Performing convolution operation on the I path signal cf2I and the Q path signal cf2Q and a group of low-pass filter coefficients respectively to obtain a filtered I path signal f2I and a filtered Q path signal f 2Q;
step c.3: digital I/Q upmix
1) Order signal S 3 (n)＝f2i(n)+i·f2q(n)；
2) Construction signal S lo (n)＝[1,0,-1,0,...]+i·[0,1,0,-1,...]；
3) Will S 3 (n) and S lo (n) complex multiplying to obtain a signal S 4 (n)＝S 3 (n)·S lo (n)；
4) Taking signal S 4 The real part of (n), the final calibrated signal csig.
2. The method of claim 1 for background adaptive self-calibration of interleaved sampling, wherein: in the step a.1, the number of sampling points contained in the sampling signal copy should be at least more than or equal to 4096, and the number of the sampling points should be a power exponent of 2.
3. The method of claim 1 for background adaptive self-calibration of interleaved sampling, wherein: in said step a.2 and step c.2, the characteristics of the low-pass filter should ensure that: any signal below the 1/4 sample rate is passed and any signal above the 1/4 sample rate is blocked.
4. The method of claim 1 for background adaptive self-calibration of interleaved sampling, wherein: in said step b.1, conjugate autocorrelation expectation
Die expectation
Wherein S 1 (n) is a complex signal including I/Q signals, S 1 (N) ═ df2i (N) + i · df2q (N), N is S 1 (n) number of points of signal samples.
5. The method of claim 4, wherein the method comprises: in said step b.2, calibrating the coefficients
6. The method of claim 4, wherein the method comprises: in the step b.3, according to the calibration coefficient a, the S is compared 1 (n) calibrating to obtain S 2 (n)，S 2 (n)＝S 1 (n)+a·S 1 * (n) complex signal S 2 The real part of (n) is the signal cdf2i (n), and the imaginary part is the signal cdf2q (n).
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