CN113707761A - N-type selective emitter solar cell and preparation method thereof - Google Patents
N-type selective emitter solar cell and preparation method thereof Download PDFInfo
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- 238000009792 diffusion process Methods 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 32
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims abstract description 20
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1876—Particular processes or apparatus for batch treatment of the devices
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
Provided are an N-type selective emitter solar cell and a method for fabricating the same, the method comprising: providing an N-type silicon wafer substrate, and forming a suede structure on the surface of the N-type silicon wafer substrate; carrying out boron diffusion treatment on the front surface of the N-type silicon wafer substrate to form a boron diffusion layer; sequentially forming a laminated tunneling oxide layer and a polysilicon layer on the back surface of an N-type silicon wafer substrate, performing phosphorus diffusion treatment on the polysilicon layer to form an N + doping layer, and forming a silicon nitride layer on the N + doping layer; corroding the boron diffusion layer in the non-electrode area on the front surface of the N-type silicon wafer substrate to form a P + +/P + selective emitter structure; sequentially forming a stacked passivation layer and an antireflection layer on the front surface of the N-type silicon wafer substrate; and respectively forming a front electrode and a back electrode on the front surface and the back surface of the N-type silicon wafer substrate. The preparation method of the N-type selective emitter solar cell provided by the invention has the advantages of simple preparation process and low cost, and can effectively improve the efficiency and performance of the solar cell.
Description
Technical Field
The invention belongs to the technical field of solar cells, and particularly relates to an N-type selective emitter solar cell and a preparation method thereof.
Background
With the rapid development of photovoltaic crystalline silicon solar cell technology, N-type crystalline silicon is receiving the attention of more and more solar cell manufacturers and research institutions due to the advantages of almost no light-induced attenuation, insensitivity to common metal ions, long minority carrier lifetime, low component temperature coefficient, good weak light response, high reliability and the like, wherein a Tunnel Oxide Passivated Contact (TOPCon) solar cell (generally referred to as a TOPCon cell) is a solar cell using an ultrathin Oxide layer as a passivation layer structure, and is easier to upgrade on the basis of Passivated Emitter and back cell (generally referred to as a P-perc (Passivated Emitter and reactor) cell device, and becomes a research hotspot of many companies.
The key of the prior TOPCon battery is to improve the passivation effect of the back side and improve the recombination, while the boron-doped contact structure of the front side still has the state of high recombination rate. The existing boron doping technology capable of realizing mass production and stable production mainly comprises tubular boron tribromide (BBr) which has low process difficulty, high cost performance, metal pollution avoidance and long minority carrier lifetime3) Diffusion furnace mode, however BBr3The diffusion of liquid source is adopted, the surface concentration is low, the uniformity is poor, the ohmic contact is large, and the improvement of the battery efficiency is not facilitated. High concentration ofAlthough the doping can reduce the sheet resistance to form a good ohmic contact and properly improve the filling factor of the cell, the overall surface auger recombination is high, so that the open-circuit voltage Voc and the short-circuit current Isc are both reduced, and the conversion efficiency of the cell is not favorably improved. Therefore, development of a selective electrode is essential to improve the short-wave response of the non-electrode region, reduce the recombination rate, and form a good ohmic contact in the electrode region, thereby improving the fill factor.
Regarding the development of the selective emitter of the N-type selective emitter solar cell, a boron slurry doping mode is provided by a Liou method of the solar energy, the boron slurry is printed on a silicon wafer after wool making in a screen printing mode, then gases such as a boron source and the like are introduced into a tubular diffusion furnace for diffusion, a boron slurry area with different boron doping concentrations and a non-boron slurry area are formed, and a P + +/P + structure is formed, but the defect is that the boron slurry is expensive, so that the industrial production cannot be realized at all. In the prior art, a laser doping mode is also provided, and laser is directly adopted for doping on a boron-silicon glass (BSG) layer after boron diffusion is performed on a silicon wafer, but due to the limitation of the existing laser doping technology, the difference between a doping region and a non-laser doping region is small, so that the improvement of the cell efficiency is not obvious.
Disclosure of Invention
In order to solve the problems in the prior art, the invention provides an N-type selective emitter solar cell and a preparation method thereof.
According to an aspect of the embodiments of the present invention, a method for manufacturing an N-type selective emitter solar cell is provided, which includes: providing an N-type silicon wafer substrate, and forming a textured structure on the surface of the N-type silicon wafer substrate;
carrying out boron diffusion treatment on the front surface of the N-type silicon wafer substrate to form a boron diffusion layer;
sequentially forming a tunneling oxide layer and a polysilicon layer which are stacked on the back surface of the N-type silicon wafer substrate, performing phosphorus diffusion treatment on the polysilicon layer to form an N + doping layer, and forming a silicon nitride layer on the N + doping layer;
corroding the boron diffusion layer in the non-electrode area on the front surface of the N-type silicon wafer substrate to form a P + + doped area in the electrode area on the front surface of the N-type silicon wafer substrate and a P + doped area in the non-electrode area, so that a P + +/P + selective emitter structure is formed on the front surface of the N-type silicon wafer substrate;
sequentially forming a stacked passivation layer and an antireflection layer on the front surface of the N-type silicon wafer substrate;
and respectively forming a front electrode and a back electrode on the front surface and the back surface of the N-type silicon wafer substrate to obtain the N-type selective emitter solar cell.
In the above method for manufacturing an N-type selective emitter solar cell, the etching the boron diffusion layer in the non-electrode region on the front side of the N-type silicon wafer substrate to form a P + + doped region in the electrode region on the front side of the N-type silicon wafer substrate and a P + doped region in the non-electrode region specifically includes:
forming a positive electrode pattern mask in the electrode area on the front side of the N-type silicon wafer substrate in a wax spraying mode;
removing a natural oxidation layer of the N-type silicon wafer substrate by using a first solution;
corroding the boron diffusion layer in the non-electrode area on the front side of the N-type silicon wafer substrate by using a first mixed solution to form a P + + doped area in the electrode area on the front side of the N-type silicon wafer substrate and a P + doped area in the non-electrode area;
removing the positive electrode pattern mask by using a second solution;
and cleaning the N-type silicon wafer substrate by using a second mixed solution.
In the method for manufacturing an N-type selective emitter solar cell according to the above aspect, the first solution is a hydrogen fluoride solution; the first mixed solution is a mixed solution of hydrogen fluoride and nitric acid; the second solution is a potassium hydroxide solution; the second mixed solution is a mixed solution of hydrogen fluoride and hydrogen chloride.
In the method for manufacturing an N-type selective emitter solar cell according to the above aspect, the sheet resistance of the P + + doped region is in a range of 65 Ω, sq to 80 Ω, sq, and the sheet resistance of the P + doped region is in a range of 160 Ω, sq to 180 Ω, sq.
In the above aspect, in the method for manufacturing an N-type selective emitter solar cell, the tunneling oxide layer is a silicon dioxide layer, and the thickness of the tunneling oxide layer is 1nm to 2 nm; the thickness range of the polycrystalline silicon layer is 100 nm-120 nm.
In the above method for manufacturing an N-type selective emitter solar cell, after performing boron diffusion treatment on the front surface of the N-type silicon wafer substrate to form a boron diffusion layer, and before sequentially forming a tunneling oxide layer and a polysilicon layer on the back surface of the N-type silicon wafer substrate, the method further includes: and etching to remove the edge and the back boron junction wraparound of the N-type silicon wafer substrate.
In the above method for manufacturing an N-type selective emitter solar cell, after forming a silicon nitride protection layer on the N + doped layer and before removing the boron diffusion layer in the non-electrode region on the front surface of the N-type silicon wafer substrate, the method further includes: and removing the silicon nitride winding plating and the polysilicon winding plating on the front surface of the N-type silicon wafer substrate.
In the above aspect, in the method for manufacturing an N-type selective emitter solar cell, the passivation layer is an aluminum oxide layer, the passivation layer has a thickness of 1nm to 2nm, the antireflection layer is a silicon nitride layer, and the antireflection layer has a thickness of 75nm to 80 nm.
In the above method for manufacturing an N-type selective emitter solar cell, the forming a front electrode and a back electrode on the front surface and the back surface of the N-type silicon wafer substrate respectively to obtain the N-type selective emitter solar cell specifically includes: screen-printing front electrode slurry and back electrode slurry, and sintering at high temperature to form a front electrode in ohmic contact with the P + + doping region and a back electrode in ohmic contact with the N + doping layer; the front electrode slurry is silver-aluminum slurry, the back electrode slurry is silver slurry, and the sintering temperature is 750-800 ℃.
According to another aspect of the embodiments of the present invention, there is provided an N-type selective emitter solar cell, which is formed by the above-mentioned preparation method.
Has the advantages that: according to the N-type selective emitter solar cell and the preparation method thereof, high-concentration boron doping of an electrode area and low-concentration boron doping of a non-electrode area are realized by adopting a spraying mask protection and chemical corrosion method on an N-type silicon wafer substrate after boron diffusion treatment and passivation treatment are completed on a front surface and polycrystalline silicon and silicon nitride are removed by means of wire-wound plating, so that a P + +/P + selective emitter structure is formed, the defect density of the emitter is favorably reduced, the recombination rate is favorably reduced, the blue light effect of a short wave area is increased, good ohmic contact is realized, and the photoelectric conversion efficiency of the N-type selective emitter solar cell is favorably improved. In addition, the preparation method of the N-type selective emitter solar cell provided by the invention has the advantages of simple preparation process and low cost, can effectively improve the efficiency and performance of the solar cell, and is suitable for mass production and stable production of the cell.
Drawings
The above and other aspects, features and advantages of embodiments of the present invention will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:
fig. 1 is a flow chart of a method of fabricating an N-type selective emitter solar cell according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a process for fabricating an N-type selective emitter solar cell according to an embodiment of the invention;
fig. 3 is a structural diagram of an N-type selective emitter solar cell according to an embodiment of the present invention.
In the attached drawing, a 10-N type silicon chip substrate, a 20-boron diffusion layer, a 30-tunneling oxide layer, a 40-polycrystalline silicon layer, a 50-silicon nitride layer, a 60-polycrystalline silicon winding plating, a 70-silicon nitride winding plating, an 80-P + + doped region, a 90-P + doped region, a 100-passivation layer, a 120-antireflection layer, a 120-front electrode and a 130-back electrode.
Detailed Description
Hereinafter, specific embodiments of the present invention will be described in detail with reference to the accompanying drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. Rather, these embodiments are provided to explain the principles of the invention and its practical application to thereby enable others skilled in the art to understand the invention for various embodiments and with various modifications as are suited to the particular use contemplated.
As used herein, the term "include" and its variants mean open-ended terms in the sense of "including, but not limited to. The terms "based on," based on, "and the like mean" based at least in part on, "" based at least in part on. The terms "one embodiment" and "an embodiment" mean "at least one embodiment". The term "another embodiment" means "at least one other embodiment". The terms "first," "second," and the like may refer to different or the same object. Other definitions, whether explicit or implicit, may be included below. The definition of a term is consistent throughout the specification unless the context clearly dictates otherwise.
In order to solve the technical problems related to the development of the selective emitter of the N-type selective emitter solar cell in the prior art as described in the background, an N-type selective emitter solar cell and a method for manufacturing the same are provided according to an embodiment of the present invention.
According to the preparation method, the positive electrode pattern mask is sprayed on the front side of the silicon wafer substrate and is chemically corroded after boron diffusion treatment is carried out on the N-type silicon wafer substrate, so that high-concentration boron doping in an electrode area and low-concentration boron doping in a non-electrode area are achieved, the structural effect of the back side is not influenced while selective emitter doping is achieved on the front side of the cell, the preparation process is simple, the cost is low, the efficiency and the performance of the solar cell can be effectively improved, and the mass production stability of the cell is facilitated.
An N-type selective emitter solar cell and a method for fabricating the same according to an embodiment of the present invention will be described in detail below with reference to the accompanying drawings. Fig. 1 is a flowchart of a method for fabricating an N-type selective emitter solar cell according to an embodiment of the present invention, and fig. 2 is a process diagram of a method for fabricating an N-type selective emitter solar cell according to an embodiment of the present invention.
Referring to fig. 1 and 2, in step S110, an N-type silicon wafer substrate 10 is provided, and a textured structure is formed on a surface of the N-type silicon wafer substrate 10. Wherein, a pyramid suede is formed on the surface of the N-type silicon wafer substrate 10 through a texturing process.
The textured structure is formed on the surface of the N-type silicon wafer substrate 10, so that the reflectivity of incident light can be reduced, and the photon utilization rate can be improved.
In step S120, the front surface of the N-type silicon wafer substrate 10 is subjected to boron diffusion treatment to form a boron diffusion layer 20. Wherein, the boron diffusion layer 20 with the square resistance range of 65 omega, sq-80 omega, sq is formed by performing boron diffusion once through the front surface of the N-type silicon wafer substrate 10.
In one example, the boron source of the boron diffusion process is BBr3。
In one example, after the front surface of the N-type silicon wafer substrate 10 is subjected to boron diffusion treatment to form a boron diffusion layer 20, the edge and the back surface of the N-type silicon wafer substrate 10 are removed by etching. The thickness of the BSG layer reserved on the front surface of the N-type silicon wafer substrate 10 is 30-70 nm, and the BSG layer can effectively protect the front surface of the N-type silicon wafer substrate 10 from being corroded in the subsequent polycrystalline silicon removal coil plating 60 treatment.
In step S130, a tunnel oxide layer 30 and a polysilicon layer 40 are sequentially formed on the back surface of the N-type silicon substrate 10, a phosphorus diffusion process is performed on the polysilicon layer 40 to form an N + doped layer, and a silicon nitride layer 50 is formed on the N + doped layer.
In one example, the sheet resistance of the N + doped layer ranges from 30 Ω, sq to 40 Ω, sq.
In one example, the tunneling oxide layer 30 is a silicon dioxide layer, and the tunneling oxide layer 30 has a thickness ranging from 1nm to 2 nm; the thickness of the polysilicon layer 40 ranges from 100nm to 120 nm.
In one example, the thickness of the silicon nitride layer 50 is 95nm to 120nm, and the silicon nitride layer 50 can effectively protect the back surface of the N-type silicon wafer substrate 10 from being damaged in the subsequent processes of removing the polysilicon by-pass plating 60 and forming the P + +/P + selective emitter structure.
In step S140, removing the silicon nitride electroplating 70 and the polysilicon electroplating 60 on the front surface of the N-type silicon wafer substrate 10 specifically includes:
cleaning the N-type silicon wafer substrate 10 for 150s by using a hydrogen fluoride solution with the concentration of 2% to remove the silicon nitride spin-plating 70 on the front surface of the N-type silicon wafer substrate 10;
cleaning the N-type silicon wafer substrate 10 for 200s by using a potassium hydroxide solution or a sodium hydroxide solution with the concentration of 0.5% to remove the polycrystalline silicon plating layer 60 on the front surface of the N-type silicon wafer substrate 10;
and cleaning and drying the N-type silicon wafer substrate 10 by using deionized water to remove metal ions and acid-base liquid remained on the surface of the substrate.
And removing the edge wraparound plating before spraying the mask on the electrode area on the front surface of the N-type silicon wafer substrate 10, which is favorable for realizing the uniform preparation of the selective emitter from the center to the edge of the front surface of the N-type silicon wafer substrate 10.
In step S150, removing the boron diffusion layer 20 in the non-electrode region on the front surface of the N-type silicon wafer substrate 10 to form a P + + doped region 80 in the electrode region on the front surface of the N-type silicon wafer substrate 10 and a P + doped region 90 in the non-electrode region, so as to form a P + +/P + selective emitter structure on the front surface of the N-type silicon wafer substrate 10, which specifically includes:
firstly, forming a positive electrode pattern mask in an electrode area on the front surface of the N-type silicon wafer substrate 10 by using a wax spraying mode.
In one example, the size of the positive electrode pattern mask needs to be determined according to the requirements of the grid lines of the battery.
And secondly, removing the natural oxide layer of the N-type silicon wafer substrate 10 by using the first solution.
In one example, the first solution is a hydrogen fluoride solution.
And thirdly, corroding the boron diffusion layer 20 in the non-electrode area on the front surface of the N-type silicon wafer substrate 10 by using the first mixed solution to form a P + + doped area 80 in the electrode area on the front surface of the N-type silicon wafer substrate 10 and a P + doped area 90 in the non-electrode area.
In one example, the sheet resistance of the P + + doped region 80 ranges from 65 Ω · sq to 80 Ω · sq, and the sheet resistance of the P + doped region 90 ranges from 160 Ω · sq to 180 Ω · sq.
In one example, the first mixed solution is a mixed solution of hydrogen fluoride and nitric acid.
And fourthly, removing the positive electrode pattern mask by using a second solution.
In one example, the second solution is a potassium hydroxide solution.
And fifthly, cleaning the N-type silicon wafer substrate 10 by using a second mixed solution.
In one example, the second mixed solution is a mixed solution of Hydrogen Fluoride (HF) and hydrogen chloride (HCl), wherein the volume ratio of each substance in the mixed solution of hydrogen fluoride and hydrogen chloride is HF: HCl: deionized water 1: 2: 54.
the hydrochloric acid solution is used for removing metal ions remained on the surface of the substrate by the potassium hydroxide solution, and the hydrochloric acid solution is used for completely removing the BSG layer on the front surface of the substrate, so that the passivation layer 100 and the anti-reflection layer 110 are formed on the front surface of the substrate in the following process.
In one example, a P + +/P + selective emitter structure is formed on the front surface of the N-type silicon wafer substrate 10, and the thickness of the silicon nitride layer 50 on the back surface of the N-type silicon wafer substrate 10 is required to be greater than or equal to 70 nm.
By spraying a positive electrode pattern mask in the electrode area on the front surface of the N-type silicon wafer substrate 10, the electrode area can be effectively protected from corrosion to form a high-concentration boron-doped P + + doped area 80, and the high-concentration boron doping in the electrode area is beneficial to reducing the square resistance to form good ohmic contact and improving the filling factor of the cell; the non-electrode area is corroded by the mixed solution of hydrogen fluoride and hydrogen chloride due to the fact that no spraying mask is arranged, so that a low-concentration boron-doped P + doped area 90 is formed, low-concentration boron doping of the non-electrode area is beneficial to improving blue light response of a short wave area, reducing defect density of an emitting electrode and reducing recombination rate, and further photoelectric conversion efficiency of the solar cell is improved.
In step S160, a passivation layer 100 and an anti-reflection layer 110 are sequentially formed on the front surface of the N-type silicon wafer substrate 10.
In one example, the passivation layer 90 is an aluminum oxide layer, the passivation layer 100 has a thickness of 1nm to 2nm, the anti-reflection layer 110 is a silicon nitride layer, and the anti-reflection layer 110 has a thickness of 75nm to 80 nm.
In step S170, a front electrode 120 and a back electrode 130 are respectively formed on the front surface and the back surface of the N-type silicon wafer substrate 10 to obtain the N-type selective emitter solar cell, which specifically includes: and screen-printing front electrode 120 slurry and back electrode 130 slurry, and sintering at a high temperature to form the front electrode 120 in ohmic contact with the P + + doped region 80 and the back electrode 130 in ohmic contact with the N + doped layer to obtain the N-type selective emitter solar cell.
In one example, the front electrode 120 paste is silver-aluminum paste, the back electrode 130 paste is silver paste, and the sintering temperature is 750 ℃ to 800 ℃.
Fig. 3 is a structural diagram of an N-type selective emitter solar cell according to an embodiment of the present invention. The N-type selective emitter solar cell shown in fig. 3 is an N-type selective emitter solar cell prepared by the above-described preparation method (i.e., the preparation methods shown in fig. 1 and 2). Referring to fig. 3, the N-type selective emitter solar cell sequentially includes: a front electrode 120, an anti-reflection layer 110, a passivation layer 100, a P + doped region 90, a P + + doped region 80, an N-type silicon substrate 10, a tunnel oxide layer 30, a polysilicon layer 40, a silicon nitride layer 50, and a back electrode 130.
The front electrode 120 respectively penetrates through the anti-reflection layer 110 and the passivation layer 100, and forms ohmic contact with the P + + doped region 80; the back electrode 130 passes through the silicon nitride layer 50 to form an ohmic contact with the polysilicon layer 40(N + doped layer).
In summary, according to the N-type selective emitter solar cell and the manufacturing method thereof in the embodiments of the invention, after the N-type silicon wafer substrate having the front surface subjected to the boron diffusion treatment and the back surface formed with the polysilicon layer and the silicon nitride protective layer is subjected to the alkali treatment to remove the boron diffusion layer in the non-electrode region on the front surface of the substrate by the spray mask protection and the chemical corrosion method, the high-concentration boron doping in the electrode region and the low-concentration boron doping in the non-electrode region are realized to form the P + +/P + selective emitter structure, so that the front surface of the cell with the structure can be ensured to realize the selective emitter doping without affecting the back surface structural effect. The doping concentration of boron in a non-electrode contact area is low, so that the defect density of an emitting electrode is reduced, the recombination rate is reduced, and the blue light effect of a short wave zone is increased; the doping concentration of boron in the electrode area is high, so that good ohmic contact is realized, the filling factor of the cell is improved, and the photoelectric conversion efficiency of the solar cell is improved. And the preparation of the P + +/P + selective emitter structure is completed after the polysilicon layer is formed, so that the influence on the square resistance of the P + +/P + selective emitter structure when the polysilicon is removed by subsequent cleaning and plating 60 is avoided.
In addition, the preparation method of the N-type selective emitter solar cell provided by the invention does not need high raw material cost, has a simple preparation process, and is easy to control boron doping concentration, namely sheet resistance difference, between the P + + doping area and the P + doping area 20, so that the P + + doping area and the P + doping area with large sheet resistance difference are obtained, and the efficiency of the solar cell is further improved. Therefore, the preparation method of the N-type selective emitter solar cell provided by the invention has the advantages of simple preparation process and low cost, can effectively improve the efficiency and performance of the solar cell, and is suitable for mass production and stable production of the cell.
The foregoing description has described certain embodiments of this invention. Other embodiments are within the scope of the following claims.
The terms "exemplary," "example," and the like, as used throughout this specification, mean "serving as an example, instance, or illustration," and do not mean "preferred" or "advantageous" over other embodiments. The detailed description includes specific details for the purpose of providing an understanding of the described technology. However, the techniques may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form in order to avoid obscuring the concepts of the described embodiments.
Alternative embodiments of the present invention are described in detail with reference to the drawings, however, the embodiments of the present invention are not limited to the specific details in the above embodiments, and within the technical idea of the embodiments of the present invention, many simple modifications may be made to the technical solution of the embodiments of the present invention, and these simple modifications all belong to the protection scope of the embodiments of the present invention.
The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the scope of the disclosure. Thus, the description is not intended to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (10)
1. A preparation method of an N-type selective emitter solar cell is characterized by comprising the following steps:
providing an N-type silicon wafer substrate, and forming a textured structure on the surface of the N-type silicon wafer substrate;
carrying out boron diffusion treatment on the front surface of the N-type silicon wafer substrate to form a boron diffusion layer;
sequentially forming a tunneling oxide layer and a polysilicon layer which are stacked on the back surface of the N-type silicon wafer substrate, performing phosphorus diffusion treatment on the polysilicon layer to form an N + doping layer, and forming a silicon nitride layer on the N + doping layer;
corroding the boron diffusion layer in the non-electrode area on the front surface of the N-type silicon wafer substrate to form a P + + doped area in the electrode area on the front surface of the N-type silicon wafer substrate and a P + doped area in the non-electrode area, so that a P + +/P + selective emitter structure is formed on the front surface of the N-type silicon wafer substrate;
sequentially forming a stacked passivation layer and an antireflection layer on the front surface of the N-type silicon wafer substrate;
and respectively forming a front electrode and a back electrode on the front surface and the back surface of the N-type silicon wafer substrate to obtain the N-type selective emitter solar cell.
2. The preparation method according to claim 1, wherein the etching the boron diffusion layer in the non-electrode region on the front surface of the N-type silicon wafer substrate to form a P + + doped region in the electrode region on the front surface of the N-type silicon wafer substrate and a P + doped region in the non-electrode region comprises:
forming a positive electrode pattern mask in the electrode area on the front side of the N-type silicon wafer substrate in a wax spraying mode;
removing a natural oxidation layer of the N-type silicon wafer substrate by using a first solution;
corroding the boron diffusion layer in the non-electrode area on the front side of the N-type silicon wafer substrate by using a first mixed solution to form a P + + doped area in the electrode area on the front side of the N-type silicon wafer substrate and a P + doped area in the non-electrode area;
removing the positive electrode pattern mask by using a second solution;
and cleaning the N-type silicon wafer substrate by using a second mixed solution.
3. The production method according to claim 2, wherein the first solution is a hydrogen fluoride solution; the first mixed solution is a mixed solution of hydrogen fluoride and nitric acid; the second solution is a potassium hydroxide solution; the second mixed solution is a mixed solution of hydrogen fluoride and hydrogen chloride.
4. The method of any one of claims 1 to 3, wherein the sheet resistance of the P + + doped region is in the range of 65 Ω. sq to 80 Ω. sq, and the sheet resistance of the P + doped region is in the range of 160 Ω. sq to 180 Ω. sq.
5. The method according to claim 1, wherein the tunneling oxide layer is a silicon dioxide layer, and the tunneling oxide layer has a thickness ranging from 1nm to 2 nm; the thickness range of the polycrystalline silicon layer is 100 nm-120 nm.
6. The manufacturing method according to claim 1, wherein after performing boron diffusion treatment on the front surface of the N-type silicon wafer substrate to form a boron diffusion layer and before sequentially forming a tunnel oxide layer and a polysilicon layer on the back surface of the N-type silicon wafer substrate, the manufacturing method further comprises: and etching to remove the edge and the back boron junction wraparound of the N-type silicon wafer substrate.
7. The method of claim 1, wherein after forming a silicon nitride protective layer on the N + doped layer and before etching the boron diffusion layer in the non-electrode region of the front side of the N-type silicon wafer substrate, the method further comprises: and removing the silicon nitride winding plating and the polysilicon winding plating on the front surface of the N-type silicon wafer substrate.
8. The method according to claim 1, wherein the passivation layer is an aluminum oxide layer, the passivation layer has a thickness of 1nm to 2nm, the anti-reflection layer is a silicon nitride layer, and the anti-reflection layer has a thickness of 75nm to 80 nm.
9. The preparation method according to claim 1, wherein a front electrode and a back electrode are respectively formed on the front surface and the back surface of the N-type silicon wafer substrate to obtain the N-type selective emitter solar cell, and specifically comprises the following steps: screen-printing front electrode slurry and back electrode slurry, and sintering at high temperature to form a front electrode in ohmic contact with the P + + doping region and a back electrode in ohmic contact with the N + doping layer; the front electrode slurry is silver-aluminum slurry, the back electrode slurry is silver slurry, and the sintering temperature is 750-800 ℃.
10. An N-type selective emitter solar cell prepared by the preparation method of any one of claims 1 to 9.
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