CN115172479A - Solar cell, preparation method thereof and photovoltaic module - Google Patents
Solar cell, preparation method thereof and photovoltaic module Download PDFInfo
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- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
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- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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Abstract
The application relates to a solar cell, a preparation method thereof and a photovoltaic module, wherein the preparation method comprises the following steps: providing a semiconductor substrate; performing texturing treatment on the semiconductor substrate; forming a pretreatment film layer on the front surface of the textured semiconductor substrate, wherein the pretreatment film layer contains doping elements; performing first heat treatment on the surface of the pretreatment film layer to form a heavily doped region in the semiconductor substrate corresponding to the metalized region and performing second heat treatment on the surface of the pretreatment film layer to form a lightly doped region in the semiconductor substrate corresponding to the non-metalized region, wherein the first heat treatment temperature is higher than the second heat treatment temperature; forming a tunneling layer and a doped conducting layer on the back of the semiconductor substrate; respectively forming a front antireflection layer and a back antireflection layer on the front surface and the back surface of the semiconductor substrate, wherein the front antireflection layer is positioned on the pretreatment film layer; and forming a front electrode and a back electrode on the front surface and the back surface of the semiconductor substrate, respectively.
Description
[ technical field ] A method for producing a semiconductor device
The invention relates to the technical field of solar cell processing, in particular to a solar cell, a preparation method thereof and a photovoltaic module.
[ background of the invention ]
In recent years, photovoltaic power generation technology has been marketed and commercialized as a mainstream technology of solar energy resources, and in order to further promote the utilization and popularization of photovoltaic cell products, the cell efficiency needs to be gradually improved, so how to improve the cost and the cell conversion efficiency in the solar cell preparation process also becomes a problem which needs to be solved urgently by the photovoltaic industry.
In crystalline silicon solar cells, a uniformly doped layer in contact with an electrode cannot meet two requirements simultaneously: on the one hand, light doping is needed to reduce metal recombination; on the other hand, heavy doping is needed to form high surface concentration, so that ohmic contact is formed between the silicon wafer and the metal electrode. Selective doping is therefore often achieved using localized doping techniques to improve cell efficiency. Local doping technology acts on the emitter, and a Selective Emitter (SE) can be realized, however, the metal recombination current of the existing Selective emitter is high, which results in limited efficiency improvement of the solar cell.
[ summary of the invention ]
In order to overcome the defects, the application provides a solar cell, a preparation method thereof and a photovoltaic module.
In a first aspect, the present application provides a method for manufacturing a solar cell, comprising the steps of:
providing a semiconductor substrate;
performing texturing treatment on the semiconductor substrate;
forming a pretreatment film layer on the front surface of the textured semiconductor substrate, wherein the pretreatment film layer contains doping elements;
performing first heat treatment on the surface of the pretreatment film layer to form a heavily doped region in the semiconductor substrate corresponding to a metalized region and performing second heat treatment on the surface of the pretreatment film layer to form a lightly doped region in the semiconductor substrate corresponding to a non-metalized region, wherein the first heat treatment temperature is higher than the second heat treatment temperature;
forming a tunneling layer and a doped conducting layer on the back surface of the semiconductor substrate;
respectively forming a front antireflection layer and a back antireflection layer on the front surface and the back surface of the semiconductor substrate, wherein the front antireflection layer is positioned on the pretreatment film layer; and
and respectively forming a front electrode and a back electrode on the front surface and the back surface of the semiconductor substrate.
In an alternative embodiment, the refractive index of the pre-treatment film layer is greater than 1.6.
In an alternative embodiment, the pretreatment film layer is a single-layer or multi-layer structure; and/or the thickness of the pretreatment film layer is more than 2nm.
In an alternative embodiment, the pretreatment film layer includes at least one of silicon nitride, titanium oxide, and hafnium oxide.
In an alternative embodiment, the doping element comprises a trivalent positive element; and/or the doping element comprises at least one of boron and gallium.
In an alternative embodiment, the doping concentration of the pretreatment film layer is 1E18 cm -3 ~1E21 cm -3 (ii) a And/or the doping concentration of the pretreatment film layer positioned in the metalized area is greater than that of the pretreatment film layer positioned in the non-metalized area.
In an alternative embodiment, the doping concentration of the heavily doped region after the first heat treatment is 1E16cm -3 ~1E20 cm -3 (ii) a And/or the doping concentration of the heavily doped region close to the pretreatment film layer is greater than that of the heavily doped region far away from the pretreatment film layer.
In an alternative embodiment, the difference between the sheet resistance of the heavily doped region and the sheet resistance of the lightly doped region is 30-500 ohm/sq.
In an optional embodiment, the doping concentration of the pre-treatment film layer after the second heat treatment is 1E17 cm -3 ~1E21 cm -3 。
In an alternative embodiment, the doping concentration of the heavily doped region after the formation of the front electrode is 1E17 cm -3 ~1E21 cm -3 And/or the doping concentration of the heavily doped region close to the pretreatment film layer is greater than that of the heavily doped region far away from the pretreatment film layer.
In an alternative embodiment, the doping concentration of the lightly doped region after the front electrode is formed is 1E16cm -3 ~1E20 cm -3 (ii) a And/or the doping concentration of the light doping area close to the pretreatment film layer is larger than that of the light doping area far away from the pretreatment film layer.
In an alternative embodiment, the front anti-reflection layer after the front electrode is formed also contains a doping element, and the doping concentration of the front anti-reflection layer close to the pretreatment film layer is greater than that of the front anti-reflection layer far from the pretreatment film layer.
In a second aspect, the present application provides a solar cell comprising:
a semiconductor substrate having opposing front and back surfaces;
the semiconductor device comprises a heavily doped region and a lightly doped region which are positioned on the front surface of the semiconductor substrate, wherein the heavily doped region corresponds to a metalized region of the semiconductor substrate, and the lightly doped region corresponds to a non-metalized region of the semiconductor substrate;
a pretreatment film layer covering the heavily doped region and the lightly doped region;
a front antireflection layer covering the pretreatment film layer;
the tunneling layer, the doped conducting layer and the back antireflection layer are positioned on the back of the semiconductor substrate;
a front electrode in contact with the heavily doped region and a back electrode in contact with the doped conductive layer.
In a third aspect, the present application provides a photovoltaic module comprising a plurality of strings of solar cells, each string of solar cells being formed by electrically connecting the solar cells of the second aspect.
Compared with the prior art, the method has the following steps:
according to the selective emitter structure, the first heat treatment and the second heat treatment are carried out on the pretreatment film layer containing the doping elements, the first heat treatment temperature is higher than the second heat treatment temperature, so that the heavily doped region corresponding to the metalized region and the lightly doped region corresponding to the non-metalized region are formed, the passivation layer is formed while the selective emitter structure is obtained, the current of the metal composite region can be reduced through the selective emitter prepared by the method, the open-circuit is improved, and the conversion efficiency of the solar cell is effectively improved. Compared with the existing selective emitter structure, the preparation method of the selective emitter structure does not need to carry out etching after the selective emitter is formed, and does not need to prepare a passivation layer after the selective emitter is formed, so that the process can be effectively simplified, and the cost is reduced.
Additional features and advantages of embodiments of the present application will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of embodiments of the present application. The objectives and other advantages of the embodiments of the application will be realized and attained by the structure particularly pointed out in the written description and drawings.
[ description of the drawings ]
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.
FIG. 1 is a flow chart of the solar cell fabrication process of the present application;
FIG. 2 is a schematic structural diagram of a pretreatment film layer formed on the front side of a textured semiconductor substrate according to the present application;
FIG. 3 is a schematic structural diagram of a heavily doped region formed according to the present application;
FIG. 4 is a schematic diagram of the formation of lightly doped regions according to the present application;
FIG. 5 is a schematic structural diagram of a tunneling layer and a doped conductive layer formed on a backside of a semiconductor substrate according to the present application;
FIG. 6 is a schematic structural diagram of a front anti-reflective layer and a back anti-reflective layer respectively formed on the front surface and the back surface of a semiconductor substrate according to the present application;
FIG. 7 is a schematic view of a solar cell made in accordance with the present application;
fig. 8 is a schematic structural view of a photovoltaic module of the present application.
In fig. 2 to 8:
1-a semiconductor substrate;
2-pretreating a film layer;
a 3-selective emitter;
31-a heavily doped region;
32-lightly doped region;
4-a tunneling layer;
5-doping the conductive layer;
6-front antireflection layer;
7-back antireflection layer;
8-a front electrode;
9-back electrode;
1000-a photovoltaic module;
100-solar cell;
200-a first cover plate;
300-a first encapsulation glue layer;
400-a second packaging glue layer;
500-second cover plate.
[ detailed description ] A
For better understanding of the technical solutions of the present invention, the following detailed descriptions of the embodiments of the present invention are provided with reference to the accompanying drawings.
It should be understood that the described embodiments are only some embodiments of the invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter associated objects are in an "or" relationship.
It should be noted that the terms "upper", "lower", "left", "right", and the like used in the embodiments of the present invention are described in terms of the drawings, and should not be construed as limiting the embodiments of the present invention. In addition, in this context, it will also be understood that when an element is referred to as being "on" or "under" another element, it can be directly on "or" under "the other element or be indirectly on" or "under" the other element through intervening elements.
It should be noted that the steps shown in the flowcharts of the figures may be executed in a computer system such as a set of computer-executable instructions, and although a logical order is shown in the flowcharts, the order of the steps of the embodiments is not limited to be executed in the order listed in the present specification, and in some cases, the steps shown or described may be executed in an order different from the order shown or described according to specific needs.
The selective emitter structure (se for short) realizes the optimization of the emitter region by carrying out heavy doping in the electrode contact region and light doping between the electrodes, so that the contact resistance between a metal electrode and a silicon wafer can be reduced, the carrier recombination in a diffusion layer region can be reduced, the output voltage and the current of a battery are enhanced, and the efficiency of the battery can be obviously improved.
Phosphorus Selective Emitter (SE) structures are currently used in industrial production, but boron SE structures have not been effectively used. At present, some preparation methods aiming at boron se structures exist in the industry, and the preparation methods are mainly divided into the following two main types: (1) The boron SE structure is prepared by combining a mask method with a secondary boron diffusion method, a mask layer is grown on a silicon substrate in advance, then a local area is etched to form a window, then primary boron diffusion is carried out to form heavy doping, and secondary boron diffusion is carried out to form light doping after the mask is removed; (2) The laser SE method mainly realizes heavy doping by depositing or coating a boron source and then by laser propulsion of a local area, realizes light doping by other laser-free areas, and further realizes an SE structure.
Therefore, the preparation method of the solar cell provided by the application has the advantages that the pretreatment film layer is formed on the front surface of the semiconductor substrate, the pretreatment film layer can provide a doping source to form a selective emitter and can be directly used as a passivation layer without subsequent etching, so that the current of a metal composite region can be reduced, the open-circuit is improved, and the conversion efficiency of the solar cell is effectively improved.
The present application provides a method for manufacturing a solar cell, as shown in fig. 1, including the following steps:
providing a semiconductor substrate 1;
texturing the semiconductor substrate 1;
forming a pretreatment film layer 2 on the front surface of the textured semiconductor substrate 1, wherein the pretreatment film layer 2 contains doping elements;
performing a first heat treatment on the surface of the pretreatment film layer 2 to form a heavily doped region 31 in the semiconductor substrate 1 corresponding to the metalized region and performing a second heat treatment on the surface of the pretreatment film layer 2 to form a lightly doped region 32 in the semiconductor substrate 1 corresponding to the non-metalized region, wherein the first heat treatment temperature is higher than the second heat treatment temperature;
forming a tunneling layer 4 and a doped conducting layer 5 on the back surface of the semiconductor substrate 1;
respectively forming a front antireflection layer 6 and a back antireflection layer 7 on the front surface and the back surface of the semiconductor substrate 1, wherein the front antireflection layer 6 is positioned on the pretreatment film layer 2; and
a front electrode 8 and a rear electrode 9 are formed on the front surface and the rear surface of the semiconductor substrate 1, respectively.
In the scheme, the first heat treatment and the second heat treatment are carried out on the pretreatment film layer 2 containing the doping elements, the first heat treatment temperature is higher than the second heat treatment temperature, so that the heavily doped region 31 corresponding to the metalized region and the lightly doped region 32 corresponding to the non-metalized region are formed, the passivation layer is formed while the selective emitter 3 structure is obtained, the selective emitter 3 prepared by the method can reduce the current of the metal composite region, the open-circuit voltage is improved, and the conversion efficiency of the solar cell is effectively improved. Compared with the existing selective emitter 3 structure, the preparation method of the selective emitter 3 does not need to perform etching after the selective emitter 3 is formed, and does not need to prepare a passivation layer after the selective emitter 3 is formed, so that the process can be effectively simplified, and the cost can be reduced. Hereinafter, a process for manufacturing a solar cell according to the present application will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, which are only a part of the embodiments of the present invention, but not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without making any creative effort, shall fall within the protection scope of the present invention.
In some embodiments, the front surface of the semiconductor substrate 1 is a surface facing the sun (i.e., a light receiving surface), and the back surface of the semiconductor substrate 1 is a surface facing away from the sun (i.e., a backlight surface).
In some embodiments, the semiconductor substrate 1 is a silicon substrate, which may be a polycrystalline silicon substrate, a single crystalline silicon substrate, or a single crystalline silicon-like substrate.
In some embodiments, the semiconductor substrate 1 may be an N-type substrate, the solar cell of the present application may be an N-type cell, and in particular, may be an N-PERT cell (Passivated Emitter Rear-diffused) solar cell), an N-PERL cell (PERL), an N-top con cell, and an N-IBC cell.
In some embodiments, the thickness of the semiconductor substrate 1 is 60 μm to 240 μm, and may be 60 μm, 80 μm, 90 μm, 100 μm, 120 μm, 150 μm, 200 μm, 240 μm, or the like, which is not limited herein.
In some embodiments, the texturing process may be performed by etching, and the etching process may be chemical etching, laser etching, mechanical method, plasma etching, and the like, which are not limited herein. Illustratively, when the semiconductor substrate 1 is a single crystal silicon substrate, texturing may be performed using an alkaline solution such as a potassium hydroxide solution; when the semiconductor substrate 1 is a polysilicon substrate, texturing may be performed using an acidic solution such as a hydrofluoric acid solution. In addition, a small amount of a texturing additive may be added to the acidic solution or the alkaline solution.
In the embodiment of the application, the surface of the silicon substrate is provided with the pre-polarizing structure through texturing, so that a light trapping effect is generated, the absorption quantity of the solar cell to light is increased, and the conversion efficiency of the solar cell is improved.
In some embodiments, the present application is not limited to the specific operation mode for forming the pretreatment film layer 2. Illustratively, the pretreatment film layer 2 may be deposited on the surface of the semiconductor substrate 1 by any one of a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, and an atmospheric pressure chemical vapor deposition method.
In some embodiments, the in-situ doping process may be performed simultaneously with the deposition of the pretreatment film layer 2 to form the pretreatment film layer 2 containing the doping element.
In some embodiments, the pretreatment film layer 2 is a single-layer or multi-layer structure, and it is understood that the pretreatment film layer 2 may be formed by depositing on the surface of the semiconductor substrate 1 once, or the multi-layer structure may be formed by depositing on the surface of the semiconductor substrate 1 multiple times, as long as the pretreatment film layer 2 contains the doping element.
In some embodiments, the refractive index of the pretreatment film layer 2 is greater than 1.6, and specifically may be 1.65, 1.7, 1.8, 1.9, 2.0, and the like. On one hand, the pretreatment film layer 2 with the refractive index higher than 1.6 is adopted as a doping source for forming the selective emitter 3, the solid phase segregation coefficient of the doping element is higher at the interface of the pretreatment film layer 2 and the semiconductor substrate 1, the doping element is easy to diffuse into the semiconductor substrate 1 when being subjected to the energy effects of irradiation, heating and the like, and the high-quality selective emitter 3 is favorably formed. On the other hand, the pretreatment film layer 2 with the refraction higher than 1.6 is adopted, the antireflection effect of the pretreatment film layer on the surface of the semiconductor substrate 1 is good, and injection of energy such as laser is facilitated, so that the reflection effect is reduced.
In some embodiments, the thickness of the pretreatment film layer 2 is greater than 2nm, specifically, 2.5nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, and the like, and controlling the thickness of the pretreatment film layer 2 within the above range can ensure that the pretreatment film layer 2 can achieve a good passivation effect while ensuring the existence of sufficient doping elements.
In some embodiments, the pretreatment film layer 2 includes at least one of silicon nitride, titanium oxide, and hafnium oxide. It can be understood that the refractive index of the pretreatment film layer 2 made of the above materials can reach more than 1.6.
In some embodiments, the doping element comprises a positive trivalent element.
In some embodiments, the doping element includes at least one of boron and gallium, and the present application is performed by doping the film layer 2 with boron and/or gallium, and performing subsequent processing to form a selective emitter 3 of boron, or a selective emitter 3 of gallium, or a selective emitter 3 of boron and gallium.
In some embodiments, the doping concentration of the pretreatment film layer 2 is 1E18 cm -3 ~1E21 cm -3 (ii) a Specifically, the length of the groove may be 1E18 cm -3 、5E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 And the like, controlling the doping concentration of the pretreatment film layer 2 within the above range can ensure that sufficient doping elements are diffused into the semiconductor substrate 1 through heat treatment.
In some embodiments, when the pretreatment film layer 2 is treated to dope the doping elements, a one-step doping method may be adopted to make the doping concentration of each region of the pretreatment film layer 2 the same, which may effectively simplify the preparation process and save the cost, and certainly, a two-time local doping method may also be adopted to make the doping concentration of the metalized region of the single-layer pretreatment film layer 2 higher than the doping concentration of the non-metalized region, which is beneficial to the subsequent formation of the selective emitter 3 with higher quality.
In some embodiments, when the pretreatment film 2 has a multi-layer structure, the concentration of the doping element in the multi-layer structure may be the same, or the pretreatment film 2 may have a concentration gradient. In addition, in order to obtain a higher quality of the selective emitter 3, the concentration of the doping element in the pretreatment film layer 2 closer to the semiconductor substrate 1 in the pretreatment film layer 2 is higher. Of course, it is also possible to dope different doping elements into different pretreatment film layers 2 as different doping sources.
In some embodiments, the treated region of the first heat treatment is a metalized region of the pre-treated film layer 2, and the first heat treatment includes at least one of laser irradiation and plasma bombardment. The physical damage generated by processing the pretreatment film layer 2 by adopting the modes of laser irradiation and plasma bombardment is small, and the quality of an emitting electrode cannot be greatly influenced. The energy intensity of laser irradiated by laser or plasma bombarded by plasma can be adjusted according to the requirement of a user, so that the doping concentration of the heavily doped region 31 is adjusted, and the energy intensity of laser irradiation is not limited.
In some embodiments, the doping concentration of the heavily doped region 31 after the first heat treatment is 1E16cm -3 ~1E20 cm -3 Specifically, the length may be 1E16cm -3 、1E17 cm -3 、1E18 cm -3 、1E19 cm -3 And 1E20 cm -3 And the like, which indicates that the doping concentration of the heavily doped region 31 after the first heat treatment is high, ensuring a good doping effect.
In some embodiments, since the pretreatment film layer 2 is located on the surface of the semiconductor substrate 1, the pretreatment film layer 2 is subjected to the first heat treatment, and the doping element molecules diffuse from the high-concentration region to the low-concentration region, so that the doping concentration of the region closer to the pretreatment film layer 2 in the semiconductor substrate 1 is higher due to the limited diffusion rate of the doping element molecules, that is, the doping concentration of the heavily doped region 31 closer to the pretreatment film layer 2 is higher than the doping concentration of the heavily doped region 31 farther from the pretreatment film layer 2.
In some embodiments, the treatment region of the second heat treatment is a non-metallized region of the pre-treatment film layer 2, and the apparatus of the second heat treatment comprises at least one of a chain diffusion furnace, a tubular diffusion furnace, and an RTP furnace.
In some embodiments, the temperature of the second heat treatment is 800 ℃ to 1100 ℃, and specifically may be 800 ℃, 850 ℃, 900 ℃, 950 ℃, 1000 ℃, 1050 ℃, 1100 ℃, and the like. In the temperature range, the doping elements of the pretreatment film layer 2 are diffused to the non-metalized area of the semiconductor substrate 1 to form the lightly doped area 32. And in the second heat treatment process, the doping elements in the heavily doped region 31 and the lightly doped region 32 are activated to form a high-quality diffusion doping layer. The doping concentration and junction of the lightly doped region 32 can be adjusted according to the temperature of the second heat treatment, and the temperature of the second heat treatment has little influence on the formed heavily doped region 31, so that the adjustability of the preparation process can be improved.
In some embodiments, the temperature of the pretreatment film 2 by laser irradiation and plasma bombardment is higher than that of the second heat treatment, so as to ensure that the heavily doped region 31 corresponding to the metalized region and the lightly doped region 32 corresponding to the non-metalized region are formed.
In some embodiments, after the second heat treatment is performed on the pretreatment film layer 2, all the doping elements cannot be diffused into the semiconductor substrate 1, so that some doping elements still remain in the pretreatment film layer 2, and the doping concentration of the pretreatment film layer 2 after the second heat treatment is 1E17 cm -3 ~1E21 cm -3 Specifically, the length may be 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 And so on.
In some embodiments, the difference in the sheet resistance (i.e., the sheet resistance) between the heavily doped region 31 and the lightly doped region 32 is 30 to 500ohm/sq, and specifically, the difference in the sheet resistance between the heavily doped region 31 and the lightly doped region 32 may be 30 to 500ohm/sq, 50 to 100ohm/sq, 200 to 300 to 400 to 500ohm/sq, and the like, and the present application forms the heavily doped region 31 and the lightly doped region 32 by different processes (first and second heat treatments), respectively, so that the control ranges of the heavily doped region 31 and the lightly doped region 32 are large and can be controlled separately.
In step 500, as shown in fig. 5, a tunneling layer 4 and a doped conductive layer 5 are formed on the back surface of the semiconductor substrate 1.
In some embodiments, the tunneling layer 4 may be formed on the back surface of the semiconductor substrate 1, and then the doped conductive layer 5 may be formed on the surface of the tunneling layer 4.
In some embodiments, the present application is not limited to the specific operation of forming the tunneling layer 4. Illustratively, the rear surface of the semiconductor substrate 1 may be oxidized by any one of an ozone oxidation method, a high-temperature thermal oxidation method, and a nitric acid oxidation method.
In some embodiments, the tunneling layer 4 is a thin oxide layer, which may be, for example, silicon oxide or a metal oxide, and may contain other additional elements, such as nitrogen. The tunneling layer 4 may not have a perfect tunnel barrier in practical effect, because it contains defects such as pinholes, for example, which may cause other charge carrier transport mechanisms (e.g. drift, diffusion) to dominate over the tunneling effect.
In some embodiments, the present application is not limited to the specific operation of forming the doped conductive layer 5. Illustratively, any one of a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method and an atmospheric pressure chemical vapor deposition method may be adopted to deposit a doped conductive layer 5 on the surface of the tunneling layer 4 for protecting the tunneling layer 4, and then, doping silicon of the conductive layer to form a high-low junction (n/n) junction + Si) which can effectively reduce the recombination rate of carriers on the back surface of the cell, and further improve the conversion efficiency of the solar cell.
In some embodiments, the doped conductive layer 5 may be formed by performing an in-situ doping process while depositing the conductive layer, and the doped conductive layer 5 includes at least one of silicon carbide and polysilicon, that is, the doped conductive layer 5 may be a doped polysilicon layer, a silicon carbide layer, or a composite layer of the doped polysilicon layer and the silicon carbide layer.
In some embodiments, the doped polysilicon layer is a phosphorus-doped polysilicon layer, and the phosphorus-doped polysilicon layer may be, for example: and depositing a polysilicon layer on the surface of the tunneling oxide layer and carrying out in-situ doping treatment to form a phosphorus-doped polysilicon layer. The phosphorus diffusion process may also use any one or more of high temperature diffusion, slurry doping, or ion implantation, which is not limited herein.
In some embodiments, the phosphorus-doped polysilicon layer has a doping concentration of 1 × 10 19 cm -3 ~1×10 21 cm -3 The doping concentration may specifically be 1 × 10 19 cm -3 、1×10 20 cm -3 Or 1X 10 21 cm -3 And the like, the doping concentration is controlled within the range, which is beneficial to improving the passivation performance.
Step 600, as shown in fig. 6, forms a front anti-reflection layer 6 and a back anti-reflection layer 7 on the front surface and the back surface of the semiconductor substrate 1, respectively.
In some embodiments, the present application is not limited to the specific operation of forming the doped conductive layer 5. Illustratively, the front anti-reflective layer 6 and the back anti-reflective layer 7 may be formed by any one of a low pressure chemical vapor deposition method, a plasma enhanced chemical vapor deposition method, and an atmospheric pressure chemical vapor deposition method.
In some embodiments, the front anti-reflective layer 6 may include, but is not limited to, at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, or any combination thereof, and the front anti-reflective layer 6 may also function to reduce reflection of incident light, and in some aspects, can also provide a good passivation effect for the semiconductor substrate 1, which can help to improve the conversion efficiency of the cell.
In some embodiments, the back side anti-reflective layer 7 may include, but is not limited to, at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, or any combination thereof.
Step 700 is to form a front electrode 8 and a back electrode 9 on the front surface and the back surface of the semiconductor substrate 1, respectively, and the structure of the formed solar cell is shown in fig. 7.
Printing a front main grid and a front auxiliary grid on the front surface of the semiconductor substrate 1 by using slurry, drying to form a corresponding front electrode 8, printing a back main grid and a back auxiliary grid on the back surface of the semiconductor substrate 1 by using slurry, drying to form a corresponding back electrode 9, and finally sintering the dried cell to obtain the solar cell.
In some embodiments, a secondary drive is performed during the high-temperature sintering process for forming the front electrode 8, so that the doping element remaining in the pretreatment film layer 2 diffuses into the metalized region of the semiconductor substrate 1, and the doping concentration of the heavily doped region 31 after forming the front electrode 8 is 1E17 cm -3 ~1E21 cm -3 Specifically, the doping concentration of the heavily doped region 31 after the formation of the front electrode 8 is 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 Etc., in the above range, ensures that a high quality selective emitter 3 can be obtained.
In some embodiments, after the front electrode 8 is formed through the first heat treatment and the second heat treatment and high-temperature sintering, the doping concentration of the heavily doped region 31 near the pretreatment film layer 2 is greater than that of the heavily doped region 31 far from the pretreatment film layer 2.
In some embodiments, the front electrode 8 is formed on the front surface of the semiconductor substrate 1 by screen printing and sintering after the selective emitter 3 is formed, and a secondary drive is performed in the high-temperature sintering process, so that the residual doping elements in the pretreatment film layer 2 are diffused into the non-metal region of the semiconductor substrate 1, and the doping concentration of the lightly doped region 32 after the front electrode 8 is formed is 1E16cm -3 ~1E20 cm -3 Specifically, the length may be 1E16cm -3 、1E17 cm -3 、1E18 cm -3 、1E19 cm -3 And 1E20 cm -3 And so on.
In some embodiments, since the lightly doped region 32 and the heavily doped region 31 have similar manufacturing processes, the doping concentration of the lightly doped region 32 near the pretreatment film 2 is greater than that of the lightly doped region 32 far from the pretreatment film 2.
In some embodiments, since the front anti-reflective layer 6 itself does not contain the doping element, under the high temperature treatment condition, the doping element in the pretreatment film layer 2 can diffuse from the high concentration region to the low concentration region, and the front anti-reflective layer 6 is in contact with the pretreatment film layer 2, after the front electrode 8 is formed at high temperature, the doping element in the pretreatment film layer 2 can diffuse into the front anti-reflective layer 6, so that the front anti-reflective layer 6 also contains the doping element, and the doping concentration of the front anti-reflective layer 6 close to the pretreatment film layer 2 is greater than that of the front anti-reflective layer 6 far away from the pretreatment film layer 2.
In some embodiments, the sintering temperature is 900 ℃ to 950 ℃, specifically 900 ℃, 910 ℃, 920 ℃, 930 ℃, 940 ℃ and 950 ℃, etc.
In some embodiments, the sintering time is 10s to 20s, and specifically may be 10s, 11s, 12s, 13s, 14s, 15s, 16s, 17s, 18s, 19s, 20s, and the like.
In some embodiments, the specific materials of the front electrode 8 and the back electrode 9 are not limited in the examples of the present application. For example, the front electrode 8 is a silver electrode or a silver/aluminum electrode, and the back electrode 9 is a silver electrode or a silver/aluminum electrode.
The present application provides a solar cell prepared by the above preparation method, as shown in fig. 7, including:
a semiconductor substrate 1, the semiconductor substrate 1 having opposite front and back surfaces;
a heavily doped region 31 and a lightly doped region 32 located on the front surface of the semiconductor substrate 1, wherein the heavily doped region 31 corresponds to a metalized region of the semiconductor substrate 1, and the lightly doped region 32 corresponds to a non-metalized region of the semiconductor substrate 1;
a pretreatment film layer 2 covering the heavily doped region 31 and the lightly doped region 32;
a front antireflection layer 6 covering the pretreatment film layer 2;
the tunneling layer 4, the doped conducting layer 5 and the back antireflection layer 7 are positioned on the back of the semiconductor substrate 1;
a front electrode 8 in contact with the heavily doped region 31 and a back electrode 9 in contact with the doped conductive layer 5.
In the above scheme, the heavily doped region 31 and the lightly doped region 32 on the front surface of the semiconductor substrate 1 form the selective emitter 3 of the solar cell, and the pretreatment film layer 2 covering the heavily doped region 31 and the lightly doped region 32 serves as a passivation layer, so that a good passivation effect is achieved on the semiconductor substrate 1, the current of the metal composite region is reduced, the open-circuit voltage is improved, and the conversion efficiency of the solar cell is effectively improved.
In some embodiments, the thickness of the pretreatment film layer 2 is greater than 2nm, specifically, 2.5nm, 3nm, 4nm, 5nm, 6nm, 7nm, 8nm, and the like, and controlling the thickness of the pretreatment film layer 2 within the above range can ensure that the pretreatment film layer 2 can achieve a good passivation effect while ensuring the existence of sufficient doping elements.
In some embodiments, the difference in the sheet resistance between the heavily doped region 31 and the lightly doped region 32 is 30ohm/sq to 500ohm/sq, and specifically, the difference in the sheet resistance between the heavily doped region 31 and the lightly doped region 32 may be 30ohm/sq, 50ohm/sq, 100ohm/sq, 200ohm/sq, 300ohm/sq, 400ohm/sq, 500ohm/sq, or the like.
In some embodiments, the doping concentration of the pretreatment film layer 2 is 1E17 cm -3 ~1E21 cm -3 Specifically, the length may be 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 And the like.
In some embodiments, the doping concentration of the heavily doped region 31 is 1E17 cm -3 ~1E21 cm -3 Specifically, the doping concentration of the heavily doped region 31 after the formation of the front electrode 8 is 1E17 cm -3 、1E18 cm -3 、1E19 cm -3 、1E20 cm -3 And 1E21 cm -3 And the like.
In some embodiments, the lightly doped region 32 has a doping concentration of 1E16cm -3 ~1E20 cm -3 Specifically, it may be 1E16cm -3 、1E17 cm -3 、1E18 cm -3 、1E19 cm -3 And 1E20 cm -3 And the like.
In a third aspect, the present application provides a photovoltaic module 1000 comprising a string of solar cells as described above formed by electrical connections.
Specifically, referring to fig. 8, the photovoltaic module 1000 includes a first cover plate 200, a first encapsulant layer 300, a solar cell string, a second encapsulant layer 400, and a second cover plate 500.
In some embodiments, the solar cell string includes a plurality of solar cells 100 connected by conductive tapes, and the connection manner between the solar cells 100 may be partial lamination or splicing.
In some embodiments, the first cover plate 200 and the second cover plate 500 may be transparent or opaque cover plates, such as glass cover plates and plastic cover plates.
The two sides of the first packaging adhesive layer 300 are respectively contacted and attached with the first cover plate 200 and the battery string, and the two sides of the second packaging adhesive layer 400 are respectively contacted and attached with the second cover plate 500 and the battery string. The first and second adhesive layers 300 and 400 may be ethylene-vinyl acetate (EVA) adhesive films, polyethylene octene co-elastomer (POE) adhesive films, or polyethylene terephthalate (PET) adhesive films, respectively.
The photovoltaic module 1000 may also be encapsulated in a side-edge-all-around manner, that is, the side edge of the photovoltaic module 1000 is encapsulated by an encapsulation tape, so as to prevent the photovoltaic module 1000 from generating a lamination offset phenomenon during the lamination process.
The photovoltaic module 1000 further includes an edge sealing member, which is fixedly sealed to a portion of the edge of the photovoltaic module 1000. The edge sealing member may be fixedly sealed to the edge of the photovoltaic module 1000 near the corner. The edge seal may be a high temperature resistant tape. The high-temperature-resistant adhesive tape has excellent high-temperature-resistant characteristic, cannot be decomposed or fall off in the laminating process, and can ensure reliable packaging of the photovoltaic module 1000. Wherein, two ends of the high temperature resistant adhesive tape are respectively fixed on the second cover plate 500 and the first cover plate 200. The two ends of the high temperature resistant adhesive tape can be respectively bonded with the second cover plate 500 and the first cover plate 200, and the middle part of the high temperature resistant adhesive tape can limit the side edge of the photovoltaic module 1000, so that the photovoltaic module 1000 is prevented from generating lamination deviation in the lamination process.
Example 1
(1) Depositing a silicon nitride layer on the textured N-type silicon wafer in a PVD (physical vapor deposition) mode, and introducing BH (boron hydride) again in the deposition process 3 。
(2) And processing the metalized area of the pretreatment film layer by adopting a laser irradiation mode to form a heavily doped area corresponding to the metalized area.
(3) And (3) heating the silicon wafer obtained in the step (2) at 850 ℃ by using a chain type diffusion furnace to form a light doping area corresponding to the non-metallization area.
(4) Forming a tunneling layer and a doped conducting layer on the back of the semiconductor substrate;
(5) And respectively forming a front antireflection layer and a back antireflection layer on the front surface and the back surface of the semiconductor substrate, wherein the front antireflection layer is positioned on the pretreatment film layer.
(6) A front electrode and a back electrode are formed on the front surface and the back surface of a semiconductor substrate, respectively.
Comparative example 1
(1) And (3) putting the textured N-type silicon wafer into a boron diffusion furnace, introducing a BBr3 liquid source and nitrogen, and performing primary diffusion treatment at 750-850 ℃.
(2) And (3) coating etching slurry containing HF on the metalized area on the surface of the silicon wafer obtained in the step (1) by utilizing screen printing, and corroding and removing BSG and an oxide layer on the silicon wafer contacted with the etching slurry.
(3) And after cleaning the etching slurry, performing secondary diffusion treatment, wherein the metalized region is etched to remove the BSG so that the silicon wafer is exposed to form a heavily doped region, and the non-metalized region forms a lightly doped region due to the presence of the BSG.
(4) Forming a tunneling layer and a doped conducting layer on the back of the semiconductor substrate;
(5) And respectively forming a front antireflection layer and a back antireflection layer on the front surface and the back surface of the semiconductor substrate, wherein the front antireflection layer is positioned on the pretreatment film layer.
(6) A front electrode and a back electrode are formed on the front surface and the back surface of a semiconductor substrate, respectively.
The selective emitters prepared in example 1 and comparative example 1 were subjected to sheet resistance, metal recombination current and emitter recombination current tests, and the test results are shown in table 1.
TABLE 1 Performance parameters of the emitters of comparative example 1 and example
As can be seen from the data in Table 1: compared with the selective emitter prepared in the comparative example 1, the metal recombination current of the heavily doped region and the emitter recombination current of the lightly doped region prepared in the example 1 of the application are lower.
The solar cells prepared in example and comparative example 1 were tested for open circuit voltage, fill factor, short circuit current density, and conversion efficiency, and the results are shown in table 2.
TABLE 1 Performance parameters of solar cells prepared in comparative example 1 and example
Group of | Voc(mV) | Jsc(mA/cm 2 ) | FF(%) | Eta(%) |
Comparative example 1 | 110 | 41.36 | 83.45 | 24.57 |
Example 1 | 60 | 41.42 | 83.41 | 24.91 |
From the data in table 2 it can be seen that: compared with the comparative example 1, on one hand, the pretreatment film layer prepared by the method can form a high-quality selective emitter, so that the composite current of a metalized area is reduced, the open-circuit voltage of a cell is improved, and the conversion efficiency of solar energy is improved; on the other hand, the pretreatment film layer prepared by the method can be directly used as a passivation layer besides providing a doping source for the selective emitter, so that the process can be effectively simplified, and the cost is reduced.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent substitutions, improvements, etc. within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (14)
1. A preparation method of a solar cell is characterized by comprising the following steps:
providing a semiconductor substrate;
performing texturing treatment on the semiconductor substrate;
forming a pretreatment film layer on the front surface of the textured semiconductor substrate, wherein the pretreatment film layer contains doping elements;
performing first heat treatment on the surface of the pretreatment film layer to form a heavily doped region in the semiconductor substrate corresponding to a metalized region and performing second heat treatment on the surface of the pretreatment film layer to form a lightly doped region in the semiconductor substrate corresponding to a non-metalized region, wherein the first heat treatment temperature is higher than the second heat treatment temperature;
forming a tunneling layer and a doped conducting layer on the back surface of the semiconductor substrate;
respectively forming a front antireflection layer and a back antireflection layer on the front surface and the back surface of the semiconductor substrate, wherein the front antireflection layer is positioned on the pretreatment film layer; and
and respectively forming a front electrode and a back electrode on the front surface and the back surface of the semiconductor substrate.
2. The method of claim 1, wherein the pre-treatment film layer has a refractive index greater than 1.6.
3. The production method according to claim 1, wherein the pretreatment film layer is a single-layer or multi-layer structure; and/or the thickness of the pretreatment film layer is more than 2nm.
4. The method of claim 1, wherein the pre-treatment film layer comprises at least one of silicon nitride, titanium oxide, and hafnium oxide.
5. The method according to claim 1, wherein the doping element comprises a positive trivalent element; and/or the doping element comprises at least one of boron and gallium.
6. The method of claim 1, wherein the pre-treatment film layer has a doping concentration of 1E18 cm -3 ~1E21 cm -3 (ii) a And/or the doping concentration of the pretreatment film layer positioned in the metalized area is greater than that of the pretreatment film layer positioned in the non-metalized area.
7. The method according to claim 1, wherein the doping concentration of the heavily doped region after the first heat treatment is 1E16cm -3 ~1E20 cm -3 (ii) a And/or the doping concentration of the heavily doped region close to the pretreatment film layer is greater than that of the heavily doped region far away from the pretreatment film layer.
8. The method of claim 6, wherein the difference in sheet resistance between the heavily doped region and the lightly doped region is 30-500 ohm/sq.
9. The method according to claim 1, wherein the doping concentration of the pre-treatment film layer after the second heat treatment is 1E17 cm -3 ~1E21 cm -3 。
10. The method according to claim 1, wherein the doping concentration of the heavily doped region after the formation of the front electrode is 1E17 cm -3 ~1E21 cm -3 And/or the doping concentration of the heavily doped region close to the pretreatment film layer is greater than that of the heavily doped region far away from the pretreatment film layer.
11. The manufacturing method according to claim 1, wherein the doping concentration of the lightly doped region after the formation of the front electrode is 1E16cm -3 ~1E20 cm -3 (ii) a And/or the doping concentration of the light doping area close to the pretreatment film layer is larger than that of the light doping area far away from the pretreatment film layer.
12. The manufacturing method according to claim 1, wherein said front anti-reflective layer after forming said front electrode also contains a doping element, and a doping concentration of said front anti-reflective layer near said pretreatment film layer is greater than a doping concentration of said front anti-reflective layer far from said pretreatment film layer.
13. A solar cell, comprising:
a semiconductor substrate having opposing front and back surfaces;
the semiconductor device comprises a heavily doped region and a lightly doped region which are positioned on the front surface of the semiconductor substrate, wherein the heavily doped region corresponds to a metalized region of the semiconductor substrate, and the lightly doped region corresponds to a non-metalized region of the semiconductor substrate;
a pretreatment film layer covering the heavily doped region and the lightly doped region;
a front antireflection layer covering the pretreatment film layer;
the tunneling layer, the doped conducting layer and the back antireflection layer are positioned on the back of the semiconductor substrate;
a front electrode in contact with the heavily doped region and a back electrode in contact with the doped conductive layer.
14. A photovoltaic module comprising a plurality of strings of solar cells, each string of solar cells formed by an electrical connection of the solar cells of claim 13.
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