CN113555442A - 一种三栅Ga2O3横向MOSFET功率器件及其制备方法 - Google Patents
一种三栅Ga2O3横向MOSFET功率器件及其制备方法 Download PDFInfo
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Abstract
本发明公开了一种三栅Ga2O3横向MOSFET功率器件及其制备方法,所述器件包括Ga2O3衬底、Ga2O3外延层、两个P型阱区、P型控制区、n+型源区、沟道区、栅极、源极和漏极,其中,Ga2O3衬底上开设有衬底凹槽,Ga2O3外延层设置在衬底凹槽中;两个P型阱区和P型控制区分别设置在Ga2O3外延层的上表面,且P型控制区设置在两个P型阱区之间,n+型源区和沟道区间隔分布在P型阱区的上表面;栅极包括顶栅和两个侧栅,两个侧栅分别设置在沟道区的两侧,顶栅设置在沟道区的上方,顶栅两端分别与两个侧栅接触;漏极设置于Ga2O3衬底的下表面,源极覆盖于整个器件的上表面。本发明采用重掺杂N型Ga2O3作为衬底,具有较好的热稳定性,可以显著提升器件承受的功率和运行的温度。
Description
技术领域
本发明属于微电子技术领域,具体涉及一种三栅Ga2O3横向MOSFET功率器件及其制备方法。
背景技术
SiC以其优良的物理化学特性和电学特性成为制造高温、大功率电子器件的一种最有优势的半导体材料,并且具有远大于Si材料的功率器件品质因子。SiC功率器件金属-氧化物半导体场效应晶体管(Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET)的研发始于20世纪90年代,其具有输入阻抗高、开关速度快、工作频率高、耐高温高压等一系列优点,已在开关稳压电源、高频加热、汽车电子以及功率放大器等方面取得了广泛的应用。
为了实现较高的应用可靠性,从器件技术角度,SiC材料具有缺陷较多、沟道迁移率较低、成本较高等技术以及经济问题,导致严重制约着SiC功率器件的发展。
发明内容
为了解决现有技术中存在的上述问题,本发明提供了一种三栅Ga2O3横向MOSFET功率器件及其制备方法。本发明要解决的技术问题通过以下技术方案实现:
本发明的一个方面提供了一种三栅Ga2O3横向MOSFET功率器件,包括Ga2O3衬底、Ga2O3外延层、两个P型阱区、P型控制区、n+型源区、沟道区、栅极、源极和漏极,其中,
所述Ga2O3衬底上开设有衬底凹槽,所述Ga2O3外延层设置在所述衬底凹槽中;
所述两个P型阱区和P型控制区分别设置在所述Ga2O3外延层的上表面,且所述P型控制区设置在所述两个P型阱区之间,所述n+型源区和所述沟道区间隔分布在所述P型阱区的上表面;
所述栅极包括顶栅和两个侧栅,两个侧栅分别设置在所述沟道区的两侧,所述顶栅设置在所述沟道区的上方,所述顶栅的两端下表面分别与两个侧栅的上表面接触,所述沟道区通过高k介质层与所述顶栅和所述两个侧栅间隔,所述两个侧栅的外侧分别设置有所述高k介质层以与所述n+型源区或所述Ga2O3外延层间隔开;
所述漏极设置于所述Ga2O3衬底的下表面,且所述漏极与所述Ga2O3衬底之间还包括欧姆接触金属层,所述源极覆盖于整个器件的上表面且通过所述高k介质层与所述栅极间隔开。
在本发明的一个实施例中,所述顶栅水平方向上的一端位于所述n+型源区的上方,另一端延伸至所述P型控制区与所述P型阱区之间区域的上方。
在本发明的一个实施例中,所述Ga2O3衬底为重掺杂N型Ga2O3衬底,掺杂浓度大于1×1019cm-3。
在本发明的一个实施例中,所述n+型源区的掺杂浓度大于1×1019cm-3。
在本发明的一个实施例中,所述高K介质层的材料为Si3N4、Al2O3、SiO2、HfO2和HfSiO中的一种或多种。
在本发明的一个实施例中,所述P型控制区的掺杂浓度高于所述P型阱区的掺杂浓度。
本发明的另一方面提供了一种三栅Ga2O3横向MOSFET功率器件的制备方法,用于制备上述实施例中任一项所述的三栅Ga2O3横向MOSFET功率器件,所述制备方法包括:
S1:选取Ga2O3衬底并在所述Ga2O3衬底上形成衬底凹槽;
S2:在清洗后的衬底凹槽中生长Ga2O3外延层;
S3:在所述Ga2O3外延层的上表面形成多个P型阱区;
S4:在相邻两个P型阱区之间形成P型控制区;
S5:在所述P型阱区上方生长n+型源区;
S6:在所述P型阱区上方形成栅极,所述栅极为由一个顶栅和两个侧栅组成的三栅结构;
S7:在所述Ga2O3衬底的下表面沉积欧姆接触金属层,退火形成欧姆接触;
S8:在所述欧姆接触金属层上形成漏极;
S9:在器件的上表面形成源极。
在本发明的一个实施例中,所述S6包括:
S61:在所述P型阱区上且所述n+型源区的内侧形成介质槽;
S62:在所述介质槽内部沉积包裹有高K介质的三栅结构。
在本发明的一个实施例中,两个侧栅分别设置在位于所述介质槽中部的沟道区两侧,所述顶栅设置在所述沟道区的上方,所述顶栅的两端下表面分别与两个侧栅的上表面接触,所述沟道区通过高k介质层与所述顶栅和所述两个侧栅间隔,所述两个侧栅的外侧分别设置有所述高k介质层以与所述n+型源区或所述Ga2O3外延层间隔开。
在本发明的一个实施例中,所述S7包括:
在所述Ga2O3衬底的下表面依次沉积1-50nm的碳层和10-500nm的镍层,随后通过退火实现欧姆接触,退火温度为700-950℃。
与现有技术相比,本发明的有益效果在于:
1、本发明的三栅Ga2O3横向MOSFET功率器件采用重掺杂N型Ga2O3作为衬底,Ga2O3可以承受更高的温度,具有较好的热稳定性,可以显著提升器件承受的功率和运行的温度,具有更强的稳定性;另外,与现有的4H-SiC衬底材料相比,Ga2O3的Baliga品质因数(巴利加品质因数)是4H-SiC的8倍以上,且制作方法更方便,因此解决了4H-SiC材料制作器件较高经济成本,沟道迁移率低的问题,提高了沟道迁移率,显著降低了器件的功耗。
2、本发明的三栅Ga2O3横向MOSFET功率器件利用高掺杂P型控制区,降低栅氧化物电场并有效降低高漏源电压下的饱和电流密度,提高器件的短路耐受能力,提高器件的可靠性。
3、通过优化***栅电极与位于***栅电极之间的P型控制区之间的间距,降低器件的栅漏电容,降低器件低漏源电压下的导通损耗。
4、本发明采用晶格常数小于Ga2O3的GaN材料做源区,可通过GaN与Ga2O3之间的晶格失配在导电沟道中引入水平方向的张应力,由此改变了导电沟道中氧化镓材料的能带结构,提高了导电沟道中电子的迁移率,使器件具有更大的输出电流。
以下将结合附图及实施例对本发明做进一步详细说明。
附图说明
图1是本发明实施例提供的一种三栅Ga2O3横向MOSFET功率器件的截面示意图;
图2是本发明实施例提供的一种三栅Ga2O3横向MOSFET功率器件的部分俯视图;
图3是本发明实施例提供的一种三栅Ga2O3横向MOSFET功率器件的制备方法流程图。
附图标记说明:
1-Ga2O3衬底;2-Ga2O3外延层;3-P型阱区;4-P型控制区;5-n+型源区;6-沟道区;7-栅极;71-顶栅;72-侧栅;8-源极;9-漏极;10-高k介质层。
具体实施方式
为了进一步阐述本发明为达成预定发明目的所采取的技术手段及功效,以下结合附图及具体实施方式,对依据本发明提出的一种三栅Ga2O3横向MOSFET功率器件及其制备方法进行详细说明。
有关本发明的前述及其他技术内容、特点及功效,在以下配合附图的具体实施方式详细说明中即可清楚地呈现。通过具体实施方式的说明,可对本发明为达成预定目的所采取的技术手段及功效进行更加深入且具体地了解,然而所附附图仅是提供参考与说明之用,并非用来对本发明的技术方案加以限制。
应当说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的物品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的物品或者设备中还存在另外的相同要素。
实施例一
请参见图1和图2,图1是本发明实施例提供的一种三栅Ga2O3横向MOSFET功率器件的截面示意图;图2是本发明实施例提供的一种三栅Ga2O3横向MOSFET功率器件的部分俯视图。该三栅Ga2O3横向MOSFET功率器件包括Ga2O3衬底1、Ga2O3外延层2、两个P型阱区3、P型控制区4、n+型源区5、沟道区6、栅极7、源极8和漏极9。在本实施例中,选取重掺杂N型Ga2O3材料作为衬底,掺杂浓度大于1×1019cm-3。Ga2O3衬底1上开设有衬底凹槽,Ga2O3外延层2设置在所述衬底凹槽中。在本实施例中,Ga2O3外延层2的高度等于所述衬底凹槽的深度,Ga2O3外延层2为N型轻掺,掺杂浓度为1×1014-1×1017cm-3。
进一步地,两个P型阱区3和P型控制区4均设置在Ga2O3外延层2的上表面,且P型控制区4设置在两个P型阱区3之间,两个P型阱区3关于P型控制区4的中轴对称。在本实施例中,P型控制区4的掺杂浓度高于P型阱区3的掺杂浓度,P型阱区3的掺杂浓度从上向下逐渐升高,优选地,P型阱区3的上表面的掺杂浓度为1×1016cm-3-5×1017cm-3,P型阱区3下表面的掺杂浓度为5×1017cm-3-1×1019cm-3。n+型源区5和沟道区6间隔分布在P型阱区3的上表面。在本实施例中,n+型源区5材料厚度小于500nm,掺杂浓度大于1×1019cm-3,材料为GaN、SiC、AlN中的一种或多种。
本实施例的栅极7包括顶栅71和两个侧栅72,两个侧栅72分别设置在沟道区4的两侧,顶栅71设置在沟道区6的上方,顶栅71的两端下表面分别与两个侧栅72的上表面接触,形成倒U型结构。沟道区6通过高k介质层10与顶栅71和两个侧栅72间隔,两个侧栅72的外侧分别设置有高k介质层10以与n+型源区5或Ga2O3外延层2间隔开。换句话说,顶栅71和侧栅72除相互接触的表面之外,其他表面均被高k介质层10包围。
进一步地,顶栅71水平方向上的一端位于n+型源区5的上方,另一端延伸至P型控制区4与P型阱区3之间区域的上方。也就是说,所述倒U型结构设于所述介质槽内,且突出于所述介质槽并延伸至P型控制区4与P型阱区3之间区域的上方。优选地,栅极7的材料为TiN,Ni,Al中的至少一种,高K介质层10的材料为Si3N4、Al2O3、SiO2、HfO2和HfSiO中的一种或多种,高k栅介质层厚度为5-80nm。
需要说明的是,在本实施例中,在两个P型阱区3的上方分别对应设置有n+型源区5、沟道区6、栅极7,且形成的结构关于P型控制区4的中轴对称。
漏极6设置于Ga2O3衬底1的下表面,且漏极6与Ga2O3衬底1之间还包括欧姆接触金属层,本实施例的欧姆接触金属层的制备过程为:在所述Ga2O3衬底的下表面依次沉积1-50nm的碳层和10-500nm的镍层,随后通过退火实现欧姆接触,退火温度为700-950℃。
源极7覆盖于整个器件的上表面且通过高k介质层10与栅极7间隔开。源极和漏极的材料均为Pt、Ti、Al、Ni、Au中的一种或多种。
本实施例的三栅Ga2O3横向MOSFET功率器件采用重掺杂N型Ga2O3作为衬底,Ga2O3可以承受更高的温度,具有较好的热稳定性,可以显著提升器件承受的功率和运行的温度,具有更强的稳定性;另外,与现有的4H-SiC衬底材料相比,Ga2O3的Baliga品质因数是4H-SiC的8倍以上,且制作方法更方便,因此解决了4H-SiC材料制作器件较高经济成本,沟道迁移率低的问题,提高了沟道迁移率,显著降低了器件的功耗。该三栅Ga2O3横向MOSFET功率器件利用高掺杂P型控制区,降低栅氧化物电场并有效降低高漏源电压下的饱和电流密度,提高器件的短路耐受能力,提高器件的可靠性。此外,通过优化***栅电极与位于***栅电极之间的P型控制区之间的间距,降低器件的栅漏电容,降低器件低漏源电压下的导通损耗。
实施例二
在上述实施例的基础上,本实施例提供了一种三栅Ga2O3横向MOSFET功率器件的制备方法。请参见图3,图3是本发明实施例提供的一种三栅Ga2O3横向MOSFET功率器件的制备方法流程图。该制备方法包括:
S1:选取Ga2O3衬底并在所述Ga2O3衬底上形成衬底凹槽。
具体地,选取重掺杂N型Ga2O3材料作为衬底,利用刻蚀工艺在所述Ga2O3衬底上表面形成衬底凹槽,随后对衬底进行清洗,具体地用丙酮、异丙醇溶液分别清洗30-60s,并用去离子水冲洗,最后用高纯氮气吹干。
优选地,Ga2O3衬底的掺杂浓度为1×1016-1×1021cm-3,厚度为200-400μm。
S2:在清洗后的衬底凹槽中生长Ga2O3外延层。
具体地,将清洗后的Ga2O3衬底放入MOCVD(金属有机化学气相沉积)设备中,在TMGa(三甲基镓)流量6.0×10-6mol/min,O2流量2.2×10-2mol/min,温度850℃,压强500Pa的工艺条件下,在衬底凹槽中生长Ga2O3外延层。
在本实施例中,生长的Ga2O3外延层为N型轻掺,掺杂浓度为1×1014-1×1017cm-3,厚度为5-30μm。
随后对含Ga2O3外延层的衬底进行清洗,该步骤中的清洗工艺包括:标准RCA清洗;对Ga2O3外延片进行高温氧化,形成牺牲氧化层,之后对牺牲氧化层进行腐蚀,直至完全去除表面氧化层。
S3:在所述Ga2O3外延层的上表面形成多个P型阱区。
具体地,在清洗后的Ga2O3外延层的上表面两侧采用离子注入方法形成多个P型阱区。形成的P型阱区的掺杂浓度从上向下逐渐升高,在本实施例中,P型阱区上表面的掺杂浓度为1×1016cm-3-5×1017cm-3,P型阱区下表面的掺杂浓度为5×1017cm-3-1×1019cm-3。
S4:在相邻两个P型阱区之间形成P型控制区。
具体地,在相邻两个P阱区之间的Ga2O3外延层上表面采用氮离子注入方法形成P型控制区。
在本实施例中,所述P型控制区的掺杂浓度高于所述P阱区的掺杂浓度,形成高掺杂的控制区。
S5:在所述P型阱区上方生长n+型源区。
具体地,对清洗后的样片进行光刻,在所述P型阱区上方形成源区凹槽,用于后续在该凹槽中形成源区,再放入反应离子刻蚀设备中,在气体流量为Cl2:BCl3=10:10sccm,RF功率为200W,压强为10mTorr的工艺条件下刻蚀除去该区域的Ga2O3,并将刻蚀后的样片放入H2O2:H2SO4=1:3的溶液中清洗1min,并用去离子水冲洗,最后用高纯氮气吹干。
将清洗后的样片放入PECVD(等离子体增强化学的气相沉积法)设备中,在NH3流量为160sccm,SiH4流量为80scccm,压强为800mTorr,射频功率为20W的工艺条件下生长氮化硅掩膜30min;对完成掩膜生长的样片进行光刻,并放入反应离子刻蚀设备中,在气体流量为CH3F:O2=25:40sccm,射频功率位150W,压强为67Pa的工艺条件下进行刻蚀,以除去所述源区的氮化硅掩膜;将刻蚀完成后的样片放入H2O2:H2SO4=1:3的溶液中进行清洗,并用流动的去离子水冲洗,最后用高纯氮气吹干;将清洗后的样片放入MBE(分子束外延)设备中,在NH3流量为50sccm,Si源温度为1240℃,生长腔温度为700℃的工艺条件下生长GaN外延层;将完成外延生长的样片进行光刻,并放入刻蚀设备中在气体流量为CH3F:O2=25:40sccm,射频功率为150W,压强为67Pa的工艺条件下进行刻蚀,以除去氮化硅掩膜;
将刻蚀完成后的样片用温度为90℃的TMAH溶液清洗3min,再用流动去离子水清洗,最后用高纯氮气吹干后进行光刻,形成所述重掺杂源区。
采用化学气相沉积或物理气相沉积方法,在所述外延层上表面形成掩膜层;以所述掩膜层为掩膜,相邻两个P阱区之间通过离子注入方法形成n+型源区;所述步骤中离子注入的离子为N离子,P离子或Al离子。
S6:在所述P型阱区上方形成栅极。
必须说明的是,在P型阱区内形成介质槽,在内部沉积包裹高K介质的栅电极。在本实施例中,采用薄膜沉积技术,在高K介质层之上沉积预设厚度的栅电极,再通过刻蚀的方法***栅电极,其中,栅极的一端位于所述n+型源区之上,另一端位于所述P型控制区与P阱区之间区域的上方,与P型控制区无交叉;随后,在源区除侧栅和顶栅连接处外沉积高k栅介质层。
S7:在所述Ga2O3衬底的下表面沉积欧姆接触金属层,退火形成欧姆接触。
具体地,在所述重掺杂N型Ga2O3衬底的底部沉积低温欧姆接触金属层,退火形成欧姆接触。具体地,依次沉积碳层1-50nm,镍层10-500nm,通过退火实现欧姆接触,其中沉积方法包括化学气相沉积、磁控溅射或者电子束蒸镀,退火温度为700-950℃。需要说明的是,本步骤形成一种欧姆接触的厚漏电极的方法,实际是因为在传统的碳化硅欧姆接触制造工艺中,需要对SiC/Ni结构进行高温的快速退火[~1000℃],而这样高的温度会导致高k栅介质发生结晶,造成漏电电流大等问题。因此,本实施例通过在镍基欧姆接触中引入碳,降低了金属半导体间的肖特基势垒高度,在相对低温的退火条件下实现了欧姆接触的制备。
S8:在所述低温欧姆接触金属层上形成漏极。
具体地,在低温欧姆接触金属层的下表面继续沉积金属,可选的沉积方法为磁控溅射或电子束蒸发。本步骤中的金属为Ti、Al、Ni中的任意一种或其叠层金属,从而在衬底的背面形成厚度为50nm左右的漏电极。
S9:在器件上表面形成源极。
具体地,通过电子束蒸发或溅射等薄膜沉积方法,在整个样片的上方依次淀积镍(Ni)、钛(Ti)、铝(Al)等多层金属,图形化形成源极。
本实施例的三栅Ga2O3横向MOSFET功率器件制备方法采用重掺杂N型Ga2O3作为衬底,Ga2O3可以承受更高的温度,具有较好的热稳定性,可以显著提升器件承受的功率和运行的温度,具有更强的稳定性;通过在镍基欧姆接触中引入碳,降低了金属半导体间的肖特基势垒高度,在相对低温的退火条件下实现了欧姆接触的制备。此外,采用晶格常数小于Ga2O3的GaN材料做源区,可通过GaN与Ga2O3之间的晶格失配在导电沟道中引入水平方向的张应力,由此改变了导电沟道中氧化镓材料的能带结构,提高了导电沟道中电子的迁移率,使器件具有更大的输出电流。
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明,不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说,在不脱离本发明构思的前提下,还可以做出若干简单推演或替换,都应当视为属于本发明的保护范围。
Claims (10)
1.一种三栅Ga2O3横向MOSFET功率器件,其特征在于,包括Ga2O3衬底(1)、Ga2O3外延层(2)、两个P型阱区(3)、P型控制区(4)、n+型源区(5)、沟道区(6)、栅极(7)、源极(8)和漏极(9),其中,
所述Ga2O3衬底(1)上开设有衬底凹槽,所述Ga2O3外延层(2)设置在所述衬底凹槽中;
所述两个P型阱区(3)和P型控制区(4)分别设置在所述Ga2O3外延层(2)的上表面,且所述P型控制区(4)设置在所述两个P型阱区(3)之间,所述n+型源区(5)和所述沟道区(6)间隔分布在所述P型阱区(3)的上表面;
所述栅极(7)包括顶栅(71)和两个侧栅(72),两个侧栅(72)分别设置在所述沟道区(4)的两侧,所述顶栅(71)设置在所述沟道区(6)的上方,所述顶栅(71)的两端下表面分别与两个侧栅(72)的上表面接触,所述沟道区(6)通过高k介质层(10)与所述顶栅(71)和所述两个侧栅(72)间隔,所述两个侧栅(72)的外侧分别设置有所述高k介质层(10)以与所述n+型源区(5)或所述Ga2O3外延层(2)间隔开;
所述漏极(6)设置于所述Ga2O3衬底(1)的下表面,且所述漏极(6)与所述Ga2O3衬底(1)之间还包括欧姆接触金属层,所述源极(7)覆盖于整个器件的上表面且通过所述高k介质层(10)与所述栅极(7)间隔开。
2.根据权利要求1所述的三栅Ga2O3横向MOSFET功率器件,其特征在于,所述顶栅(71)水平方向上的一端位于所述n+型源区(5)的上方,另一端延伸至所述P型控制区(4)与所述P型阱区(3)之间区域的上方。
3.根据权利要求1所述的三栅Ga2O3横向MOSFET功率器件,其特征在于,所述Ga2O3衬底(1)为重掺杂N型Ga2O3衬底,掺杂浓度大于1×1019cm-3。
4.根据权利要求1所述的三栅Ga2O3横向MOSFET功率器件,其特征在于,所述n+型源区(5)的掺杂浓度大于1×1019cm-3。
5.根据权利要求1所述的三栅Ga2O3横向MOSFET功率器件,其特征在于,所述高K介质层(10)的材料为Si3N4、Al2O3、SiO2、HfO2和HfSiO中的一种或多种。
6.根据权利要求1所述的三栅Ga2O3横向MOSFET功率器件,其特征在于,所述P型控制区(4)的掺杂浓度高于所述P型阱区(3)的掺杂浓度。
7.一种三栅Ga2O3横向MOSFET功率器件的制备方法,其特征在于,用于制备权利要求1至6中任一项所述的三栅Ga2O3横向MOSFET功率器件,所述制备方法包括:
S1:选取Ga2O3衬底并在所述Ga2O3衬底上形成衬底凹槽;
S2:在清洗后的衬底凹槽中生长Ga2O3外延层;
S3:在所述Ga2O3外延层的上表面形成多个P型阱区;
S4:在相邻两个P型阱区之间形成P型控制区;
S5:在所述P型阱区上方生长n+型源区;
S6:在所述P型阱区上方形成栅极,所述栅极为由一个顶栅和两个侧栅组成的三栅结构;
S7:在所述Ga2O3衬底的下表面沉积欧姆接触金属层,退火形成欧姆接触;
S8:在所述欧姆接触金属层上形成漏极;
S9:在器件的上表面形成源极。
8.根据权利要求7所述的三栅Ga2O3横向MOSFET功率器件的制备方法,其特征在于,所述S6包括:
S61:在所述P型阱区上且所述n+型源区的内侧形成介质槽;
S62:在所述介质槽内部沉积包裹有高K介质的三栅结构。
9.根据权利要求8所述的三栅Ga2O3横向MOSFET功率器件的制备方法,其特征在于,两个侧栅分别设置在位于所述介质槽中部的沟道区两侧,所述顶栅设置在所述沟道区的上方,所述顶栅的两端下表面分别与两个侧栅的上表面接触,所述沟道区通过高k介质层与所述顶栅和所述两个侧栅间隔,所述两个侧栅的外侧分别设置有所述高k介质层以与所述n+型源区或所述Ga2O3外延层间隔开。
10.根据权利要求7至9中任一项所述的三栅Ga2O3横向MOSFET功率器件的制备方法,其特征在于,所述S7包括:
在所述Ga2O3衬底的下表面依次沉积1-50nm的碳层和10-500nm的镍层,随后通过退火实现欧姆接触,退火温度为700-950℃。
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