CN113452361B - Universal serial bus signal output circuit with reverse current prevention mechanism - Google Patents
Universal serial bus signal output circuit with reverse current prevention mechanism Download PDFInfo
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- 239000003990 capacitor Substances 0.000 description 4
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
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Abstract
A universal serial bus signal output circuit with a reverse current prevention mechanism, comprising: the switching circuit and the first and second voltage pull-down circuits. The switch circuit is conducted when the switch control end receives the first high-state voltage so as to output signals from the signal input end to the signal output end. The first voltage pull-down circuit includes: the passive element high-pass filter circuit and the discharge circuit. The passive element high pass filter circuit couples the output voltage of the signal output to the pull-down control terminal. The discharging circuit is conducted when the voltage of the pull-down control end is larger than a preset level, so that the switch control end is discharged and pulled down to a second high-state voltage. The second voltage pull-down circuit pulls down the switch control terminal to a low state voltage when the output terminal voltage is greater than the reference voltage and there is no surge.
Description
Technical Field
The present invention relates to a universal serial bus transmission technology, and more particularly, to a universal serial bus signal output circuit with a reverse current prevention mechanism and an operation method thereof.
Background
The universal serial bus is a serial port bus standard for connecting a computer system and an external device, and is also a technical specification of an input/output interface. In recent years, the usb specification of Type-C has been attracting attention because of the need to increase the charging speed by a great increase in the transmission speed and an increase in the supported charging power without considering the directivity of the plug.
However, even if the plug is no longer directional, the user may still deviate from the correct docking position of the pins during use, causing the circuitry of the signal output to erroneously touch pins with higher voltages. In such a situation, if there is no fast reaction mechanism, the high voltage will generate a large current flowing backward, causing damage to the signal output circuit or other circuitry associated with the signal output circuit.
Disclosure of Invention
In view of the problems of the prior art, an object of the present invention is to provide a universal serial bus (universal serial bus; USB) signal output circuit with a reverse current (reverse current) prevention mechanism and an operating method thereof, so as to improve the prior art.
The invention aims to provide a universal serial bus signal output circuit with a reverse current prevention mechanism and an operation method thereof, wherein the voltage of a control end of a switch is quickly regulated down to avoid the generation of reverse large current when the voltage of a signal output end rises through the arrangement of a first voltage pull-down circuit, so that a protection mechanism of the switch circuit is provided.
The invention includes a universal serial bus signal output circuit with a reverse current prevention mechanism, one embodiment of which includes: the switching circuit, the first voltage pull-down circuit and the second voltage pull-down circuit. The switch circuit comprises a switch control end, and is configured to be conducted when the switch control end receives the first high-state voltage so as to output signals from the signal input end to the signal output end. The first voltage pull-down circuit includes: the passive element high-pass filter circuit and the discharge circuit. The passive element high pass filter circuit is configured to couple an output voltage of the signal output to the pull-down control terminal. The discharging circuit is configured to be turned on when the voltage of the pull-down control terminal is greater than a preset level, so as to discharge the switch control terminal to pull down to a second high-state voltage smaller than the first high-state voltage. The second voltage pull-down circuit is configured to compare the output terminal voltage with a reference voltage and determine whether the output terminal voltage has a surge, and pull down the switch control terminal to a low state voltage when the output terminal voltage is greater than the reference voltage and has no surge.
The invention also includes a method for operating a universal serial bus signal output circuit with a reverse current prevention mechanism, which is applied to the universal serial bus signal output circuit, and one embodiment of the method comprises the following steps: the switch circuit is conducted when the switch control end receives the first high-state voltage so as to output signals from the signal input end to the signal output end; the passive element high-pass filter circuit of the first voltage pull-down circuit couples the output end voltage of the signal output end to the pull-down control end; the discharging circuit of the first voltage pull-down circuit is conducted when the voltage of the pull-down control end is larger than a preset level, so that the switch control end is discharged and pulled down to a second high-state voltage smaller than the first high-state voltage; the second voltage pull-down circuit compares the output end voltage with the reference voltage and judges whether the output end voltage has a surge or not; and the second voltage pull-down circuit pulls down the switch control terminal to a low state voltage when the output terminal voltage is greater than the reference voltage and no surge exists.
The features, embodiments and effects of the present invention are described in detail below with reference to the preferred embodiments of the present invention as shown in the accompanying drawings.
Drawings
FIG. 1 is a schematic diagram of a universal serial bus signal output circuit with a reverse current prevention mechanism in accordance with one embodiment of the present invention;
FIG. 2 is a waveform diagram showing voltage versus current versus time for a plurality of circuit nodes of a universal serial bus signal output circuit according to one embodiment of the present invention; and
FIG. 3 is a flow chart of a method of operation of a universal serial bus signal output circuit with a reverse current prevention mechanism in accordance with one embodiment of the present invention.
Detailed Description
The invention aims to provide a universal serial bus signal output circuit with a reverse current prevention mechanism and an operation method thereof, wherein the voltage of a control end of a switch is quickly regulated down to avoid the generation of reverse large current when the voltage of a signal output end rises through the arrangement of a first voltage pull-down circuit, so that a protection mechanism of the switch circuit is provided.
Referring to fig. 1, fig. 1 is a schematic diagram of a universal serial bus signal output circuit 100 with a current back-off prevention mechanism according to an embodiment of the present invention.
The usb signal output circuit 100 may be disposed in an electronic device to output, for example, but not limited to, a power signal or a data signal when electrically coupled to an external electronic device. In one embodiment, the universal serial bus is a Type-C specification.
The universal serial bus signal output circuit 100 includes: a switching circuit 110, a first voltage pull-down circuit 120, and a second voltage pull-down circuit 130.
In one embodiment, the switching circuit 110 includes a first N-type transistor MT1 and a second N-type transistor MT2. The gate of the first N-type transistor MT1 is electrically coupled to the switch control terminal SC, and the source is electrically coupled to the signal input terminal SI. The gate of the second N-type transistor MT2 is electrically coupled to the switch control terminal SC, and the source is electrically coupled to the signal output terminal SO. The drains of the first N-type transistor MT1 and the second N-type transistor MT2 are electrically coupled to each other.
In one embodiment, the universal serial bus signal output circuit 100 further includes a switch control circuit 140. The switch control terminal SC receives a control signal CS from the switch control circuit 140 to control the switch circuit 110 to be turned on and off according to the voltage state.
More specifically, when the control signal CS is at the first high voltage, the voltage Vcp of the switch control terminal SC receives the first high voltage, SO as to drive the gates of the first N-type transistor MT1 and the second N-type transistor MT2 to turn on the switch circuit 110, and perform the signal output from the signal input terminal SI to the signal output terminal SO. When the control signal CS is at the low voltage, the voltage Vcp of the switch control terminal SC is at the low voltage, and the gates of the first N-type transistor MT1 and the second N-type transistor MT2 are turned off after receiving the low voltage, so that the switch circuit 110 is turned off.
In one embodiment, the first high state voltage of the control signal CS output may be, for example, but not limited to, 10 volts, and the low state voltage is, for example, but not limited to, 0 volts. The signal input SI may be electrically coupled to a voltage source having an input voltage Vconn of, for example, but not limited to, 5 volts. The output voltage Vcc of the signal output SO will be close to but slightly less than 5 volts through the conduction and voltage drop of the switch circuit 110.
In some cases, the user may cause the signal output terminal SO to touch other pins with high voltage by mistake, which may cause the output terminal voltage Vcc to rise rapidly. In this case, the first voltage pull-down circuit 120 provides a fast response mechanism, so that the conduction degree of the switch circuit 110 is reduced, and the high current flowing backward caused by the rising output voltage Vcc is avoided, which causes the damage of the switch circuit 110.
The second voltage pull-down circuit 130 provides a relatively slow response mechanism for determining whether the rising output voltage Vcc is merely a surge, so as to further turn off the switching circuit 110 if it is determined that the surge is not occurring, or to resume the operation of the switching circuit 110 if it is determined that the surge is occurring.
Fig. 2 is a waveform diagram of voltage and current versus time of a plurality of circuit nodes of the usb signal output circuit 100 according to an embodiment of the present invention.
The structure and operation of the first voltage pull-down circuit 120 and the second voltage pull-down circuit 130 will be described below with reference to fig. 1 and 2.
The first voltage pull-down circuit 120 includes: a passive component high pass filter circuit 150 and a discharge circuit 160.
The passive element high pass filter circuit 150 couples the output voltage Vcc of the signal output SO to the pull-down control terminal PC. In one embodiment, the passive component high pass filter circuit 150 includes a capacitor C1 and a resistor R1. The capacitor C1 is electrically coupled between the signal output terminal SO and the pull-down control terminal PC. The resistor R1 is electrically coupled between the pull-down control terminal PC and the ground terminal GND.
Before the time point T1 of fig. 2, the switching circuit 110 is in a normally operating on state. Thus, the voltage Vcp of the switch control terminal SC is 10 volts of the first high state voltage. The output voltage Vcc of the signal output SO is maintained at about 5 volts. The voltage Vpc at the pull-down control terminal PC is at 0 volts at the low state voltage due to the sustainable discharge of the resistor R1.
At time T1 of fig. 2, the signal output SO generates a false touch condition, resulting in a rapid rise of the output voltage Vcc to, for example, but not limited to, 24 volts. Since the passive element high-pass filter circuit 150 has a fast reaction time, the elevated output voltage Vcc can be quickly coupled to the pull-down control terminal PC at a time almost equivalent to the time point T1.
In one embodiment, the usb signal output circuit 100 may include a diode circuit 170 electrically coupled to the pull-down control terminal PC and the ground terminal GND to limit the voltage of the pull-down control terminal PC to a maximum value, for example, but not limited to, below 5 volts, so as to ensure that the voltage Vpc of the pull-down control terminal PC does not directly receive the excessive voltage, and provide a protection mechanism for the discharge circuit 160 that subsequently receives the voltage Vpc. In various embodiments, the diode circuit 170 may include various numbers of diode elements as needed to achieve different voltage limits.
The discharging circuit 160 is turned on when the voltage Vpc of the pull-down control terminal PC is greater than a preset level to discharge the switch control terminal SC, and pulls down the voltage Vcp to a second high-state voltage smaller than the first high-state voltage. In one embodiment, the discharge circuit 160 includes an N-type transistor M1 and a P-type transistor M2.
The gate of the N-type transistor M1 is electrically coupled to the pull-down control terminal PC, and the source is electrically coupled to the ground terminal GND. The gate of the P-type transistor M2 receives a driving voltage less than the first high-state voltage. In one embodiment, the gate of the P-type transistor M2 may be similarly connected to a voltage source having an input voltage Vconn, such that the driving voltage corresponds to the input voltage Vconn. For ease of illustration, the drive voltage is directly labeled Vconn in FIG. 1.
The drain of the P-type transistor M2 is electrically coupled to the drain of the N-type transistor M1, and the source is electrically coupled to the switch control terminal SC.
Before the time point T1 in fig. 2, the N-type transistor M1 is turned off because the voltage Vpc of the pull-down control terminal PC is a low-state voltage. The source of the P-type transistor M2 receives the voltage Vcp at the switch control terminal SC, which is the first high voltage, and the gate receives the driving voltage, and the voltage difference between the source and the gate makes the P-type transistor M2 be in the on state. However, when the voltage of the drain electrode of the P-type transistor M2 is increased to be equal to the driving voltage due to the turn-off of the N-type transistor M1, the P-type transistor M2 is turned off, so as to ensure that the voltage across the drain electrode and the source electrode of the N-type transistor M1 is not excessively large, thereby avoiding damage.
At time T1 in fig. 2, since the voltage Vpc of the pull-down control terminal PC increases under the coupling of the passive element high-pass filter circuit 150, the N-type transistor M1 is turned on, the voltages of the drains of the N-type transistor M1 and the P-type transistor M2 are further pulled down, the P-type transistor M2 starts to be turned on, the switch control terminal SC is discharged, and the voltage Vcp starts to decrease.
At time T2 in fig. 2, when the voltage Vcp of the switch control terminal SC drops to a level close to the driving voltage received by the gate of the P-type transistor M2 plus the threshold voltage of the P-type transistor M2, the P-type transistor M2 cannot be turned on any more. Therefore, after the P-type transistor M2 is turned off, the voltage Vcp of the switch control terminal SC reaches the second high-state voltage smaller than the first high-state voltage. In one embodiment, the second high-state voltage is about the sum of the driving voltage (e.g., without limitation, 5 volts) and the threshold voltage (e.g., without limitation, 1 volt) of the P-type transistor M2, and is about 6 volts.
By discharging the switch control terminal SC by the above mechanism, the voltage Vcp at the second high-state voltage will greatly decrease the conduction degree of the first N-type transistor MT1 and the second N-type transistor MT2, so as not to generate a large current flowing backward. As shown in fig. 2, the reverse current Icc generated between the switching circuits 110 only generates small spikes between the time point T1 and the time point T2, and then drops to a relatively low level due to the above mechanism.
In one embodiment, the universal serial bus signal output circuit 100 further includes a passive element low pass filter circuit 180. The gate of the P-type transistor M2 is actually receiving the driving voltage through the passive element low-pass filter circuit 180. In one embodiment, the passive element low pass filter circuit 180 includes a resistor R2 and a capacitor C2. The resistor R2 is electrically coupled between the voltage source of the driving voltage and the gate of the P-type transistor M2. The capacitor C2 is electrically coupled between the gate of the P-type transistor M2 and the ground GND.
In this embodiment, since the gate of the P-type transistor M2 is electrically coupled to the voltage source having the input terminal voltage Vconn, when the signal output terminal SO erroneously touches the high voltage, the output terminal voltage Vcc that is momentarily raised may still momentarily rise through the turned-on switching circuit 110. Therefore, the passive component low-pass filter circuit 180 can couple the input terminal voltage Vconn to the gate of the P-type transistor M2 at a slower speed, so as to avoid the damage of the P-type transistor M2.
The second voltage pull-down circuit 130 includes: comparator 190 and pull-down control circuit 195.
At time T3 of fig. 2, the comparator 190 compares the output voltage Vcc with the reference voltage Vref to generate a comparison result CR. Since the comparator 190 is an active circuit with a slower response time, the comparison result CR is generated at time T3 later than the time T1 when the passive component high-pass filter circuit 150 couples the output voltage Vcc to the pull-down control terminal PC.
The pull-down control circuit 195 determines whether the output terminal voltage Vcc is greater than the reference voltage Vref and whether the output terminal voltage Vcc has a surge according to the comparison result CR. In one embodiment, the occurrence of the surge may be set to a condition that the output voltage Vcc exceeds the preset voltage value only within a preset time range.
At time T4 of fig. 2, when the output voltage Vcc is greater than the reference voltage Vref and there is no surge, the pull-down control circuit 195 may pull down the voltage Vcp of the switch control terminal SC to a low state voltage by a mechanism such as, but not limited to, discharging. In one embodiment, the burst elimination interval from the time point T3 at which the comparison result CR is generated to the time point T4 at which the burst judgment is completed is, for example, but not limited to, 20 nanoseconds.
In one embodiment, the pull-down control circuit 195 may also control the switch control circuit 140 to stop outputting the control signal CS having the first high-state voltage by transmitting a signal (not shown), and to switch to output the low-state voltage, thereby further ensuring the switch circuit 110 is turned off.
In one embodiment, pull-down control circuit 195 may include logic circuitry to make the determination and discharge circuitry (not shown) to discharge to implement the operating mechanisms described above. The present invention is not limited to a particular circuit configuration.
When the rising and non-abrupt output voltage Vcc gradually decays with time, the first voltage pull-down circuit 120 turns off the N-type transistor M1 due to the voltage drop of the passive component high-pass filter circuit 150 coupled to the pull-down control terminal PC, further causes the drain voltage of the N-type transistor M1 and the drain voltage of the P-type transistor M2 to rise to turn off the P-type transistor M2, and stops the discharge circuit 160 from conducting. The pull-down control circuit 195 may also determine that the output voltage Vcc is not greater than the reference voltage Vref according to the comparison result CR of the comparator 190, stop pulling down the voltage Vcp of the switch control terminal SC, and control the switch control circuit 140 to output the control signal CS having the first high voltage. The switch circuit 110 will restore the original conduction level and operate normally.
On the other hand, when the output voltage Vcc is greater than the reference voltage Vref and has a surge, the pull-down control circuit 195 may not perform the voltage pull-down mechanism, and may enable the switch control circuit 140 to continuously output the control signal CS having the first high-state voltage. At this time, the first voltage pull-down circuit 120 also stops the conduction of the discharge circuit 160 after the sudden voltage is attenuated, so that the voltage Vcp of the switch control terminal SC is recovered from the second high-state voltage to the first high-state voltage, and the switch circuit 110 is further recovered to the original conduction degree and operates normally.
Therefore, the universal serial bus signal output circuit can quickly respond to the voltage rise of the signal output end by the passive element high-pass filter circuit through the arrangement of the first voltage pull-down circuit, and the discharge circuit is driven to reduce the voltage of the switch control end so as to reduce the conduction degree of the switch circuit and avoid the generation of backflow large current. The second voltage pull-down circuit with slower relative response speed further provides a surge judging mechanism to determine whether to completely turn off the switch circuit. The switching circuit and other circuits associated with the signal input will be protected.
It should be noted that the above circuit structure and voltage values are only examples. In other embodiments, the circuit structure and other voltage values that can be used to achieve the same function can also be used to implement the mechanism for preventing reverse current. The present invention is not limited to the above-described embodiments.
Please refer to fig. 3. FIG. 3 is a flow chart of a method 300 of operation of a universal serial bus signal output circuit with a reverse current prevention mechanism in accordance with one embodiment of the present invention.
In addition to the foregoing, the present invention further discloses a method 300 of operation of a universal serial bus signal output circuit with a reverse current prevention mechanism, for example, but not limited to, the universal serial bus signal output circuit 100 of fig. 1. One embodiment of a universal serial bus signal output circuit operation method 300 is shown in fig. 3, comprising the steps of:
s310: the switch circuit 110 is turned on when the switch control terminal SC receives the first high voltage, SO as to output a signal from the signal input terminal SI to the signal output terminal SO.
S320: the passive element high pass filter circuit 150 of the first voltage pull-down circuit 120 is caused to couple the output terminal voltage Vcc of the signal output terminal SO to the pull-down control terminal PC.
S330: the discharging circuit 160 of the first voltage pull-down circuit 120 is turned on when the voltage Vpc of the pull-down control terminal PC is greater than a predetermined level, so as to discharge the switch control terminal SC to pull down to a second high voltage smaller than the first high voltage.
S340: the second voltage pull-down circuit 130 compares the output voltage Vcc with the reference voltage Vref and determines whether the output voltage Vcc has a surge.
S350: the second voltage pull-down circuit 130 pulls down the switch control terminal SC to a low state voltage when the output terminal voltage Vcc is greater than the reference voltage Vref and has no surge.
S360: the second voltage pull-down circuit 130 does not pull down the switch control terminal SC to the low state voltage when the output terminal voltage Vcc is not greater than the reference voltage Vref or has a surge.
It should be noted that the above embodiments are only examples. In other embodiments, variations may be made by those of ordinary skill in the art without departing from the spirit of the invention.
In summary, the universal serial bus signal output circuit and the operation method thereof in the invention can quickly regulate and reduce the voltage of the switch control end to avoid the generation of large backward current when the voltage of the signal output end rises through setting the first voltage pull-down circuit, thereby providing a protection mechanism of the switch circuit.
Although the embodiments of the present invention have been described above, these embodiments are not intended to limit the present invention, and those skilled in the art may make variations to the technical features of the present invention according to the explicit or implicit disclosure of the present invention, where the variations are possible, the scope of the present invention is defined in the claims of the present invention, in other words, the scope of the present invention is defined in the claims of the present specification.
Description of the reference numerals
100 universal serial bus signal output circuit
110 switch circuit
120 first voltage pull-down circuit
130 second voltage pull-down circuit
140 switch control circuit
150 high-pass filter circuit of passive element
160 discharge circuit
170 diode circuit
180 passive element low-pass filter circuit
190 comparator
195 pull-down control circuit
300 general serial bus signal output circuit operation method
S310-S360 steps
C1 capacitance
C2 capacitance
CR: comparison result
CS control Signal
GND ground terminal
Icc, reverse current
M1:N transistor
M2:P-type transistor
MT1 first N-type transistor
MT2 second N-type transistor
PC (personal computer) pull-down control end
R1 resistance
R2 resistance
SC switch control terminal
SI signal input terminal
SO signal output terminal
Vcc, output terminal voltage
Vconn: input terminal voltage
Vcp voltage
Vpc voltage
Vref, reference voltage
T1 to T4 time points
Claims (10)
1. A universal serial bus signal output circuit with a reverse current prevention mechanism, comprising:
the switching circuit comprises a switch control end and a switching circuit, wherein the switch control end is configured to be conducted when the switch control end receives a first high-state voltage so as to output signals from the signal input end to the signal output end;
a first voltage pull-down circuit comprising:
a passive element high pass filter circuit configured to couple an output voltage of the signal output to a pull-down control terminal; and
a discharging circuit configured to be turned on when the voltage of the pull-down control terminal is greater than a preset level, so as to discharge the switch control terminal to pull down to a second high-state voltage smaller than the first high-state voltage; and
and the second voltage pull-down circuit is configured to compare the output terminal voltage with a reference voltage and judge whether the output terminal voltage has a surge or not, and pull down the switch control terminal to a low-state voltage when the output terminal voltage is larger than the reference voltage and does not have the surge.
2. The universal serial bus signal output circuit according to claim 1, further comprising a diode circuit electrically coupled to the pull-down control terminal and to ground to limit the voltage of the pull-down control terminal to below a maximum value.
3. The universal serial bus signal output circuit according to claim 1, wherein the discharging circuit further comprises:
the N-type transistor comprises a first grid electrode, a first drain electrode and a first source electrode, wherein the first grid electrode is electrically coupled with the pull-down control end, and the first source electrode is electrically coupled with the grounding end; and
the P-type transistor comprises a second grid electrode, a second drain electrode and a second source electrode, wherein the second grid electrode is configured to receive a driving voltage smaller than the first high-state voltage, the second drain electrode is electrically coupled with the first drain electrode, and the second source electrode is electrically coupled with the switch control end.
4. The usb signal output circuit of claim 3, wherein when the N-type transistor is turned on, the P-type transistor is turned on according to a voltage difference between the second source and the second gate to pull the switch control terminal down to the second high voltage.
5. The universal serial bus signal output circuit as recited in claim 3 wherein when said N-type transistor is off and said P-type transistor is on, the voltage at said first drain and said second drain rises to be equal to said driving voltage to turn said P-type transistor off.
6. A universal serial bus signal output circuit as recited in claim 3 wherein said second gate of said P-type transistor receives said drive voltage through a passive element low pass filter circuit.
7. The universal serial bus signal output circuit of claim 1 wherein the second voltage pull-down circuit comprises:
a comparator configured to compare the output terminal voltage with the reference voltage to generate a comparison result; and
and the pull-down control circuit is configured to judge whether the output terminal voltage is larger than the reference voltage and whether the output terminal voltage has the surge according to the comparison result so as to pull down the switch control terminal to the low-state voltage when the output terminal voltage is larger than the reference voltage and does not have the surge.
8. The universal serial bus signal output circuit according to claim 1, wherein the switching circuit comprises:
the first N-type transistor comprises a third grid electrode, a third drain electrode and a third source electrode, wherein the third grid electrode is electrically coupled with the switch control end, and the third source electrode is electrically coupled with the signal input end; and
the second N-type transistor comprises a fourth grid electrode, a fourth drain electrode and a fourth source electrode, wherein the fourth grid electrode is electrically coupled with the switch control end, the fourth drain electrode is electrically coupled with the third drain electrode, and the fourth source electrode is electrically coupled with the signal output end.
9. The universal serial bus signal output circuit of claim 1, further comprising a switch control circuit configured to output the first high-state voltage to the switch control terminal, wherein the second voltage pull-down circuit further causes the control circuit to stop outputting the first high-state voltage when the output terminal voltage is greater than the reference voltage and without the glitch.
10. A universal serial bus signal output circuit operation method with a reverse current prevention mechanism is applied to a universal serial bus signal output circuit, and comprises the following steps:
the switch circuit is conducted when the switch control end receives the first high-state voltage so as to output signals from the signal input end to the signal output end;
the passive element high-pass filter circuit of the first voltage pull-down circuit couples the output end voltage of the signal output end to the pull-down control end;
the discharging circuit of the first voltage pull-down circuit is conducted when the voltage of the pull-down control end is larger than a preset level, so that the switch control end is discharged and pulled down to a second high-state voltage smaller than the first high-state voltage;
the second voltage pull-down circuit is used for comparing the output end voltage with a reference voltage and judging whether the output end voltage has a surge or not; and
and the second voltage pulling-down circuit pulls down the switch control terminal to a low-state voltage when the voltage of the output terminal is larger than the reference voltage and the voltage does not have the sudden wave.
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| CN113452361A (en) | 2021-09-28 |
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