CN105915056A - Boost circuit preventing reverse current - Google Patents
Boost circuit preventing reverse current Download PDFInfo
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- CN105915056A CN105915056A CN201610371490.5A CN201610371490A CN105915056A CN 105915056 A CN105915056 A CN 105915056A CN 201610371490 A CN201610371490 A CN 201610371490A CN 105915056 A CN105915056 A CN 105915056A
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- transistor
- nmos tube
- grid
- pmos
- drain electrode
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention relates to the field of boost, and especially relates to a boost circuit preventing reverse current. The boost circuit has a switching end, an input end, and an output end. The boost circuit comprises a first transistor, a second transistor, an anti-reverse current diode, and a third transistor. The first transistor is coupled between the input end and the output end. Of the second transistor, the drain is connected with the substrate end of the first transistor, the substrate end is connected with the substrate end of the first transistor, the source is connected with the switching end, and a control signal is connected to the gate. The anode of the anti-reverse current diode is connected with the switching end, and the cathode is connected with the substrate end of the first transistor. Of the third transistor, the drain is connected with the substrate end of the first transistor, the substrate end is connected with the substrate end of the first transistor, the source is connected with the output end, and a control signal is connected to the gate.
Description
Technical field
The present invention relates to boosting field, particularly relate to a kind of booster circuit preventing reverse irrigated current.
Background technology
In prior art, voltage up converting circuit (BOOST) typically requires one PMOS of employing
Pipe is connected between the input of circuit and output, if as it is shown in figure 1, using this electricity
Boosting in road, needs to be controlled by substrate terminal Bulk of this transistor PMOS, such as
It is controlled by a substrate control circuit, so that substrate terminal voltage is in input or output
Higher voltage, such as switch terminals SW or output, in Fig. 1, NMOS tube and PMOS
Pipe needs to be driven on or off by one drive circuit.
In Fig. 1, using the voltage up converting circuit that substrate controls after shut down, drive circuit can be controlled
Make the 4th transistor NMOS and the first transistor PMOS to be both off, and substrate control circuit
(Body Control) can control transistor seconds PS1 conducting, and third transistor PS2 turns off,
Then the substrate of PMOS rectifying tube receives switch terminals SW.
As in figure 2 it is shown, under this situation, substrate terminal Bulk of the first transistor PMOS and
Between output, parasitism has a body diode D0.Owing to being booster circuit, show after power is turned off
So output end voltage Vout can be higher than input terminal voltage Vin+0.7V, now has bigger
Reverse irrigated current (tens milliamperes are arrived hundreds of milliampere (mA)), flows through body diode D0 from output
End is flowed into input, and this can seriously reduce voltage up converting circuit efficiency in system is applied.
Summary of the invention
The problem existed for prior art, the invention provides a kind of reverse irrigated current of preventing
Booster circuit, it is possible to improve voltage up converting circuit efficiency in actual applications greatly.
The present invention adopts the following technical scheme that
A kind of booster circuit preventing reverse irrigated current, described booster circuit has switch terminals, input
End and output, described booster circuit includes:
The first transistor, the drain electrode of described the first transistor is connected with described input, and described
The source electrode of one transistor is connected with described output, and the grid of described the first transistor accesses one and makes
Energy signal, described enable signal controls conducting and the cut-off of described the first transistor；
Transistor seconds, the drain electrode of described transistor seconds and the substrate terminal of described the first transistor
Connecting, the substrate terminal of described transistor seconds is connected with the substrate terminal of described the first transistor, institute
The source electrode stating transistor seconds is connected with described switch terminals, and the grid of described transistor seconds accesses
One control signal；
Reverse-filling current diode, anode is connected with described switch terminals, and negative electrode is brilliant with described first
The substrate terminal of body pipe connects；
Third transistor, the drain electrode of described third transistor and the substrate terminal of described the first transistor
Connecting, the substrate terminal of described third transistor is connected with the substrate terminal of described the first transistor, institute
The source electrode stating third transistor is connected with described output, and the grid of described third transistor accesses
One control signal；Wherein,
Described transistor seconds is led according to the control of described control signal with described third transistor
It is logical with cut-off, so that the substrate terminal of described the first transistor is connected to described switch terminals and described defeated
Go out one end that in end, voltage is bigger；And
When the voltage of described output is more than the voltage of described input, described reverse-filling electric current
Diode utilizes its unilateral conduction to stop the electric current of described output to flow into described input.
Preferably, described booster circuit also includes:
Substrate control circuit, respectively with the grid of described transistor seconds, described third transistor
Grid connect, produce described control signal.
Preferably, described booster circuit also includes:
Comparing unit, has the first end, the second end and the 3rd end, and described first end is defeated with described
Entering end to connect, described second end is connected with described output, described 3rd end and described substrate control
Circuit processed connects, and compares voltage and the voltage of described output of described input, produces high electricity
Put down or low level；And
Described substrate control circuit produces described control according to described high level or described low level
Signal.
Preferably, described the first transistor is PMOS, and/or described transistor seconds is
PMOS, and/or described third transistor is PMOS.
Preferably, the drain electrode of described the first transistor is connected with described input by an inductance.
Preferably, between described output and an earth terminal, lotus root is connected to an output capacitance.
Preferably, between described switch terminals and an earth terminal, lotus root is connected to one the 4th transistor, and
Described 4th transistor is NMOS tube.
Preferably, described booster circuit also includes:
Drive circuit, respectively with the grid of described the first transistor, the grid of described 4th transistor
Pole connects, and produces and enables signal；And
Described the first transistor and described 4th transistor are according to making that described drive circuit produces
Can signal conduction and cut-off.
Preferably, described comparing unit includes:
First PMOS, the drain electrode of described first PMOS is connected with described first end,
The source electrode of described first PMOS is connected with the grid of described first PMOS；
Second PMOS, the grid of described second PMOS and a described PMOS
The grid of pipe connects, and the drain electrode of described second PMOS is connected with described second end, described
The source electrode of the second PMOS is by a not gate and described three-terminal link.
Preferably, described comparing unit also includes:
First NMOS tube, the source electrode of described first NMOS tube is by a resistance and described the
One end connects, and the grid of described first NMOS tube is connected with described second end；
Second NMOS tube, the source electrode of described NMOS tube and described first NMOS tube
Drain electrode connects, and the grid of described second NMOS tube connects with the source electrode of described second NMOS tube
Connect；
3rd NMOS tube, the source electrode of described 3rd NMOS tube and a described PMOS
The source electrode of pipe connects, the grid of described 3rd NMOS tube and the grid of described second NMOS tube
Pole connects, and the drain electrode of described 3rd NMOS tube is connected with the drain electrode of described second NMOS tube；
4th NMOS tube, the grid of described 4th NMOS tube and described 3rd NMOS
The grid of pipe connects, the source electrode of described 4th NMOS tube respectively with described second PMOS
Source electrode connect, the drain electrode of described 4th NMOS tube respectively with described 3rd NMOS tube
Drain electrode, the drain electrode of described second NMOS tube connect；
5th NMOS tube, the source electrode of described 5th NMOS tube is respectively with described second
The drain electrode of NMOS tube, the drain electrode of described 3rd NMOS tube, described 4th NMOS tube
Drain electrode connect, the grounded drain of described 5th NMOS tube；And
Described enable signal accesses the grid of described 5th NMOS tube by a not gate.
The invention has the beneficial effects as follows:
The present invention compares the value of input voltage and output voltage by increasing by a comparing unit, thus
Produce control signal and control conducting and the cut-off of second, third transistor, and with the second crystal
The reverse-filling current diode that pipe connects, utilizes the unilateral conduction of reverse-filling current diode to prevent
Only reverse irrigated current flows to input, and the circuit design of the present invention is relatively simple, it is simple to implement, and
And voltage up converting circuit efficiency in the application can greatly be improved.
Accompanying drawing explanation
The detailed description with reference to the following drawings, non-limiting example made by reading, this
Bright and feature, profile and advantage will become more apparent.Mark identical in whole accompanying drawings
The part that note instruction is identical.Can not be drawn to scale accompanying drawing, it is preferred that emphasis is this is shown
Bright purport.
Fig. 1-Fig. 2 is the connection diagram of prior art voltage up converting circuit；
Fig. 3 is the connection diagram of present invention voltage up converting circuit based on comparing unit；
Fig. 4 is the circuit theory diagrams of comparing unit of the present invention；
Fig. 5 is a kind of circuit connection diagram preventing reverse irrigated current of the present invention.
Detailed description of the invention
It should be noted that in the case of not conflicting, following technical proposals, technical characteristic it
Between can be mutually combined.
Under some low-power consumption modes (Low Power Mode) are applied, it may appear that output arrives
The reverse irrigated current of input, such as: require boosting after shut down, output voltage must slowly under
Fall, does not the most allow to exist by the repid discharge path of output end vo ut to ground.So in shutdown
In rear long period of time (several milliseconds are arrived hundreds of millisecond), the voltage Vout of output can height
In the voltage Vin+0.7V of input, this can cause output to occur bigger to input
Reverse irrigated current, until output end voltage Vout drops below input terminal voltage
Vin+0.7V。
In some portable use, system requirements voltage up converting circuit and charge pump replace to hand
The display chip of machine powers to improve the efficiency of whole system, as used when supply voltage is higher
Voltage up converting circuit is powered and is turned off charge pump；(the output end voltage when supply voltage is relatively low
Vout still can be more than input terminal voltage Vin+0.7V) charge pump can be used to power and turn off liter
Voltage conversion circuit, this time, the output of voltage up converting circuit also there will be bigger to input
Reverse irrigated current.
The present invention is further illustrated with specific embodiment below in conjunction with the accompanying drawings, but not
Restriction as the present invention.
For the problems referred to above, present embodiments provide a kind of boost conversion electricity preventing reverse irrigated current
Road (can be referred to as booster circuit), as it is shown on figure 3, the boost conversion electricity in the present embodiment
Road includes the first inductance L0, output capacitance Cout, the first transistor PMOS, the second crystal
Pipe PS1, third transistor PS2 and the 4th transistor NMOS.First inductance L0, couples
Between input VIN and switch terminals SW, output capacitance Cout is coupled to output
Between VOUT and earth terminal GND, the 4th transistor NMOS, it is coupled to and switch terminals
Between SW and earth terminal GND.Transistor seconds PS1 and third transistor PS2, be
PMOS transistor, coupled in series is between switch terminals SW and output VOUT, wherein,
The substrate of transistor seconds PS1 is coupled to substrate terminal Bulk.
Concrete, the drain electrode of transistor seconds PS1 is connected with substrate terminal Bulk, the second crystal
The source electrode of pipe PS1 is connected with switch terminals SW, the drain electrode of third transistor PS2 and substrate terminal
Bulk end connects, and the source electrode of third transistor PS2 is connected with output VOUT, and second is brilliant
Body pipe PS1 is connected with grid and a substrate control circuit of third transistor PS2, this substrate
Specific works process the present embodiment of control circuit will be described in detail later.
As it is shown in figure 5, in the present embodiment, the reverse-filling current diode of transistor seconds PS1
The negative electrode of D1 (being called for short diode D1) is coupled to substrate terminal Bulk, and anode is coupled to switch terminals
SW；The substrate of third transistor PS2 is coupled to substrate terminal Bulk, and uses in prior art
Technical scheme be: as in figure 2 it is shown, the negative electrode of diode D0 is coupled to substrate terminal Bulk,
Anode is coupled to output VOUT, uses this connected mode to prevent after power is turned off
Only reverse irrigated current, due to the unilateral conduction of diode, electric current is still able to from output
VOUT is stayed into input VIN's by diode D0.
In the present embodiment, the input VIN and output VOUT of this voltage up converting circuit it
Between also lotus root be connected to a first transistor PMOS, the drain electrode lotus root of the first transistor PMOS is connected to
Switch terminals SW, the source electrode lotus root of the first transistor PMOS is connected to output VOUT, needs
Illustrate be the first transistor PMOS and the 4th transistor NMOS grid all with a driving
Circuit (Driver Circuit) connects, and drive circuit produces and enables signal, brilliant to control first
Body pipe PMOS and the conducting of the 4th transistor NMOS and cut-off.
Voltage up converting circuit does not enables or during power-off, and drive circuit produces and enables signal and drive the
One transistor PMOS and the 4th transistor NMOS turns off, and switch terminals voltage VSW is less than
Diode (reverse-filling electric current two pole that output end voltage Vout, transistor seconds PS1 are in parallel
Pipe) D1 is due to its unilateral conduction, it is possible to stop output VOUT to switch terminals SW
Electric current.
Booster circuit shown in Fig. 3 farther includes comparing unit DLP, have the first end,
Second end and the 3rd end (DLP-OUT), its first end receives output end voltage VREF,
Its second end is coupled to input Vout, and the second end is for receiving the input electricity of input Vout
Pressure VOUT, its 3rd end is coupled to substrate control circuit.In one embodiment, permissible
Use input voltage VIN as reference signal VREF.In other embodiments, can be by
Input voltage VIN (such as VIN+1.6V) after adding or reducing certain imbalance VOS is joined
It is set to reference signal VREF.
In one embodiment of the present of invention, comparing unit DLP can be comparator, comparator
There is the first end and the second end, the 3rd end, as it has been described above, its first end receives reference signal
VREF, its second end is coupled to output, and the 3rd end is connected with substrate control circuit.Substrate
Control circuit, has input and output, and its input is coupled to the output of comparator,
Its output is respectively coupled to the grid of transistor seconds PS1 and third transistor PS2, lining
End control circuit can access input voltage vin and output voltage Vout is substrate control circuit
Power supply.
In one embodiment, after booster circuit shuts down, drive circuit does not drive the first crystalline substance
Body pipe PMOS and the 4th transistor NMOS enables, the first transistor PMOS and the 4th
Transistor NMOS is off state, and comparing unit starts detecting and compares output electricity
Pressure VOUT and input terminal voltage VIN, such as, is less than when detecting output voltage VO U
During 1.6V, the threshold voltage V of the first transistor PMOSTH+ the first transistor PMOS grid
Voltage Vgs=0.6V+1V=1.6V between pole and source electrode, the 4th transistor NMOS cut
Only, transistor seconds PS1 and third transistor PS2 are turned off, the liter piezoelectricity of the present embodiment
Postboost reverse irrigated current is not affected by road.
Turn on if the value of output voltage VO UT is more than 1.6V, the 4th transistor N1, if defeated
Go out voltage VOU less than input voltage VIN, comparing unit output high level, substrate control electricity
Road controls transistor seconds PS1 conducting, third transistor according to the high level that comparing unit exports
PS2 ends, and the substrate terminal of PMOS can be connected to switch terminals SW；Otherwise, if output voltage
VOU be more than input voltage VIN, comparing unit output low level, substrate control circuit according to
The low level of comparing unit output produces control signal, controls transistor seconds PS1 cut-off, the
Three transistor PS2 conductings, the substrate terminal of the first transistor PMOS is connected to output end vo ut,
As it is shown in figure 5, diode D1 is in reverse-bias state, reverse irrigated current will not be from output
Flow into input.The circuit of the present embodiment is simple, it is simple to realize.
Fig. 4 is the circuit connection diagram of the present embodiment comparing unit DLP, in the present embodiment, than
Relatively cells D LP includes the first PMOS P1, the second PMOS P2, a NMOS
Pipe N1, the second NMOS tube N2, the 3rd NMOS tube N3, the 4th NMOS tube N4,
5th NMOS tube N5, wherein, the drain electrode of the first PMOS P1 is connected with input voltage,
The drain electrode of the second PMOS P2 is connected with output voltage, the first PMOS P1 and second
The grid of PMOS P2 connects, and the grid of the first PMOS P1 is connected to first
On the source electrode of PMOS P1, output end vo ut also with the grid of the first NMOS tube N1
Connect, be connected between the source electrode of the first NMOS tube N1 with input Vin and have a resistance R0.
The drain electrode of the first NMOS tube N1 is connected with the source electrode of the second NMOS tube N2, and
And second NMOS tube N2 grid and the second NMOS tube N2 source electrode connect, the 3rd
The grid of NMOS tube N3 and the grid of the second NMOS tube N2 connect, and the 3rd
The grid of NMOS tube N3 also grid with the 4th NMOS tube N4 is connected, the 3rd NMOS
The source electrode of pipe N3 and the source electrode of the first PMOS P1 connect, the 3rd NMOS tube N3
Drain electrode be connected with the drain electrode of the second NMOS tube N2.
Further, the source electrode of the second NMOS tube N2 and the leakage of the second NMOS tube N2
Pole (drain electrode of the 3rd NMOS tube N3) connects, and the drain electrode of the 5th NMOS tube N5 connects
Ground, additionally, one enables the signal grid connection by a not gate and the 5th NMOS tube N5,
When booster circuit is in off-mode, enabling signal is 0, and the 5th NMOS tube N5 is in
Conducting state.
The drain electrode of the 4th NMOS tube N4 is connected with the source electrode of the 5th NMOS tube N5, the
The source electrode (source electrode of the 2nd PMOS) of four NMOS tube N4 passes through a not gate and compares list
The output of unit DLP connects.
Further, in order to control booster circuit quiescent current under low-power consumption mode, permissible
The resistance value of resistance R0 is done greatly, so that the quiescent current of comparing unit DLP is less than 1uA.
In sum, the present invention compares input voltage and output voltage by increasing by a comparing unit
Value, thus produce control signal and control conducting and the cut-off of second, third transistor, and
A diode in parallel on transistor seconds, utilizes the unilateral conduction going back diode to prevent from pouring in down a chimney
Current direction input, the circuit design of the present invention is relatively simple, it is simple to implement, and can
Improve voltage up converting circuit efficiency in the application greatly.
Above presently preferred embodiments of the present invention is described.It is to be appreciated that the present invention
Being not limited to above-mentioned particular implementation, the equipment and the structure that do not describe in detail the most to the greatest extent should
It is interpreted as being practiced with the common mode in this area；Any it is familiar with those skilled in the art
Member, without departing under technical solution of the present invention ambit, the method that all may utilize the disclosure above
With technology contents, technical solution of the present invention made many possible variations and modification, or be revised as
The Equivalent embodiments of equivalent variations, this has no effect on the flesh and blood of the present invention.Therefore, every
Without departing from the content of technical solution of the present invention, the technical spirit of the foundation present invention is to above example
Any simple modification, equivalent variations and the modification done, all still falls within technical solution of the present invention and protects
In the range of protecting.
Claims (10)
1. the booster circuit preventing reverse irrigated current, it is characterised in that described booster circuit
Having switch terminals, input and output, described booster circuit includes:
The first transistor, the drain electrode of described the first transistor is connected with described input, and described
The source electrode of one transistor is connected with described output, and the grid of described the first transistor accesses one and makes
Energy signal, described enable signal controls conducting and the cut-off of described the first transistor；
Transistor seconds, the drain electrode of described transistor seconds and the substrate terminal of described the first transistor
Connecting, the substrate terminal of described transistor seconds is connected with the substrate terminal of described the first transistor, institute
The source electrode stating transistor seconds is connected with described switch terminals, and the grid of described transistor seconds accesses
One control signal；
Reverse-filling current diode, anode is connected with described switch terminals, and negative electrode is brilliant with described first
The substrate terminal of body pipe connects；
Third transistor, the drain electrode of described third transistor and the substrate terminal of described the first transistor
Connecting, the substrate terminal of described third transistor is connected with the substrate terminal of described the first transistor, institute
The source electrode stating third transistor is connected with described output, and the grid of described third transistor accesses
One control signal；Wherein,
Described transistor seconds is led according to the control of described control signal with described third transistor
It is logical with cut-off, so that the substrate terminal of described the first transistor is connected to described switch terminals and described defeated
Go out one end that in end, voltage is bigger；And
When the voltage of described output is more than the voltage of described input, described reverse-filling electric current
Diode utilizes its unilateral conduction to stop the electric current of described output to flow into described input.
The booster circuit preventing reverse irrigated current the most according to claim 1, its feature exists
In, described booster circuit also includes:
Substrate control circuit, respectively with the grid of described transistor seconds, described third transistor
Grid connect, produce described control signal.
The booster circuit preventing reverse irrigated current the most according to claim 2, its feature exists
In, described booster circuit also includes:
Comparing unit, has the first end, the second end and the 3rd end, and described first end is defeated with described
Entering end to connect, described second end is connected with described output, described 3rd end and described substrate control
Circuit processed connects, and compares voltage and the voltage of described output of described input, produces high electricity
Put down or low level；And
Described substrate control circuit produces described control according to described high level or described low level
Signal.
The booster circuit preventing reverse irrigated current the most according to claim 1, its feature exists
In, described the first transistor is PMOS, and/or described transistor seconds is PMOS
Manage, and/or described third transistor is PMOS.
The booster circuit preventing reverse irrigated current the most according to claim 1, its feature exists
In, the drain electrode of described the first transistor is connected with described input by an inductance.
The booster circuit preventing reverse irrigated current the most according to claim 1, its feature exists
In, between described output and an earth terminal, lotus root is connected to an output capacitance.
The booster circuit preventing reverse irrigated current the most according to claim 1, its feature exists
In, between described switch terminals and an earth terminal, lotus root is connected to one the 4th transistor, and
Described 4th transistor is NMOS tube.
The booster circuit preventing reverse irrigated current the most according to claim 7, its feature exists
In, described booster circuit also includes:
Drive circuit, respectively with the grid of described the first transistor, the grid of described 4th transistor
Pole connects, and produces and enables signal；And
Described the first transistor and described 4th transistor are according to making that described drive circuit produces
Can signal conduction and cut-off.
The booster circuit preventing reverse irrigated current the most according to claim 3, its feature exists
In, described comparing unit includes:
First PMOS, the drain electrode of described first PMOS is connected with described first end,
The source electrode of described first PMOS is connected with the grid of described first PMOS；
Second PMOS, the grid of described second PMOS and a described PMOS
The grid of pipe connects, and the drain electrode of described second PMOS is connected with described second end, described
The source electrode of the second PMOS is by a not gate and described three-terminal link.
The booster circuit preventing reverse irrigated current the most according to claim 9, its feature exists
In, described comparing unit also includes:
First NMOS tube, the source electrode of described first NMOS tube is by a resistance and described the
One end connects, and the grid of described first NMOS tube is connected with described second end；
Second NMOS tube, the source electrode of described NMOS tube and described first NMOS tube
Drain electrode connects, and the grid of described second NMOS tube connects with the source electrode of described second NMOS tube
Connect；
3rd NMOS tube, the source electrode of described 3rd NMOS tube and a described PMOS
The source electrode of pipe connects, the grid of described 3rd NMOS tube and the grid of described second NMOS tube
Pole connects, and the drain electrode of described 3rd NMOS tube is connected with the drain electrode of described second NMOS tube；
4th NMOS tube, the grid of described 4th NMOS tube and described 3rd NMOS
The grid of pipe connects, the source electrode of described 4th NMOS tube respectively with described second PMOS
Source electrode connect, the drain electrode of described 4th NMOS tube respectively with described 3rd NMOS tube
Drain electrode, the drain electrode of described second NMOS tube connect；
5th NMOS tube, the source electrode of described 5th NMOS tube is respectively with described second
The drain electrode of NMOS tube, the drain electrode of described 3rd NMOS tube, described 4th NMOS tube
Drain electrode connect, the grounded drain of described 5th NMOS tube；And
Described enable signal accesses the grid of described 5th NMOS tube by a not gate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610371490.5A CN105915056A (en) | 2016-05-30 | 2016-05-30 | Boost circuit preventing reverse current |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610371490.5A CN105915056A (en) | 2016-05-30 | 2016-05-30 | Boost circuit preventing reverse current |
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| CN109193922A (en) * | 2018-10-23 | 2019-01-11 | 中国船舶重工集团公司第七0五研究所 | A kind of power supply circuit for preventing redundant power output from flowing backward |
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| CN111682869A (en) * | 2020-07-03 | 2020-09-18 | 上海艾为电子技术股份有限公司 | Load switch and electronic equipment of anti-backflow current |
| CN113014094A (en) * | 2019-12-20 | 2021-06-22 | 圣邦微电子（北京）股份有限公司 | Boost converter |
| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
| CN114520532A (en) * | 2022-03-02 | 2022-05-20 | 上海迈相电源技术有限公司 | Charger capable of preventing current from flowing backwards |
| CN115641905A (en) * | 2022-12-19 | 2023-01-24 | 合肥康芯威存储技术有限公司 | Power failure testing device and method for data storage chip |
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| CN107800280A (en) * | 2017-12-12 | 2018-03-13 | 上海贝岭股份有限公司 | The drive circuit of power switch |
| CN107800280B (en) * | 2017-12-12 | 2019-08-30 | 上海贝岭股份有限公司 | The driving circuit of power switch |
| CN108134367A (en) * | 2017-12-27 | 2018-06-08 | 湘潭芯力特电子科技有限公司 | One kind prevents leakage circuit after chip power-down |
| CN109193922A (en) * | 2018-10-23 | 2019-01-11 | 中国船舶重工集团公司第七0五研究所 | A kind of power supply circuit for preventing redundant power output from flowing backward |
| CN110098830A (en) * | 2019-05-17 | 2019-08-06 | 上海艾为电子技术股份有限公司 | A kind of the substrate switching circuit and level shifting circuit of transistor |
| CN110098830B (en) * | 2019-05-17 | 2023-06-13 | 上海艾为电子技术股份有限公司 | Substrate switching circuit and level conversion circuit of transistor |
| CN113014094A (en) * | 2019-12-20 | 2021-06-22 | 圣邦微电子（北京）股份有限公司 | Boost converter |
| CN113014094B (en) * | 2019-12-20 | 2022-07-12 | 圣邦微电子（北京）股份有限公司 | Boost converter |
| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
| CN113452361B (en) * | 2020-03-27 | 2024-04-05 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse current prevention mechanism |
| CN111682869A (en) * | 2020-07-03 | 2020-09-18 | 上海艾为电子技术股份有限公司 | Load switch and electronic equipment of anti-backflow current |
| CN111682869B (en) * | 2020-07-03 | 2024-02-09 | 上海艾为电子技术股份有限公司 | Anti-backflow current load switch and electronic equipment |
| CN114520532A (en) * | 2022-03-02 | 2022-05-20 | 上海迈相电源技术有限公司 | Charger capable of preventing current from flowing backwards |
| CN115641905A (en) * | 2022-12-19 | 2023-01-24 | 合肥康芯威存储技术有限公司 | Power failure testing device and method for data storage chip |
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Application publication date: 20160831 |