CN207074996U - Interface circuit and electronic equipment - Google Patents
Interface circuit and electronic equipment Download PDFInfo
- Publication number
- CN207074996U CN207074996U CN201720415824.4U CN201720415824U CN207074996U CN 207074996 U CN207074996 U CN 207074996U CN 201720415824 U CN201720415824 U CN 201720415824U CN 207074996 U CN207074996 U CN 207074996U
- Authority
- CN
- China
- Prior art keywords
- circuit
- terminal
- transistor
- resistor
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn - After Issue
Links
- 238000001514 detection method Methods 0.000 claims description 50
- 230000003071 parasitic effect Effects 0.000 description 6
- 230000002159 abnormal effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008094 contradictory effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
Landscapes
- Direct Current Feeding And Distribution (AREA)
Abstract
The utility model discloses a kind of interface circuit and electronic equipment, wherein, interface circuit includes power input, access identification circuit, voltage detecting circuit, on-off circuit, control circuit and power output end, power input, access the input of identification circuit, the input interconnection of the input and on-off circuit of voltage detecting circuit, first test side of the output end and control circuit that access identification circuit connects, the output end of voltage detecting circuit and the second test side of control circuit connect, the controlled end of on-off circuit and the control terminal of control circuit connect, the output end of on-off circuit is connected with power output end；Here, control circuit, during for the supply voltage size that is inputted in power input within a preset range, controlling switch circuit is opened, and the supply voltage of external power source input is exported.Technical solutions of the utility model have the characteristics of reliability is high.
Description
Technical Field
The utility model relates to an electronic equipment technical field, in particular to interface circuit and electronic equipment.
Background
The interface circuit is a channel for inputting the external power into the electronic equipment.
The input and the output of the existing interface circuit are directly communicated, when an abnormal power supply is accessed, the power supply overvoltage or undervoltage of electronic equipment is easily caused, and the reliability is poor.
SUMMERY OF THE UTILITY MODEL
The main object of the present invention is to provide an interface circuit, which is intended to improve the reliability of the interface circuit.
In order to achieve the above object, the present invention provides an interface circuit including a power input terminal, an access identification circuit, a voltage detection circuit, a switch circuit, a control circuit and a power output terminal, wherein the power input terminal, the input terminal of the access identification circuit, the input terminal of the voltage detection circuit and the input terminal of the switch circuit are interconnected, the output terminal of the access identification circuit is connected to the first detection terminal of the control circuit, the output terminal of the voltage detection circuit is connected to the second detection terminal of the control circuit, the controlled terminal of the switch circuit is connected to the control terminal of the control circuit, and the output terminal of the switch circuit is connected to the power output terminal; the access identification circuit is used for identifying whether an external power supply is input at the power supply input end; the voltage detection circuit is used for detecting the magnitude of the power supply voltage input by the power supply input end; and the control circuit is used for controlling the switch circuit to be switched on when the power supply voltage input by the power supply input end is within a preset voltage range, and outputting the power supply voltage input by the power supply input end.
Preferably, the access identification circuit includes a first resistor, a second resistor, a first transistor and a first power supply, a controlled end of the first transistor is connected to a second end of the first resistor, and a first end of the second resistor is an input end of the access identification circuit; the input end of the first transistor is connected with the second end of the second resistor, the connection node of the first transistor is the output end of the access identification circuit, the first end of the second resistor is connected with the first power supply, and the output end of the first transistor is grounded.
Preferably, the first transistor is an NPN transistor, a base of the NPN transistor is a controlled terminal of the first transistor, a collector of the NPN transistor is an input terminal of the first transistor, and an emitter of the NPN transistor is an output terminal of the first transistor.
Preferably, the voltage detection circuit includes a third resistor and a fourth resistor, a first end of the third resistor is an input end of the voltage detection circuit, a second end of the third resistor is connected to a first end of the fourth resistor, a connection node thereof is an output end of the voltage detection circuit, and a second end of the fourth resistor is grounded.
Preferably, the voltage switch circuit includes a fifth resistor, a sixth resistor, a seventh resistor, a second transistor, a first P-MOS transistor and a second P-MOS transistor, a first end of the fifth resistor, a first end of the seventh resistor and a drain of the first P-MOS transistor are interconnected, a connection node of the fifth resistor and the drain of the first P-MOS transistor is an input end of the switch circuit, a second end of the fifth resistor and a first end of the sixth resistor are connected, a connection node of the fifth resistor and a controlled end of the switch circuit is a controlled end of the switch circuit, a second end of the sixth resistor and a controlled end of the second transistor are connected, an output end of the second transistor is grounded, an input end of the second transistor, a second end of the seventh resistor, a gate of the first P-MOS transistor and a gate of the second P-MOS transistor are interconnected, a source of the first P-MOS transistor and a source of the second P-MOS transistor are connected, and the drain electrode of the second P-MOS tube is the output end of the switch circuit.
Preferably, the second transistor is an NPN type triode, a base of the NPN type triode is a controlled terminal of the second transistor, a collector of the NPN type triode is an input terminal of the second transistor, and an emitter of the NPN type triode is an output terminal of the second transistor.
Preferably, the control circuit includes a control chip, a first detection pin of the control chip is a first detection end of the control circuit, a second detection pin of the control chip is a second detection end of the control circuit, and a control pin of the control chip is a control end of the control circuit.
Preferably, the control circuit has an upper limit reference voltage limiting sub-circuit and a lower limit reference voltage limiting sub-circuit, and when the power supply voltage input at the power supply input terminal is between the reference voltage value of the upper limit reference voltage limiting sub-circuit and the reference voltage value of the lower limit reference voltage limiting sub-circuit, the control circuit controls the switch circuit to be turned on to output the power supply voltage input at the power supply input terminal.
The utility model also provides an electronic equipment, this electronic equipment include as above interface circuit, here, interface circuit includes power input end, inserts recognition circuit, voltage detection circuit, switch circuit, control circuit and power output end, power input end, the input that inserts recognition circuit, voltage detection circuit's input and switch circuit's input interconnect, the output that inserts recognition circuit with control circuit's first detection end is connected, voltage detection circuit's output with control circuit's second detection end is connected, switch circuit's controlled end with control circuit's control end is connected, switch circuit's output with the power output end is connected; the access identification circuit is used for identifying whether an external power supply is input at the power supply input end; the voltage detection circuit is used for detecting the magnitude of the power supply voltage input by the power supply input end; and the control circuit is used for controlling the switch circuit to be switched on when the power supply voltage input by the power supply input end is within a preset voltage range, and outputting the power supply voltage input by the power supply input end.
Preferably, the electronic device is an electric toothbrush.
The utility model discloses technical scheme is through adopting whether there is the external power source input to insert identification circuit discernment power input end, and voltage detection circuit detects the mains voltage size of power input, and control circuit is when predetermineeing the voltage range at the mains voltage size of power input, and control switch circuit opens, with the mains voltage output of power input. The interface circuit outputs the power supply voltage input to the power supply input end to the electronic equipment only when a normal power supply is input, so that the power supply overvoltage or undervoltage of the electronic equipment is avoided. Compared with the prior art, the utility model discloses technical scheme has the characteristics that the reliability is high.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
Fig. 1 is a schematic diagram of functional modules of an embodiment of the interface circuit of the present invention;
fig. 2 is a schematic circuit diagram of another embodiment of the interface circuit of the present invention.
The reference numbers illustrate:
the objects, features and advantages of the present invention will be further described with reference to the accompanying drawings.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
It should be noted that the description relating to "first", "second", etc. in the present invention is for descriptive purposes only and is not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In addition, the technical solutions in the embodiments may be combined with each other, but it must be based on the realization of those skilled in the art, and when the technical solutions are contradictory or cannot be realized, the combination of the technical solutions should not be considered to exist, and is not within the protection scope of the present invention.
The utility model provides an interface circuit. The interface circuit has the following functions:
(1) before receiving the external power supply, the power supply loop of the electronic equipment can be turned off, so that the electronic equipment is prevented from electric leakage.
(2) When receiving an external power supply, it is possible to determine whether the input power supply voltage is valid.
(3) Under the condition of ensuring that the input power supply voltage is effective, the power supply voltage is output to the electronic equipment to supply power to the electronic equipment.
(4) After the external power supply is disconnected, the power supply loop of the electronic equipment can be turned off, so that the electronic equipment is prevented from electric leakage.
Specifically, referring to fig. 1, in an embodiment, the interface circuit includes a power input terminal DCIN, an access identification circuit 10, a voltage detection circuit 20, a switch circuit 30, a control circuit 40, and a power output terminal VCC, where the power input terminal DCIN, the input terminal of the access identification circuit 10, the input terminal of the voltage detection circuit 20, and the input terminal of the switch circuit 30 are interconnected, an output terminal of the access identification circuit 10 is connected to a first detection terminal of the control circuit 40, an output terminal of the voltage detection circuit 20 is connected to a second detection terminal of the control circuit 40, a controlled terminal of the switch circuit 30 is connected to a control terminal of the control circuit 40, and an output terminal of the switch circuit 30 is connected to the power output terminal VCC.
The access identification circuit 10 is used for identifying whether an external power supply is input to the power supply input terminal DCIN; the voltage detection circuit 20 is used for detecting the magnitude of the power supply voltage input by the power supply input end DCIN; and the control circuit 40 is configured to control the switch circuit 30 to be turned on when the magnitude of the power voltage input by the power input terminal DCIN is within a preset voltage range, so as to output the power voltage input by the power input terminal DCIN.
In this embodiment, the control circuit 40 controls the power voltage to be output through the switch circuit 30 only when the power voltage input from the power input terminal DCIN is within the predetermined voltage range. Therefore, the interface circuit can effectively prevent abnormal power supply from being input into the electronic equipment, so that the electronic equipment is prevented from working under overvoltage or undervoltage. Compared with the prior art, the utility model discloses technical scheme has the characteristics that the reliability is high.
It should be noted that, in the present embodiment, the preset voltage range may be increased by five percent or decreased by five percent based on the rated operating voltage of the electronic device. For example, if the rated operating voltage of an electronic device is 5V, the corresponding preset voltage range is all voltages between 4.75V and 5.25V. Or, the rated operating voltage of an electronic device is 10V, and the corresponding preset voltage range is all voltages between 9.5V and 10.5V.
Based on the above, referring to fig. 2, in another embodiment:
optionally, the access identification circuit 10 includes a first resistor R1, a second resistor R2, a first transistor Q1 and a first power supply, a controlled terminal of the first transistor Q1 is connected to a second terminal of the first resistor R1, and a first terminal of the second resistor R2 is an input terminal of the access identification circuit 10; the input terminal of the first transistor Q1 is connected to the second terminal of the second resistor R2, the connection node is connected to the output terminal of the access identification circuit 10, the first terminal of the second resistor R2 is connected to the first power supply, and the output terminal of the first transistor Q1 is grounded.
Here, the first transistor Q1 may be an NPN transistor or an N-MOS transistor. The base of the NPN transistor is the controlled terminal of the first transistor Q1, the collector of the NPN transistor is the input terminal of the first transistor Q1, and the emitter of the NPN transistor is the output terminal of the first transistor Q1.
Specifically, when an external power is input to the power input terminal DCIN, the first transistor Q1 is turned on, and the access identification circuit 10 outputs a low level; when no external power is input to the power input terminal DCIN, the first transistor Q1 is turned off, and the access identification circuit 10 outputs a high level.
Optionally, the voltage detection circuit 20 includes a third resistor R3 and a fourth resistor R4, a first end of the third resistor R3 is an input end of the voltage detection circuit 20, a second end of the third resistor R3 is connected to a first end of the fourth resistor R4, a connection node of the third resistor R3 is an output end of the voltage detection circuit 20, and a second end of the fourth resistor R4 is grounded.
Here, the ratio of the third resistor R3 to the fourth resistor R4 may be set to an integer of 2 to 1 or 3 to 1, so as to facilitate the control circuit 40 to obtain the power voltage input to the power input terminal DCIN. Generally, the resistance of the third resistor R3 is larger than that of the fourth resistor R4, so as to increase the range of the voltage detection circuit 20 capable of detecting the voltage.
Optionally, the voltage switch circuit 30 includes a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a second transistor Q2, a first P-MOS transistor Q3 and a second P-MOS transistor Q4, a first end of the fifth resistor R5, a first end of the seventh resistor R7 and a drain of the first P-MOS transistor Q3 are interconnected, a connection node thereof is an input end of the switch circuit 30, a second end of the fifth resistor R5 is connected with a first end of the sixth resistor R6, a connection node thereof is a controlled end of the switch circuit 30, a second end of the sixth resistor R6 is connected with the controlled end of the second transistor Q2, an output end of the second transistor Q2 is grounded, an input end of the second transistor Q2, a second end of the seventh resistor R7, a gate of the first P-MOS transistor Q3 and a gate of the second P-MOS transistor Q4 are interconnected, a source of the first P-MOS transistor Q3 is connected with a source of the second P4P-MOS transistor Q4, the drain of the second P-MOS transistor Q4 is the output terminal of the switching circuit 30.
Here, the second transistor Q2 may be an NPN transistor or an N-MOS transistor. The base of the NPN transistor is the controlled terminal of the second transistor Q2, the collector of the NPN transistor is the input terminal of the second transistor Q2, and the emitter of the NPN transistor is the output terminal of the second transistor Q2.
Specifically, when the controlled terminal of the switch circuit 30 receives a high-level signal, the second transistor Q2, the first P-MOS transistor Q3 and the second P-MOS transistor Q4 are turned on, and the input external power is output to the electronic device through the switch circuit 30; when the controlled terminal of the switch circuit 30 receives a low level signal, the second transistor Q2, the first P-MOS transistor Q3 and the second P-MOS transistor Q4 are turned off, and the input external power cannot be output to the electronic device.
It should be noted that in the present embodiment, the first P-MOS transistor Q3 has a first parasitic diode (not shown), and the second P-MOS transistor Q4 has a second parasitic diode (not shown). The anode of the first parasitic diode is connected with the drain of the first P-MOS transistor Q3, and the cathode of the first parasitic diode is connected with the source of the first P-MOS transistor Q3; the anode of the second parasitic diode is connected to the drain of the second P-MOS transistor Q4, and the cathode of the second parasitic diode is connected to the source of the second P-MOS transistor Q4. In this way, the current in the interface circuit can be prevented from flowing backward, thereby protecting the circuit.
Optionally, the control circuit 40 includes a control chip U, a first detection pin DET of the control chip U is a first detection end of the control circuit 40, a second detection pin CHK of the control chip U is a second detection end of the control circuit 40, and a control pin EN of the control chip U is a control end of the control circuit 40.
Alternatively, the control circuit 40 has an upper limit reference voltage limiting sub-circuit (not shown) and a lower limit reference voltage limiting sub-circuit (not shown), and when the power supply voltage input at the power supply input terminal DCIN is between the reference voltage value of the upper limit reference voltage limiting sub-circuit and the reference voltage value of the lower limit reference voltage limiting sub-circuit, the control circuit 40 controls the switch circuit 30 to be turned on, and outputs the power supply voltage input at the power supply input terminal DCIN.
Specifically, the upper limit reference voltage limiting sub-circuit includes a first comparator (not shown) and a first reference voltage source (not shown); the lower limit reference voltage limiting sub-circuit includes a second comparator (not shown) and a second reference voltage source (not shown). The non-inverting input end of the first comparator is connected with a first reference voltage source, the inverting input end of the first comparator is connected with the non-inverting input end of the second comparator, the connection node of the non-inverting input end of the first comparator is the second input end of the control circuit 40, the inverting input end of the second comparator is connected with a second reference voltage source, the output end of the first comparator is connected with the first input end of the AND gate, the output end of the second comparator is connected with the second input end of the AND gate, and the output end of the AND gate is the output end of the control circuit 40. In this way, the control circuit 400 responds only when the voltage range detected by the voltage detection circuit 200 is between the voltages corresponding to the second reference voltage source and the first reference voltage source.
The working principle of the interface circuit is explained below with reference to fig. 1 and 2:
before the interface circuit receives an external power supply, the access identification circuit 10 outputs a high level signal to the control circuit 40, so that the control circuit 40 outputs a low level at a control end thereof, the second transistor Q2, the first P-MOS transistor Q3 and the second P-MOS transistor Q4 are all turned off, the power supply voltage cannot be output to the electronic device, and a power supply loop of the electronic device is turned off.
When the interface circuit receives an external power source, the access identification circuit 10 outputs a low level signal to the control circuit 40.
At the same time, the voltage detection circuit 20 detects the input power supply voltage, and outputs a detection signal corresponding to the magnitude of the input power supply voltage to the control circuit 40. When the input power voltage is within the preset voltage range (valid), the control circuit 40 outputs a high level signal at the control end thereof, the second transistor Q2, the first P-MOS transistor Q3 and the second P-MOS transistor Q4 are all turned on, and the power voltage is output to the electronic device through the switch circuit 30 to supply power to the electronic device.
After the external power source is disconnected, the access identification circuit 10 outputs a high level signal to the control circuit 40, so that the control circuit 40 outputs a low level at the control end thereof, the second transistor Q2, the first P-MOS transistor Q3 and the second P-MOS transistor Q4 are all turned off, the power voltage cannot be output to the electronic device, and the power supply loop of the electronic device is turned off.
The utility model discloses still provide an electronic equipment, this electronic equipment include as above interface circuit, this interface circuit's concrete structure refers to above-mentioned embodiment, because this electronic equipment has adopted the whole technical scheme of above-mentioned all embodiments, consequently has all beneficial effects that the technical scheme of above-mentioned embodiment brought at least, and the repeated description is no longer given here. The electronic device may be a mobile phone, a tablet computer, an electric toothbrush, etc., which is not limited herein.
The above only be the preferred embodiment of the utility model discloses a not consequently restriction the utility model discloses a patent range, all are in the utility model discloses a conceive, utilize the equivalent structure transform of what the content was done in the description and the attached drawing, or direct/indirect application all is included in other relevant technical field the utility model discloses a patent protection within range.
Claims (10)
1. An interface circuit is characterized by comprising a power input end, an access identification circuit, a voltage detection circuit, a switch circuit, a control circuit and a power output end, wherein the power input end, the input end of the access identification circuit, the input end of the voltage detection circuit and the input end of the switch circuit are interconnected, the output end of the access identification circuit is connected with a first detection end of the control circuit, the output end of the voltage detection circuit is connected with a second detection end of the control circuit, a controlled end of the switch circuit is connected with a control end of the control circuit, and the output end of the switch circuit is connected with the power output end; wherein,
the access identification circuit is used for identifying whether the power input end has external power input;
the voltage detection circuit is used for detecting the magnitude of the power supply voltage input by the power supply input end;
and the control circuit is used for controlling the switch circuit to be switched on when the power supply voltage input by the power supply input end is within a preset voltage range, and outputting the power supply voltage input by the power supply input end.
2. The interface circuit according to claim 1, wherein the access identification circuit comprises a first resistor, a second resistor, a first transistor and a first power supply, wherein a controlled terminal of the first transistor is connected to a second terminal of the first resistor, and a first terminal of the second resistor is an input terminal of the access identification circuit; the input end of the first transistor is connected with the second end of the second resistor, the connection node of the first transistor is the output end of the access identification circuit, the first end of the second resistor is connected with the first power supply, and the output end of the first transistor is grounded.
3. The interface circuit of claim 2, wherein the first transistor is an NPN transistor, a base of the NPN transistor is a controlled terminal of the first transistor, a collector of the NPN transistor is an input terminal of the first transistor, and an emitter of the NPN transistor is an output terminal of the first transistor.
4. The interface circuit of claim 1, wherein the voltage detection circuit comprises a third resistor and a fourth resistor, a first terminal of the third resistor is an input terminal of the voltage detection circuit, a second terminal of the third resistor is connected to a first terminal of the fourth resistor, a connection node thereof is an output terminal of the voltage detection circuit, and a second terminal of the fourth resistor is grounded.
5. The interface circuit according to claim 1, wherein the voltage switch circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, a second transistor, a first P-MOS transistor and a second P-MOS transistor, wherein a first terminal of the fifth resistor, a first terminal of the seventh resistor and a drain of the first P-MOS transistor are interconnected, a connection node thereof is an input terminal of the switch circuit, a second terminal of the fifth resistor is connected with a first terminal of the sixth resistor, a connection node thereof is a controlled terminal of the switch circuit, a second terminal of the sixth resistor is connected with the controlled terminal of the second transistor, an output terminal of the second transistor is grounded, an input terminal of the second transistor, a second terminal of the seventh resistor, a gate of the first P-MOS transistor and a gate of the second P-MOS transistor are interconnected, and the source electrode of the first P-MOS tube is connected with the source electrode of the second P-MOS tube, and the drain electrode of the second P-MOS tube is the output end of the switch circuit.
6. The interface circuit of claim 5, wherein the second transistor is an NPN transistor, a base of the NPN transistor is a controlled terminal of the second transistor, a collector of the NPN transistor is an input terminal of the second transistor, and an emitter of the NPN transistor is an output terminal of the second transistor.
7. The interface circuit of claim 1, wherein the control circuit comprises a control chip, the first detection pin of the control chip is a first detection terminal of the control circuit, the second detection pin of the control chip is a second detection terminal of the control circuit, and the control pin of the control chip is a control terminal of the control circuit.
8. The interface circuit according to claim 1, wherein the control circuit has an upper limit reference voltage limiting sub-circuit and a lower limit reference voltage limiting sub-circuit, and controls the switch circuit to turn on to output the power supply voltage input from the power supply input terminal when the power supply voltage input from the power supply input terminal is between a reference voltage value of the upper limit reference voltage limiting sub-circuit and a reference voltage value of the lower limit reference voltage limiting sub-circuit.
9. An electronic device, characterized in that it comprises an interface circuit according to any one of claims 1-8.
10. The electronic device of claim 9, wherein the electronic device is a power toothbrush.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720415824.4U CN207074996U (en) | 2017-04-19 | 2017-04-19 | Interface circuit and electronic equipment |
| PCT/CN2017/091890 WO2018192098A1 (en) | 2017-04-19 | 2017-07-05 | Interface circuit and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201720415824.4U CN207074996U (en) | 2017-04-19 | 2017-04-19 | Interface circuit and electronic equipment |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN207074996U true CN207074996U (en) | 2018-03-06 |
Family
ID=61513568
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201720415824.4U Withdrawn - After Issue CN207074996U (en) | 2017-04-19 | 2017-04-19 | Interface circuit and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN207074996U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106972852A (en) * | 2017-04-19 | 2017-07-21 | 深圳市云顶信息技术有限公司 | Interface circuit and electronic equipment |
| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
-
2017
- 2017-04-19 CN CN201720415824.4U patent/CN207074996U/en not_active Withdrawn - After Issue
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106972852A (en) * | 2017-04-19 | 2017-07-21 | 深圳市云顶信息技术有限公司 | Interface circuit and electronic equipment |
| CN113452361A (en) * | 2020-03-27 | 2021-09-28 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse flow current prevention mechanism |
| CN113452361B (en) * | 2020-03-27 | 2024-04-05 | 瑞昱半导体股份有限公司 | Universal serial bus signal output circuit with reverse current prevention mechanism |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10983152B2 (en) | USB data pin impedance detection | |
| US8508900B2 (en) | Overvoltage protection circuit and electronic device comprising the same | |
| US10658860B2 (en) | Electronic device, charger within the electronic device, and detecting method for detecting abnormal status of connector of electronic device | |
| EP3093945A1 (en) | Electronic device, charger within the electronic device, and detecting method for detecting abnormal status of connector of electronic device | |
| CN206452095U (en) | A kind of over under-voltage protection circuit and set top box | |
| CN105071484B (en) | A kind of charging method and device of the terminal with data exchanging function | |
| CN207074996U (en) | Interface circuit and electronic equipment | |
| KR20210120092A (en) | Charging circuits and electronics | |
| CN105186598A (en) | USB insertion automatic identification and power supply system and chip integrated with the same | |
| TW201312889A (en) | Overvoltage protection circuit and portable electronic device having the same | |
| CN111987710A (en) | Low-power-consumption backflow prevention circuit and multi-input power supply equipment | |
| CN114487895A (en) | Load detection circuit and circuit board assembly | |
| TWI640162B (en) | Reset circuit and related electronic device | |
| CN106972852B (en) | Interface circuit and electronic equipment | |
| CN208971379U (en) | A kind of anti-overshoot protection circuit | |
| US20120002335A1 (en) | Protection circuit and electronic device using the same | |
| US11804706B1 (en) | Over-voltage protection circuit for use in USB Type-C port and related method | |
| CN214412262U (en) | Protection circuit, circuit board and protection system | |
| CN214669449U (en) | Interface protection circuit, gun insertion detection circuit, electric vehicle control circuit and vehicle | |
| CN105872931B (en) | Improved open machine examination slowdown monitoring circuit and system | |
| CN108110839B (en) | Power supply control method and electronic equipment | |
| CN1157835C (en) | Voltage stabilization and electric power and voltage regulating and monitoring protection circuit unit | |
| JP6916629B2 (en) | Electronics and control methods | |
| CN211086546U (en) | Grounding detection device | |
| CN218897084U (en) | Automatic discernment commercial power circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| AV01 | Patent right actively abandoned |
Granted publication date: 20180306 Effective date of abandoning: 20181221 |
|
| AV01 | Patent right actively abandoned |