CN112928161A - 高电子迁移率晶体管及其制作方法 - Google Patents
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Abstract
本发明公开一种高电子迁移率晶体管及其制作方法,其中该制作高电子迁移率晶体管(high electron mobility transistor,HEMT)的方法为,首先形成一第一阻障层于一基底上,然后形成一P型半导体层于该第一阻障层上,形成一硬掩模于该P型半导体层上,图案化该硬掩模以及该P型半导体层,再形成一间隙壁于该硬掩模以及该P型半导体层旁。
Description
技术领域
本发明涉及一种高电子迁移率晶体管及其制作方法。
背景技术
以氮化镓基材料(GaN-based materials)为基础的高电子迁移率晶体管具有于电子、机械以及化学等特性上的众多优点,例如宽能隙、高击穿电压、高电子迁移率、大弹性模数(elastic modulus)、高压电与压阻系数(high piezoelectric and piezoresistivecoefficients)等与化学钝性。上述优点使氮化镓基材料可用于如高亮度发光二极管、功率开关元件、调节器、电池保护器、面板显示驱动器、通讯元件等应用的元件的制作。
发明内容
本发明一实施例揭露一种制作高电子迁移率晶体管(high electron mobilitytransistor,HEMT)的方法。首先形成一第一阻障层于一基底上,然后形成一P型半导体层于该第一阻障层上,形成一硬掩模于该P型半导体层上,图案化该硬掩模以及该P型半导体层,再形成一间隙壁于该硬掩模以及该P型半导体层旁。
本发明另一实施例揭露一种制作高电子迁移率晶体管(high electron mobilitytransistor,HEMT)的方法。首先形成一第一阻障层于一基底上,然后形成一P型半导体层于该第一阻障层上,图案化该P型半导体层,再形成一间隙壁于该硬掩模以及该P型半导体层旁。
本发明又一实施例揭露一种高电子迁移率晶体管(high electron mobilitytransistor,HEMT),其主要包含一缓冲层设于一基底上、一第一阻障层设于该缓冲层上、一P型半导体层设于该第一阻障层上以及一间隙壁设于P型半导体层旁。
附图说明
图1至图5为本发明一实施例制作一高电子迁移率晶体管的方法示意图;
图6为本发明一实施例的一高电子迁移率晶体管的结构示意图;
图7至图12为本发明一实施例制作一高电子迁移率晶体管的方法示意图。
主要元件符号说明
12 基底 14 缓冲层
16 第一阻障层 18 P型半导体层
20 硬掩模 22 间隙壁
24 第二阻障层 26 保护层
28 栅极电极 30 源极电极
32 漏极电极 34 栅极结构
42 基底 44 缓冲层
46 第一阻障层 48 P型半导体层
50 间隙壁 52 第二阻障层
54 硬掩模 56 保护层
58 栅极电极 60 源极电极
62 漏极电极 64 栅极结构
具体实施方式
请参照图1至图5,图1至图5为本发明一实施例制作一高电子迁移率晶体管的方法示意图。如图1所示,首先提供一基底12,例如一由硅、碳化硅或氧化铝(或可称蓝宝石)所构成的基底,其中基底12可为单层基底、多层基底、梯度基底或上述的组合。依据本发明其他实施例基底12又可包含一硅覆绝缘(silicon-on-insulator,SOI)基底。
然后于基底12表面形成一缓冲层14。在一实施利中,缓冲层14包含III-V族半导体例如氮化镓,其厚度可介于0.5微米至10微米之间。在一实施利中,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemicalvapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于基底12上形成缓冲层14。
接着形成一第一阻障层16于缓冲层14表面。在本实施例中第一阻障层16较佳包含III-V族半导体例如氮化铝镓(AlxGa1-xN),其中0<x<1,x较佳小于等于20%,且第一阻障层16较佳包含一由外延成长制作工艺所形成的外延层。如同上述形成缓冲层14的方式,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metalorganic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapordeposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于缓冲层14上形成第一阻障层16。
随后依序形成一P型半导体层18以及一硬掩模20于第一阻障层16表面。在一实施利中,P型半导体层18较佳包含P型III-V族半导体例如P型氮化镓,且可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemicalvapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于第一阻障层16表面形成P型半导体层18。硬掩模20则可包含介电材料或导电/金属材料,例如可包含但不局限于氮化硅、氧化硅或氮化钛。
如图2所示,接着进行一图案转移制作工艺图案化硬掩模20及P型半导体层18,例如可先利用一图案化掩模(图未示)为掩模去除部分硬掩模20及部分P型半导体层18并暴露出图案化的P型半导体层18两侧的第一阻障层16表面,其中图案化的P型半导体层18较佳于后续制作工艺中成为高电子迁移率晶体管栅极结构的一部分。值得注意的是,为了避免后续所制备的元件因连续的P型半导体层18产生微负载效应(micro loading effect),本阶段所进行的图案转移制作工艺较佳在图案化P型半导体层18的时候完全去除图案化的P型半导体层18两侧的剩余P型半导体层18并暴露出第一阻障层16表面,因此图案化的P型半导体层18两侧的第一阻障层16顶部可能切齐或略低于P型半导体层18正下方的第一阻障层16顶部。
如图3所示,然后形成一间隙壁22于硬掩模20以及P型半导体层18旁。更具体而言,本阶段形成间隙壁22的方法可先全面性形成一由介电材料所构成的衬垫层(图未示)于基底12上并覆盖第一阻障层16及硬掩模20,然后利用一回蚀刻制作工艺去除部分衬垫层,以于P型半导体层18与硬掩模20侧壁形成间隙壁22,其中间隙壁22顶部较佳切齐硬掩模20顶部。在本实施例中,间隙壁22虽以单一间隙壁为例,但不局限于此,又可依据制作工艺或产品需求调整衬垫层的数量以于P型半导体层18及硬掩模20侧壁形成一个或一个以上如两个、三个甚至四个间隙壁,其中侧壁20子可包含I形以及/或L形,且各间隙壁均可包含但不局限于氧化硅、氮化硅、氮氧化硅以及/或氮碳化硅,这些变化型均属本发明所涵盖的范围。
如图4所示,接着形成一第二阻障层24于间隙壁22两侧的第一阻障层16表面。在本实施例中第一阻障层16与第二阻障层24均较佳包含III-V族半导体例如氮化铝镓(AlxGa1- xN)且两者均较佳包含由外延成长制作工艺所形成的外延层。在本实施例中,第一阻障层16与第二阻障层24较佳包含不同厚度,例如第一阻障层16厚度较佳小于第二阻障层24厚度。另外第一阻障层16与第二阻障层24较佳包含不同铝浓度或更具体而言第一阻障层16的铝浓度较佳小于第二阻障层24的铝浓度。举例来说,若第一阻障层16包含III-V族半导体例如氮化铝镓(AlxGa1-xN),其中0<x<1,x较佳介于5~15%。第二阻障层24若同样包含III-V族半导体例如氮化铝镓(AlxGa1-xN),其中0<x<1,x较佳介于15-50%。
如同上述形成第一阻障层16的方式,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于第一阻障层16上形成第二阻障层24。
然后如图5所示,先形成一保护层26于第二阻障层24、间隙壁22及硬掩模20表面,再形成一栅极电极28于硬掩模20上以及源极电极30与漏极电极32于栅极电极28两侧,其中P型半导体层18、硬掩模20以及栅极电极28可一同构成一栅极结构34。在本实施例中,可先进行一光刻暨蚀刻制作工艺去除P型半导体层18或硬掩模20正上方的部分保护层26形成凹槽(图未示),形成一栅极电极28于凹槽内,去除间隙壁22两侧的部分保护层26形成二凹槽,再分别形成源极电极30与漏极电极32于栅极电极28两侧。
值得注意的是,本实施例中的硬掩模20较佳由导电材料,例如氮化钛所构成,因此栅极电极28可直接设置于硬掩模20表面而不需与P型半导体层18直接接触。另外在本实施例中,栅极电极28、源极电极30以及漏极电极32较佳由金属所构成,其中栅极电极28较佳由萧特基金属所构成而源极电极30与漏极电极32较佳由欧姆接触金属所构成。依据本发明一实施例,栅极电极28、源极电极30及漏极电极32可各自包含金、银、铂、钛、铝、钨、钯或其组合。在一些实施例中,可利用电镀制作工艺、溅镀制作工艺、电阻加热蒸镀制作工艺、电子束蒸镀制作工艺、物理气相沉积(physical vapor deposition,PVD)制作工艺、化学气相沉积制作工艺(chemical vapor deposition,CVD)制作工艺、或上述组合于上述凹槽内形成导电材料,然后再利用单次或多次蚀刻将电极材料图案化以形成栅极电极28、源极电极30以及漏极电极32。至此即完成本发明一实施例的一高电子迁移率晶体管的制作。
请继续照图6,图6另揭露本发明一实施例的一高电子迁移率晶体管的结构示意图。如图6所示,高电子迁移率晶体管如图5的实施例般包含缓冲层14设于基底12上、第一阻障层16设于缓冲层14上、P型半导体层18设于第一阻障层16上、栅极电极28设于P型半导体层18上、硬掩模20设于P型半导体层18上、间隙壁22设于P型半导体层18及硬掩模20旁、第二阻障层24设于间隙壁22旁的第一阻障层16上以及源极电极30及漏极电极32设于间隙壁22两侧的第二阻障层24上。
需注意的是,相较于图5实施例中的硬掩模20包含导电材料,本实施例中的硬掩模20可依据制作工艺需求选用导电或介电材料,例如可包含但不局限于氧化硅或氮化硅,因此栅极电极28较佳穿过硬掩模20并直接接触P型半导体层18表面,或从另一角度来看硬掩模20较佳设于P型半导体层18上并同时环绕栅极电极28。
请参照图7至图12,图7至图12为本发明一实施例制作一高电子迁移率晶体管的方法示意图。如图1所示,首先提供一基底42,例如一由硅、碳化硅或氧化铝(或可称蓝宝石)所构成的基底,其中基底42可为单层基底、多层基底、梯度基底或上述的组合。依据本发明其他实施例基底42又可包含一硅覆绝缘(silicon-on-insulator,SOI)基底。
然后于基底42表面形成一缓冲层44。在一实施利中,缓冲层44包含III-V族半导体例如氮化镓,其厚度可介于0.5微米至10微米之间。在一实施利中,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemicalvapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于基底42上形成缓冲层44。
接着形成一第一阻障层46于缓冲层44表面。在本实施例中第一阻障层46较佳包含III-V族半导体例如氮化铝镓(AlxGa1-xN),其中0<x<1,x较佳小于等于20%,且第一阻障层46较佳包含一由外延成长制作工艺所形成的外延层。如同上述形成缓冲层44的方式,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metalorganic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapordeposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于缓冲层44上形成第一阻障层46。
随后形成一P型半导体层48于第一阻障层46表面。在一实施利中,P型半导体层48较佳包含P型氮化镓,且可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vaporphase epitaxy,HVPE)制作工艺或上述组合于第一阻障层46表面形成P型半导体层48。
接着如图2进行一图案转移制作工艺图案化P型半导体层48,例如可先利用一图案化掩模(图未示)为掩模去除部分P型半导体层48并暴露出图案化的P型半导体层48两侧的第一阻障层46表面,其中图案化的P型半导体层48较佳于后续制作工艺中成为高电子迁移率晶体管栅极结构的一部分。如同前述实施例,为了避免后续所制备的元件因连续的P型半导体层产生微负载效应(micro loading effect),本阶段所进行的图案转移制作工艺较佳在图案化P型半导体层48的时候完全去除图案化的P型半导体层48两侧的剩余P型半导体层48并暴露出第一阻障层46表面,因此图案化的P型半导体层48两侧的第一阻障层46顶部可能切齐或略低于P型半导体层48正下方的第一阻障层46顶部。
如图8所示,然后形成一间隙壁50于P型半导体层48旁。更具体而言,本阶段形成间隙壁48的方法可先全面性形成一由介电材料所构成的衬垫层(图未示)于基底42上并覆盖第一阻障层46及P型半导体层48,然后利用一回蚀刻制作工艺去除部分衬垫层,以于P型半导体层48侧壁形成间隙壁50。由于本实施例的P型半导体层48上并未形成硬掩模,因此间隙壁50顶部较佳切齐P型半导体层48顶部。在本实施例中,间隙壁50虽以单一间隙壁为例,但不局限于此,又可依据制作工艺或产品需求调整衬垫层的数量以于P型半导体层48侧壁形成一个或一个以上如两个、三个甚至四个间隙壁,其中间隙壁50可包含I形以及/或L形,且各间隙壁均可包含但不局限于氧化硅、氮化硅、氮氧化硅以及/或氮碳化硅,这些变化型均属本发明所涵盖的范围。
如图9所示,接着形成一第二阻障层52于间隙壁50两侧的第一阻障层46表面以及P型半导体层48顶部。在本实施例中第一阻障层46与第二阻障层52均较佳包含III-V族半导体例如氮化铝镓(AlxGa1-xN)且两者均较佳包含由外延成长制作工艺所形成的外延层。在本实施例中,第一阻障层46与第二阻障层52较佳包含不同厚度,例如第一阻障层46厚度较佳小于第二阻障层52厚度。另外第一阻障层46与第二阻障层52较佳包含不同铝浓度或更具体而言第一阻障层46的铝浓度较佳小于第二阻障层52的铝浓度。举例来说,若第一阻障层46包含III-V族半导体例如氮化铝镓(AlxGa1-xN),其中0<x<1,x较佳介于5~15%。第二阻障层52若同样包含III-V族半导体例如氮化铝镓(AlxGa1-xN),其中0<x<1,x较佳介于15~50%。
如同上述形成第一阻障层46的方式,可利用分子束外延制作工艺(molecular-beam epitaxy,MBE)、有机金属气相沉积(metal organic chemical vapor deposition,MOCVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、氢化物气相外延(hydride vapor phase epitaxy,HVPE)制作工艺或上述组合于第一阻障层46上形成第二阻障层52。
如图10所示,然后形成一硬掩模54并全面性覆盖第二阻障层52及暴露出的间隙壁50。在本实施例中,硬掩模54可包含介电材料或导电/金属材料,例如可包含但不局限于氮化硅、氧化硅、氮化钛或氧化铝。
如图11所示,随后进行一平坦化制作工艺,例如利用化学机械研磨制作工艺去除部分硬掩模54以及P型半导体层48上的所有第二阻障层52,使剩余的硬掩模54如间隙壁50两侧的硬掩模54顶部切齐P型半导体层48顶部。
最后如图12所示,先形成一保护层56于硬掩模54表面,再形成一栅极电极58于P型半导体层48上的保护层56内以及源极电极60与漏极电极62于栅极电极58两侧,其中P型半导体层48与栅极电极58可一同构成一栅极结构64。在本实施例中,可先进行一光刻暨蚀刻制作工艺去除P型半导体层48正上方的部分保护层56形成凹槽(图未示),形成一栅极电极58于凹槽内,去除间隙壁50两侧的部分保护层56及部分硬掩模54形成二凹槽,再分别形成源极电极60与漏极电极62于凹槽内。
在本实施例中,栅极电极58、源极电极60以及漏极电极62较佳由金属所构成,其中栅极电极58较佳由萧特基金属所构成而源极电极60与漏极电极62较佳由欧姆接触金属所构成。依据本发明一实施例,栅极电极58、源极电极60及漏极电极62可各自包含金、银、铂、钛、铝、钨、钯或其组合。在一些实施例中,可利用电镀制作工艺、溅镀制作工艺、电阻加热蒸镀制作工艺、电子束蒸镀制作工艺、物理气相沉积(physical vapor deposition,PVD)制作工艺、化学气相沉积(chemical vapor deposition,CVD)制作工艺、或上述组合于上述凹槽内形成导电材料,然后再利用单次或多次蚀刻将电极材料图案化以形成栅极电极58、源极电极60以及漏极电极62。至此即完成本发明一实施例的一高电子迁移率晶体管的制作。
以上所述仅为本发明的优选实施例,凡依本发明权利要求所做的均等变化与修饰,都应属本发明的涵盖范围。
Claims (20)
1.一种制作高电子迁移率晶体管(high electron mobility transistor,HEMT)的方法,其特征在于,包含:
形成第一阻障层于基底上;
形成P型半导体层于该第一阻障层上;
形成硬掩模于该P型半导体层上;
图案化该硬掩模以及该P型半导体层;以及
形成间隙壁于该硬掩模以及该P型半导体层旁。
2.如权利要求1所述的方法,另包含在形成该第一阻障层之前形成缓冲层于该基底上。
3.如权利要求1所述的方法,另包含:
形成第二阻障层于该间隙壁旁的该第一阻障层上;
形成栅极电极于该硬掩模上;以及
形成源极电极以及漏极电极于该间隙壁两侧。
4.如权利要求3所述的方法,其中该硬掩模包含金属。
5.如权利要求1所述的方法,另包含:
形成第二阻障层于该间隙壁旁的该第一阻障层上;
形成栅极电极于该硬掩模内并设于该P型半导体层上;以及
形成源极电极以及漏极电极于该间隙壁两侧。
6.如权利要求5所述的方法,其中该硬掩模包含介电材料。
7.如权利要求1所述的方法,其中该第一阻障层包含AlxGa1-xN。
8.一种制作高电子迁移率晶体管(high electron mobility transistor,HEMT)的方法,其特征在于,包含:
形成第一阻障层于基底上;
形成P型半导体层于该第一阻障层上;
图案化该P型半导体层;以及
形成间隙壁于该硬掩模以及该P型半导体层旁。
9.如权利要求8所述的方法,另包含于形成该第一阻障层之前形成缓冲层于该基底上。
10.如权利要求8所述的方法,另包含:
形成第二阻障层于该P型半导体层以及该间隙壁旁的该第一阻障层上;
形成硬掩模于该第二阻障层上;
平坦化该硬掩模;
形成栅极电极于该P型半导体层上;以及
形成源极电极以及漏极电极于该间隙壁两侧。
11.如权利要求10所述的方法,另包含平坦化该硬掩模以及该第二阻障层并使该硬掩模顶部切齐该P型半导体层顶部。
12.如权利要求8所述的方法,其中该第一阻障层包含AlxGa1-xN。
13.一种高电子迁移率晶体管(high electron mobility transistor,HEMT),其特征在于,包含:
缓冲层,设于基底上;
第一阻障层,设于该缓冲层上;
P型半导体层,设于该第一阻障层上;以及
间隙壁,设于P型半导体层旁。
14.如权利要求13所述的高电子迁移率晶体管,另包含:
栅极电极,设于该P型半导体层上;以及
源极电极以及漏极电极于该间隙壁两侧。
15.如权利要求14所述的高电子迁移率晶体管,另包含硬掩模设于该P型半导体层以及该栅极电极之间。
16.如权利要求15所述的高电子迁移率晶体管,其中该硬掩模包含金属。
17.如权利要求14所述的高电子迁移率晶体管,另包含硬掩模,设于该P型半导体层上并环绕该栅极电极。
18.如权利要求17所述的高电子迁移率晶体管,其中该硬掩模包含介电材料。
19.如权利要求13所述的高电子迁移率晶体管,另包含第二阻障层,设于该间隙壁旁的该第一阻障层上。
20.如权利要求19所述的高电子迁移率晶体管,另包含硬掩模,设于该第二阻障层上并环绕该间隙壁。
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CN202311677085.2A CN117855265A (zh) | 2019-12-06 | 2019-12-06 | 高电子迁移率晶体管及其制作方法 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120112202A1 (en) * | 2010-11-05 | 2012-05-10 | Samsung Electronics Co., Ltd. | E-Mode High Electron Mobility Transistors And Methods Of Manufacturing The Same |
US20120175631A1 (en) * | 2009-04-08 | 2012-07-12 | Alexander Lidow | ENHANCEMENT MODE GaN HEMT DEVICE WITH GATE SPACER AND METHOD FOR FABRICATING THE SAME |
US20160141404A1 (en) * | 2014-11-13 | 2016-05-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | STRUCTURE FOR A GALLIUM NITRIDE (GaN) HIGH ELECTRON MOBILITY TRANSISTOR |
Family Cites Families (56)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5161235A (en) * | 1990-02-20 | 1992-11-03 | University Of Virginia Alumni Patents Foundation | Field-effect compound semiconductive transistor with GaAs gate to increase barrier height and reduce turn-on threshold |
CN1557024B (zh) | 2001-07-24 | 2010-04-07 | 美商克立股份有限公司 | 绝缘栅铝镓氮化物/氮化钾高电子迁移率晶体管(hemt) |
JP4041075B2 (ja) * | 2004-02-27 | 2008-01-30 | 株式会社東芝 | 半導体装置 |
JP2006032552A (ja) * | 2004-07-14 | 2006-02-02 | Toshiba Corp | 窒化物含有半導体装置 |
JP4705412B2 (ja) * | 2005-06-06 | 2011-06-22 | パナソニック株式会社 | 電界効果トランジスタ及びその製造方法 |
JP4712459B2 (ja) * | 2005-07-08 | 2011-06-29 | パナソニック株式会社 | トランジスタ及びその動作方法 |
JP4705481B2 (ja) * | 2006-01-25 | 2011-06-22 | パナソニック株式会社 | 窒化物半導体装置 |
JP2007220895A (ja) * | 2006-02-16 | 2007-08-30 | Matsushita Electric Ind Co Ltd | 窒化物半導体装置およびその製造方法 |
JP5147197B2 (ja) * | 2006-06-06 | 2013-02-20 | パナソニック株式会社 | トランジスタ |
JP5186096B2 (ja) * | 2006-10-12 | 2013-04-17 | パナソニック株式会社 | 窒化物半導体トランジスタ及びその製造方法 |
US7838904B2 (en) * | 2007-01-31 | 2010-11-23 | Panasonic Corporation | Nitride based semiconductor device with concave gate region |
WO2008151138A1 (en) * | 2007-06-01 | 2008-12-11 | The Regents Of The University Of California | P-gan/algan/aln/gan enhancement-mode field effect transistor |
US7795642B2 (en) * | 2007-09-14 | 2010-09-14 | Transphorm, Inc. | III-nitride devices with recessed gates |
US7915643B2 (en) * | 2007-09-17 | 2011-03-29 | Transphorm Inc. | Enhancement mode gallium nitride power devices |
JP5032965B2 (ja) * | 2007-12-10 | 2012-09-26 | パナソニック株式会社 | 窒化物半導体トランジスタ及びその製造方法 |
WO2009076076A2 (en) * | 2007-12-10 | 2009-06-18 | Transphorm Inc. | Insulated gate e-mode transistors |
JP2010103478A (ja) * | 2008-09-25 | 2010-05-06 | Panasonic Corp | 窒化物半導体装置及びその製造方法 |
JP5468768B2 (ja) * | 2008-12-05 | 2014-04-09 | パナソニック株式会社 | 電界効果トランジスタ及びその製造方法 |
TWI514567B (zh) * | 2009-04-08 | 2015-12-21 | Efficient Power Conversion Corp | 逆擴散抑制結構 |
DE112010001555B4 (de) * | 2009-04-08 | 2021-10-07 | Efficient Power Conversion Corporation | GaN-HEMT vom Anreicherungstyp und Verfahren zu seiner Herstellung |
US9214538B2 (en) * | 2011-05-16 | 2015-12-15 | Eta Semiconductor Inc. | High performance multigate transistor |
CN103620751B (zh) * | 2011-07-12 | 2017-08-01 | 松下知识产权经营株式会社 | 氮化物半导体装置及其制造方法 |
WO2013011617A1 (ja) * | 2011-07-15 | 2013-01-24 | パナソニック株式会社 | 半導体装置及びその製造方法 |
GB201112330D0 (en) * | 2011-07-18 | 2011-08-31 | Epigan Nv | Method for growing III-V epitaxial layers and semiconductor structure |
JP5896667B2 (ja) * | 2011-09-26 | 2016-03-30 | トランスフォーム・ジャパン株式会社 | 化合物半導体装置及びその製造方法 |
US9543391B2 (en) * | 2011-10-19 | 2017-01-10 | Samsung Electronics Co., Ltd. | High electron mobility transistor having reduced threshold voltage variation and method of manufacturing the same |
US8946771B2 (en) * | 2011-11-09 | 2015-02-03 | Taiwan Semiconductor Manufacturing Co., Ltd. | Gallium nitride semiconductor devices and method making thereof |
JP5950643B2 (ja) * | 2012-03-19 | 2016-07-13 | トランスフォーム・ジャパン株式会社 | 化合物半導体装置及びその製造方法 |
CN102683394B (zh) * | 2012-04-17 | 2014-12-10 | 苏州晶湛半导体有限公司 | 一种增强型器件及其制造方法 |
JP2013235873A (ja) * | 2012-05-02 | 2013-11-21 | Renesas Electronics Corp | 半導体装置およびその製造方法 |
JP6087552B2 (ja) * | 2012-09-21 | 2017-03-01 | トランスフォーム・ジャパン株式会社 | 化合物半導体装置及びその製造方法 |
JP6161246B2 (ja) * | 2012-09-28 | 2017-07-12 | トランスフォーム・ジャパン株式会社 | 半導体装置及び半導体装置の製造方法 |
JP2014072426A (ja) * | 2012-09-28 | 2014-04-21 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
JP6167889B2 (ja) * | 2012-12-21 | 2017-07-26 | 日亜化学工業株式会社 | 電界効果トランジスタとその製造方法 |
JP6161910B2 (ja) * | 2013-01-30 | 2017-07-12 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9847401B2 (en) * | 2014-02-20 | 2017-12-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method of forming the same |
WO2015125471A1 (ja) * | 2014-02-21 | 2015-08-27 | パナソニック株式会社 | 電界効果トランジスタ |
US9425301B2 (en) * | 2014-04-30 | 2016-08-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | Sidewall passivation for HEMT devices |
US9917195B2 (en) * | 2015-07-29 | 2018-03-13 | International Business Machines Corporation | High doped III-V source/drain junctions for field effect transistors |
JP6817559B2 (ja) * | 2015-10-27 | 2021-01-20 | パナソニックIpマネジメント株式会社 | 半導体装置 |
ITUB20155862A1 (it) * | 2015-11-24 | 2017-05-24 | St Microelectronics Srl | Transistore di tipo normalmente spento con ridotta resistenza in stato acceso e relativo metodo di fabbricazione |
US10038085B2 (en) * | 2016-01-08 | 2018-07-31 | Infineon Technologies Austria Ag | High electron mobility transistor with carrier injection mitigation gate structure |
WO2017171873A1 (en) * | 2016-04-01 | 2017-10-05 | Intel Corporation | Dopant diffusion barrier for source/drain to curb dopant atom diffusion |
WO2017210235A1 (en) * | 2016-06-01 | 2017-12-07 | Efficient Power Conversion Corporation | Multi-step surface passivation structures and methods for fabricating same |
TWI648858B (zh) * | 2016-06-14 | 2019-01-21 | 黃知澍 | Ga-face III族/氮化物磊晶結構及其主動元件與其製作方法 |
US9741840B1 (en) * | 2016-06-14 | 2017-08-22 | Semiconductor Components Industries, Llc | Electronic device including a multiple channel HEMT and an insulated gate electrode |
WO2018063489A1 (en) * | 2016-09-30 | 2018-04-05 | Hrl Laboratories, Llc | Doped gate dielectric materials |
DE112018003057T5 (de) * | 2017-06-15 | 2020-04-09 | Efficient Power Conversion Corporation | Gan-transistor im anreicherungsmodus mit selektiven und nicht selektiven ätzschichten für verbesserte gleichförmigkeit der gan-spacerdicke |
US10553712B2 (en) * | 2017-07-12 | 2020-02-04 | Indian Institute Of Technology | High-electron-mobility transistor (HEMT) |
US10804384B2 (en) * | 2017-12-27 | 2020-10-13 | Rohm Co., Ltd. | Semiconductor device and manufacturing method thereof |
WO2019132985A1 (en) * | 2017-12-29 | 2019-07-04 | Intel Corporation | Iii-v transistors with resistive gate contacts |
CN110034186B (zh) * | 2018-01-12 | 2021-03-16 | 中国科学院苏州纳米技术与纳米仿生研究所 | 基于复合势垒层结构的iii族氮化物增强型hemt及其制作方法 |
TWI679770B (zh) * | 2018-12-26 | 2019-12-11 | 杰力科技股份有限公司 | 氮化鎵高電子移動率電晶體及其閘極結構 |
US20200251582A1 (en) * | 2019-02-04 | 2020-08-06 | Qualcomm Incorporated | High electron mobility transistor (hemt) fin field-effect transistor (finfet) |
US11476359B2 (en) * | 2019-03-18 | 2022-10-18 | Wolfspeed, Inc. | Structures for reducing electron concentration and process for reducing electron concentration |
CN117976706A (zh) * | 2019-09-17 | 2024-05-03 | 联华电子股份有限公司 | 高电子迁移率晶体管 |
-
2019
- 2019-12-06 CN CN201911241221.7A patent/CN112928161B/zh active Active
- 2019-12-06 CN CN202311677085.2A patent/CN117855265A/zh active Pending
- 2019-12-31 US US16/731,058 patent/US11749740B2/en active Active
-
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- 2023-07-13 US US18/221,396 patent/US20230369448A1/en active Pending
- 2023-07-13 US US18/221,404 patent/US20230378314A1/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20120175631A1 (en) * | 2009-04-08 | 2012-07-12 | Alexander Lidow | ENHANCEMENT MODE GaN HEMT DEVICE WITH GATE SPACER AND METHOD FOR FABRICATING THE SAME |
US20120112202A1 (en) * | 2010-11-05 | 2012-05-10 | Samsung Electronics Co., Ltd. | E-Mode High Electron Mobility Transistors And Methods Of Manufacturing The Same |
US20160141404A1 (en) * | 2014-11-13 | 2016-05-19 | Taiwan Semiconductor Manufacturing Co., Ltd. | STRUCTURE FOR A GALLIUM NITRIDE (GaN) HIGH ELECTRON MOBILITY TRANSISTOR |
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