CN111257327A - Pattern defect detection method and detection system - Google Patents
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Abstract
The invention discloses a pattern defect detection method for an integrated circuit layout, which comprises the steps of obtaining design pattern data of each layer of photomask of each product; comparing the graph data of the scanned image with the graph data of the design graph in real time during defect scanning; if a certain crystal grain has a preset pattern defect, taking the crystal grain as a center to shoot a plurality of crystal grain target pattern images adjacent to the crystal grain according to a preset rule; and taking the plurality of crystal grain target patterns as pattern abnormal point images. The invention discloses a graphic defect detection system for detecting graphic defects of an integrated circuit layout. The invention can quickly, accurately and automatically detect the abnormal points of the graphic defects of the integrated circuit layout, and can improve the detection efficiency of the abnormal points, thereby improving the production efficiency.
Description
Technical Field
The invention relates to the field of integrated circuits, in particular to a pattern defect detection method for monitoring layout pattern defects in integrated circuit production. The invention also relates to a graphic defect detection system for monitoring the graphic defects of the layout in the production of the integrated circuit.
Background
In the production process of large scale integrated circuit wafers, with the diversification of products, each product needs to have a site to monitor the defect condition so as to prevent a large number of wafers from suffering from the same defect due to the absence of scanning sites, thereby reducing the yield of the products. As the transistor geometry decreases, the yield loss rate due to defects increases, and the defect size affecting the yield decreases, so the precision requirements for the optical scanning program and the electron beam scanning program are higher.
The commonly used flow of detecting the defects of the graph is that an optical scanning machine is used for extracting sampling points, bright field and dark field scanning is adopted as a commonly used optical scanning means, and then the appearance of the defects extracted by the sampling is observed through an electron beam scanning machine; the existing pattern detection defect scheme is relatively easy to distinguish by an electronic scanning machine aiming at defects such as particle, pattern loss or increase, but aiming at pattern shift or image reduction shrink defects, the optical scanning machine is easy to extract sampling. However, it is difficult to distinguish the abnormal point during the electron beam scanning, and as shown in fig. 1 to 4, it is easily mistaken for the front layer or the interference signal, and such defects can be found only by artificially performing left-right contrast shooting or equal yield image map feedback and finding the same image map as the bright field or dark field scanning. Since the problem cannot be found at the first time, the influence of the defect on the product cannot be reduced.
Disclosure of Invention
In this summary, a series of simplified form concepts are introduced that are simplifications of the prior art in this field, which will be described in further detail in the detailed description. This summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The invention aims to provide a graphic defect detection method capable of quickly, accurately and automatically detecting abnormal points of graphic defects of an integrated circuit layout.
The invention aims to solve another technical problem of providing a pattern defect detection method capable of quickly, accurately and automatically detecting abnormal points of pattern defects of an integrated circuit layout.
In order to solve the technical problem, the pattern defect detection method for detecting the pattern defects of the integrated circuit layout, provided by the invention, comprises the following steps of:
s1, acquiring design pattern data of each layer of photomask of each product;
optionally, the design graphic data adopts a graphic data description language file format gds file or tdb file which is most commonly used in the integrated circuit layout design;
s2, comparing the scanned image graph data with the design graph data in real time when scanning the defects;
alternatively, real-time data comparison may be accomplished by an electronic scanner using software programming (e.g., script files);
s3, if a certain crystal grain has a preset pattern defect, taking the crystal grain as the center to shoot a plurality of crystal grain target pattern images adjacent to the crystal grain according to a preset rule;
alternatively, the default pattern defect includes, but is not limited to, a pattern offset and/or a pattern shrink.
And S4, using the crystal grain target patterns as abnormal point images.
Optionally, the preset rule includes;
when the size difference between the target crystal grain pattern and the standard crystal grain pattern is larger than 10%, capturing images of the target crystal grain every 10 crystal grains up, down, left and right by taking the target crystal grain as the center, and continuously capturing the images for five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 5-10%, taking the target crystal grain as the center, capturing images of the target pattern every 8 crystal grains vertically, horizontally and vertically, and continuously capturing the images five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 2-5%, taking the target crystal grain as the center, capturing images of the target pattern every 5 crystal grains vertically, horizontally and vertically, and continuously capturing the images for five times;
when the difference between the size of the target crystal grain pattern and the standard crystal grain is 1-2%, taking the target crystal grain as the center, capturing images of the target pattern every 3 crystal grains vertically, horizontally and horizontally, and continuously capturing the images for ten times;
when the difference between the target crystal grain pattern and the standard crystal grain size is less than 1%, the target crystal grain is used as the center, images of the target pattern are captured every 1 crystal grain in the vertical, horizontal and vertical directions, and the images are captured for ten times continuously.
Alternatively, the standard crystal grain is a crystal grain with a graphic coordinate of [0,0 ].
The invention provides a graphic defect detection system for detecting graphic defects of an integrated circuit layout, which comprises:
the importing module is suitable for acquiring design graph data of each layer of photomask of each product and importing the design graph data into the table end of the electron beam scanner;
optionally, the design graph data imported by the import module is a gds file or a tdb file;
the comparison module is suitable for comparing the scanned image graphic data with the design graphic data in real time;
and the shooting module is suitable for taking the crystal grain with the preset graphic defect as a center, shooting a plurality of crystal grain target graphic images adjacent to the crystal grain according to a preset rule, and taking the plurality of crystal grain target graphic images as graphic abnormal point images.
Optionally, the default pattern defect includes, but is not limited to, pattern offset and/or pattern shrink;
optionally, the preset rule includes;
when the size difference between the target crystal grain pattern and the standard crystal grain pattern is larger than 10%, capturing images of the target crystal grain every 10 crystal grains up, down, left and right by taking the target crystal grain as the center, and continuously capturing the images for five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 5-10%, taking the target crystal grain as the center, capturing images of the target pattern every 8 crystal grains vertically, horizontally and vertically, and continuously capturing the images five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 2-5%, taking the target crystal grain as the center, capturing images of the target pattern every 5 crystal grains vertically, horizontally and vertically, and continuously capturing the images for five times;
when the difference between the size of the target crystal grain pattern and the standard crystal grain is 1-2%, taking the target crystal grain as the center, capturing images of the target pattern every 3 crystal grains vertically, horizontally and horizontally, and continuously capturing the images for ten times;
when the difference between the target crystal grain pattern and the standard crystal grain size is less than 1%, the target crystal grain is used as the center, images of the target pattern are captured every 1 crystal grain in the vertical, horizontal and vertical directions, and the images are captured for ten times continuously.
Alternatively, the standard crystal grain is a crystal grain with a graphic coordinate of [0,0 ].
The technical principle of the invention is that GDS of each layer of photomask of each product is introduced into the platform end of an electron beam scanner, when defect detection review is carried out, the graph pattern on the image is compared with the GDS file graph in real time, if the problem of graph shift or graph reduction is found, image shooting is carried out on left and right crystal grains die according to the degree (for example, percentage) of the graph shift or the graph reduction in the size of the shell, manual judgment is not needed, the platform is paused, and then the crystal grain die shooting is carried out by comparing the left and right. The invention can realize the rapid, accurate and automatic detection of the abnormal points of the graphic defects of the integrated circuit layout, and can improve the detection efficiency of the abnormal points, thereby improving the production efficiency.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention, are incorporated in and constitute a part of this specification. The drawings are not necessarily to scale, however, and may not be intended to accurately reflect the precise structural or performance characteristics of any given embodiment, and should not be construed as limiting or restricting the scope of values or properties encompassed by exemplary embodiments in accordance with the invention. The invention will be described in further detail with reference to the following detailed description and accompanying drawings:
FIG. 1 is a partial schematic diagram of a normal layout pattern, in which the column A is used as a comparison pattern and compared with the column B in FIG. 2, and abnormal points cannot be seen.
FIG. 2 is a partial schematic view of a defect layout pattern.
FIG. 3 is a diagram illustrating the normal layout pattern expansion range.
Fig. 4 is a schematic diagram of the enlarged range of the defect layout pattern, and as can be seen from comparison between D in fig. 4 and C in fig. 3, a pattern reduction abnormal point appears at D in fig. 4.
FIG. 5 is a diagram illustrating abnormal shooting points according to the preset rule of the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and technical effects of the present invention will be fully apparent to those skilled in the art from the disclosure in the specification. The invention is capable of other embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the general spirit of the invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict. The following exemplary embodiments of the present invention may be embodied in many different forms and should not be construed as limited to the specific embodiments set forth herein. It is to be understood that these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the technical solutions of these exemplary embodiments to those skilled in the art.
The first embodiment of the figure defect detection method for detecting the figure defects of the integrated circuit layout, provided by the invention, comprises the following steps:
s1, acquiring design pattern data of each layer of photomask of each product;
s2, comparing the scanned image graph data with the design graph data in real time when scanning the defects;
s3, if a certain crystal grain has a preset pattern defect, taking the crystal grain as the center to shoot a plurality of crystal grain target pattern images adjacent to the crystal grain according to a preset rule;
and S4, using the crystal grain target patterns as abnormal point images.
The first embodiment of the present invention can shoot the left and right dies according to the degree (e.g., percentage) of the pattern shift or the pattern reduction, without human judgment, and pause the machine and then shoot the left and right dies. The invention can realize the rapid, accurate and automatic detection of the abnormal points of the graphic defects of the integrated circuit layout and can improve the production efficiency.
The second embodiment of the pattern defect detection method for integrated circuit layout pattern defect detection provided by the invention comprises the following steps:
s1, acquiring the gds file or tdb file of each layer of photomask of each product;
s2, comparing the scanned image graph data with the design graph data in real time when scanning the defects;
s3, if some crystal grain has pattern deviation and or pattern reduction, taking the crystal grain as center to shoot a plurality of crystal grain target pattern images adjacent to the crystal grain according to preset rules;
s4, referring to fig. 5, the plurality of grain target patterns are defined as pattern singular point images.
The preset rules comprise;
when the size difference between the target crystal grain pattern and the standard crystal grain pattern is larger than 10%, capturing images of the target crystal grain every 10 crystal grains up, down, left and right by taking the target crystal grain as the center, and continuously capturing the images for five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 5-10%, taking the target crystal grain as the center, capturing images of the target pattern every 8 crystal grains vertically, horizontally and vertically, and continuously capturing the images five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 2-5%, taking the target crystal grain as the center, capturing images of the target pattern every 5 crystal grains vertically, horizontally and vertically, and continuously capturing the images for five times;
when the difference between the size of the target crystal grain pattern and the standard crystal grain is 1-2%, taking the target crystal grain as the center, capturing images of the target pattern every 3 crystal grains vertically, horizontally and horizontally, and continuously capturing the images for ten times;
when the difference between the target crystal grain pattern and the standard crystal grain size is less than 1%, the target crystal grain is used as the center, images of the target pattern are captured every 1 crystal grain in the vertical, horizontal and vertical directions, and the images are captured for ten times continuously.
Wherein the standard crystal grains are crystal grains with a graphic coordinate of [0,0 ].
The first embodiment of the graphic defect detecting system for detecting graphic defects of integrated circuit layout provided by the invention comprises the following components:
the importing module is suitable for acquiring design graph data of each layer of photomask of each product and importing the design graph data into the table end of the electron beam scanner;
the comparison module is suitable for comparing the scanned image graphic data with the design graphic data in real time;
and the shooting module is suitable for taking the crystal grain with the preset graphic defect as a center, shooting a plurality of crystal grain target graphic images adjacent to the crystal grain according to a preset rule, and taking the plurality of crystal grain target graphic images as graphic abnormal point images.
The second embodiment of the graphic defect detecting system for detecting graphic defects of integrated circuit layout provided by the invention comprises the following components:
the system comprises an import module, a storage module and a display module, wherein the import module is suitable for acquiring a gds file or a tdb file of each layer of photomask of each product; leading in a table end of an electron beam scanner;
the comparison module is suitable for comparing the scanned image graphic data with the design graphic data in real time;
and the shooting module is suitable for taking the crystal grains with graphic offset and/or graphic reduced as the center, shooting a plurality of crystal grain target graphic images adjacent to the crystal grains according to a preset rule, and taking the plurality of crystal grain target graphics as graphic abnormal point images.
The preset rules comprise;
when the size difference between the target crystal grain pattern and the standard crystal grain pattern is larger than 10%, capturing images of the target crystal grain every 10 crystal grains up, down, left and right by taking the target crystal grain as the center, and continuously capturing the images for five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 5-10%, taking the target crystal grain as the center, capturing images of the target pattern every 8 crystal grains vertically, horizontally and vertically, and continuously capturing the images five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 2-5%, taking the target crystal grain as the center, capturing images of the target pattern every 5 crystal grains vertically, horizontally and vertically, and continuously capturing the images for five times;
when the difference between the size of the target crystal grain pattern and the standard crystal grain is 1-2%, taking the target crystal grain as the center, capturing images of the target pattern every 3 crystal grains vertically, horizontally and horizontally, and continuously capturing the images for ten times;
when the difference between the target crystal grain pattern and the standard crystal grain size is less than 1%, the target crystal grain is used as the center, images of the target pattern are captured every 1 crystal grain in the vertical, horizontal and vertical directions, and the images are captured for ten times continuously.
Wherein the standard crystal grains are crystal grains with a graphic coordinate of [0,0 ].
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
The present invention has been described in detail with reference to the specific embodiments and examples, but these are not intended to limit the present invention. Many variations and modifications may be made by one of ordinary skill in the art without departing from the principles of the present invention, which should also be considered as within the scope of the present invention.
Claims (10)
1. A pattern defect detection method is used for detecting pattern defects of an integrated circuit layout, and is characterized by comprising the following steps:
s1, acquiring design pattern data of each layer of photomask of each product;
s2, comparing the scanned image graph data with the design graph data in real time when scanning the defects;
s3, if a certain crystal grain has a preset pattern defect, taking the crystal grain as the center to shoot a plurality of crystal grain target pattern images adjacent to the crystal grain according to a preset rule;
and S4, using the crystal grain target patterns as abnormal point images.
2. The pattern defect detecting method of claim 1, wherein: the design drawing data is a gds file or a tdb file.
3. The pattern defect detecting method of claim 1, wherein: the preset pattern defect is pattern offset and/or pattern reduction.
4. The pattern defect detecting method of claim 1, wherein: the preset rules comprise
When the size difference between the target crystal grain pattern and the standard crystal grain pattern is larger than 10%, capturing images of the target crystal grain every 10 crystal grains up, down, left and right by taking the target crystal grain as the center, and continuously capturing the images for five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 5-10%, taking the target crystal grain as the center, capturing images of the target pattern every 8 crystal grains vertically, horizontally and vertically, and continuously capturing the images five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 2-5%, taking the target crystal grain as the center, capturing images of the target pattern every 5 crystal grains vertically, horizontally and vertically, and continuously capturing the images for five times;
when the difference between the size of the target crystal grain pattern and the standard crystal grain is 1-2%, taking the target crystal grain as the center, capturing images of the target pattern every 3 crystal grains vertically, horizontally and horizontally, and continuously capturing the images for ten times;
when the difference between the target crystal grain pattern and the standard crystal grain size is less than 1%, the target crystal grain is used as the center, images of the target pattern are captured every 1 crystal grain in the vertical, horizontal and vertical directions, and the images are captured for ten times continuously.
5. The pattern defect detecting method of claim 4, wherein: the standard crystal grain is a crystal grain with a graphic coordinate of [0,0 ].
6. A pattern defect detecting system is used for detecting the pattern defects of an integrated circuit layout at the table end of an electron beam scanning machine, and is characterized by comprising the following components:
the importing module is suitable for acquiring design graph data of each layer of photomask of each product and importing the design graph data into the table end of the electron beam scanner;
the comparison module is suitable for comparing the scanned image graphic data with the design graphic data in real time;
and the shooting module is suitable for taking the crystal grain with the preset graphic defect as a center, shooting a plurality of crystal grain target graphic images adjacent to the crystal grain according to a preset rule, and taking the plurality of crystal grain target graphic images as graphic abnormal point images.
7. The pattern defect detection system of claim 6, wherein: the design graphic data imported by the import module is a gds file or a tdb file.
8. The pattern defect detection system of claim 6, wherein: the preset pattern defect is pattern offset and/or pattern reduction.
9. The graphic defect detection system of claim 6, wherein the preset rules comprise:
when the size difference between the target crystal grain pattern and the standard crystal grain pattern is larger than 10%, capturing images of the target crystal grain every 10 crystal grains up, down, left and right by taking the target crystal grain as the center, and continuously capturing the images for five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 5-10%, taking the target crystal grain as the center, capturing images of the target pattern every 8 crystal grains vertically, horizontally and vertically, and continuously capturing the images five times;
when the difference between the target crystal grain pattern and the standard crystal grain size is 2-5%, taking the target crystal grain as the center, capturing images of the target pattern every 5 crystal grains vertically, horizontally and vertically, and continuously capturing the images for five times;
when the difference between the size of the target crystal grain pattern and the standard crystal grain is 1-2%, taking the target crystal grain as the center, capturing images of the target pattern every 3 crystal grains vertically, horizontally and horizontally, and continuously capturing the images for ten times;
when the difference between the target crystal grain pattern and the standard crystal grain size is less than 1%, the target crystal grain is used as the center, images of the target pattern are captured every 1 crystal grain in the vertical, horizontal and vertical directions, and the images are captured for ten times continuously.
10. The pattern defect detection system of claim 9, wherein: the standard crystal grain is a crystal grain with a graphic coordinate of [0,0 ].
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