CN110069026B

CN110069026B - Self-adaptive IO monitor

Info

Publication number: CN110069026B
Application number: CN201910234152.0A
Authority: CN
Inventors: 吴宝锟; 李海金; 吴宝深; 杨青勇; 吴与伦; 吴志捷; 张宇琪; 刘胜永; 刘青正; 窦鹏; 钟绍伟; 甘芳; 吴金
Original assignee: Liuzhou Essy Technology Co ltd
Current assignee: Liuzhou Essy Technology Co ltd
Priority date: 2019-03-26
Filing date: 2019-03-26
Publication date: 2022-03-25
Anticipated expiration: 2039-03-26
Also published as: CN110069026A

Abstract

An adaptive IO monitor comprises two controlled current sources, two uncontrolled current sources, a current limiting switch controller and an external port; the two controlled current sources are respectively a controlled switch type current-limiting driver I and a controlled switch type current-limiting driver II; the two uncontrolled current sources are an uncontrolled current source I and an uncontrolled current source II respectively; the external ports comprise a load driving power supply port, a load driving power output port, a working power supply input port of the self-adaptive IO monitor, a load state detection signal input end, a bidirectional port II and a public port; the bidirectional port II is used as a common bidirectional port for inputting a load state detection signal output and a power output control signal whether the load is driven or not; the bidirectional port IIDi/o of the self-adaptive IO monitor has bidirectional performance, direction line control is not needed, and whether the load driven by the bidirectional port IIDi/o exists or not can be reflected to a control system through a load driving line in time.

Description

Self-adaptive IO monitor

Technical Field

The invention relates to a self-adaptive IO monitor, in particular to a signal level state detection and load drive control technology in the field of automatic control, which is a self-adaptive input and output control technology without a direction control line and is suitable for the field of artificial intelligent control systems and intelligent reconstruction projects of existing systems.

Background

In practical application, aiming at an application environment with scarce controller I/O resources, when input or output interface resources of a microcontroller are not enough to use, the input or output interface resources must be expanded through a peripheral circuit; when the expanded I/O port needs to be operated in a bidirectional mode, a direction control line must be configured for the expansion through a peripheral circuit, and consumption of I/O resources of the microcontroller which is in short supply originally is increased.

For the devices such as the I/O control board, the I/O control card, the I/O control module and the like which are in volume production and are in fixed shapes, no matter the devices are input devices or output devices, although more margin is reserved, as long as the requirement of one counter vector is not enough, a device with the counter vector has to be additionally arranged. Such as: when an output port drive needs to be added in the input and output devices which just use up the output port, although enough input ports still remain, an output device needs to be added; when an input sampling port needs to be added to the input and output devices which just use up the input port, an input device needs to be added.

In the engineering debugging process, if the quantity in one direction (input or output direction) in the input or output quantity reserved before is found to be insufficient, although the other direction quantity (output or input direction) has enough margin, the equipment for increasing the required direction quantity can solve the problem, so that the scheme decided before has to be modified.

For a traditional control system, a control output line cannot reflect whether a resistive load exists or not, and is a serious defect for safety indication (a safety indicator lamp cannot reflect to the control system after being burnt out), and further cannot provide beneficial contribution for the artificial intelligence era.

Disclosure of Invention

The invention provides a self-adaptive IO monitor, which mainly comprises two controlled current sources, two uncontrolled current sources and a current-limiting switch controller C, wherein for the controller, a bidirectional port IIDi/o has bidirectional performance and does not need directional line control, the command of a control system accessing a load through the bidirectional port is automatically identified to check whether the load exists or not or whether the load is required to execute certain operation, the existence of the load driven by the control system can be reflected to the control system through a load driving line in time, and simultaneously, the soft and hardware expenses are saved. To solve the disadvantages of the prior art.

The technical scheme adopted by the invention is as follows: an adaptive IO monitor comprises two controlled current sources, two uncontrolled current sources, a current limiting switch controller and an external port;

the two controlled current sources are respectively a controlled switch type current-limiting driver I and a controlled switch type current-limiting driver II;

the two uncontrolled current sources are an uncontrolled current source I and an uncontrolled current source II respectively;

the external ports comprise a load driving power supply port, a load driving power output port, a working power supply input port of the self-adaptive IO monitor, a load state detection signal input end, a bidirectional port II and a public port; the bidirectional port II is used as a common bidirectional port for inputting a load state detection signal output and a power output control signal whether the load is driven or not;

the controlled switch type current-limiting driver I is a current-limiting driver used for limiting the maximum current output; the power supply input end of the controlled switch type current-limiting driver I is connected with the load driving power supply port, the output end of the controlled switch type current-limiting driver I is connected with the load driving power output port, and the input end of the controlled switch type current-limiting driver I is connected with the output end of the current-limiting switch controller;

the uncontrolled current source I is a current-limiting driver which is used for limiting the maximum current amount flowing from the working power supply input port to the common port through the uncontrolled current source I, and provides bias current for the current-limiting switch controller, pulls up the level of the bidirectional port II, and adjusts the voltage value of the maximum low level of the bidirectional port II; the input end of the uncontrolled current source I is connected with the input port of the working power supply, and the output end of the uncontrolled current source I and the input end of the current-limiting switch controller are connected to the bidirectional port II in common;

the uncontrolled current source II works in a constant current source mode, the input end of the uncontrolled current source II is connected with the input end of the load state detection signal, the output end of the uncontrolled current source II is connected with the input end of the switch type current-limiting driver II, and the grounding end of the uncontrolled current source II is connected with the public port;

the controlled switch type current-limiting driver II is a current-limiting driver used for limiting the maximum value of current sucked from the bidirectional port II; the output end of the controlled switch type current-limiting driver II is connected with a bidirectional port II, the input end of the controlled switch type current-limiting driver II is connected with the output end of an uncontrolled current source II, and the grounding end of the controlled switch type current-limiting driver II is connected with a common port.

The further technical scheme is as follows: the controlled switch type current-limiting driver I and the current-limiting switch controller are formed by a circuit of a first electronic amplifier and a first current limiter; the first current limiter is arranged to allow a maximum value of current to flow to the load drive power output port; the first electronic amplifier controls the on and off states of the first current limiter through an output port of the first electronic amplifier;

the internal bias of the first electronic amplifier is used as an uncontrolled current source I;

the controlled switch type current-limiting driver II and the uncontrolled current source II are formed by a circuit of a second electronic amplifier and a second current limiter; the second current limiter is set as a current limiter which allows the maximum value of the current from the bidirectional port II to be absorbed; the second electronic amplifier detects the level state of the load state detection signal input end through the input port of the second electronic amplifier; the power supply end of the first electronic amplifier and the power supply end of the second electronic amplifier are connected with a working power supply input port in common, the homodromous input port of the first electronic amplifier and the input port of the second current limiter are connected with a bidirectional port II in common, and the output port of the first electronic amplifier is connected with the input port of the first current limiter; the power end of the first current limiter is connected with the load driving power supply port, and the output end of the first current limiter is connected with the load driving power output port; the output port of the second current limiter is connected with the output port of the second electronic amplifier; and the reverse input port of the second electronic amplifier is connected with the load state detection signal input end.

The further technical scheme is as follows: the load driving power supply port is connected with the working power supply input port to form a single power supply working state, and the load driving power output port is connected with the load state detection signal input end and combined into a bidirectional port I.

The further technical scheme is as follows: the electronic amplifier is composed of 1 or more than 2 of operational amplifier, bipolar semiconductor triode or unipolar field effect triode; the electronic amplifier is composed of an operational amplifier; or is composed of a bipolar semiconductor triode; or is formed by a unipolar field effect transistor; or a triode mixed amplifier composed of a bipolar semiconductor triode and a unipolar field effect triode; or a pure bipolar semiconductor amplifier consisting of a plurality of bipolar semiconductor triodes; or a pure unipolar field effect amplifier composed of a plurality of unipolar field effect transistors; the bipolar triode is provided with a PNP type and an NPN type, and the unipolar field effect triode is provided with an N channel and a P channel.

The further technical scheme is as follows: when the amplification factor of the electronic amplifier is 1 or the electronic amplifier is only used for current limiting, the electronic amplifier adopts a pure resistor.

The further technical scheme is as follows: the load driving power supply port and the working power supply input port are connected together and combined into a power supply input port to form a single power supply working state, and the load driving power output port and the load state detection signal input port are connected together and combined into a bidirectional port I;

the controlled switch type current-limiting driver I consists of a switch device I for limiting the maximum current output and a component II for adjusting the maximum driving current output value of the switch device I; the component II is used as a current-limiting switch controller;

the uncontrolled current source II consists of a constant current input device, a component I for adjusting the constant current value of the constant current input device and a component V for adjusting the level value of a common point connected with the constant current input device when the constant current input device enters a constant current working state;

the controlled switch type current-limiting driver II consists of a switch device II for limiting the maximum suction current and a component III for adjusting the maximum suction current value of the switch device II; the uncontrolled current source I is composed of a component IV which provides a pull-up level for the bidirectional port II and limits the maximum value of current output from the bidirectional port II.

The further technical scheme is as follows: the switching device I is a PNP type transistor working in a current-limiting working state; the constant current input device is an NPN type transistor I working in a constant current working state; the switching device II is an NPN transistor II which works in a current-limiting working state; the component I is a first resistor, the component II is a second resistor, the component III is a third resistor, the component IV is a fourth resistor, and the component V is a fifth resistor;

the base electrode of the PNP type transistor is connected to the bidirectional port II through a second resistor, the emitter electrode of the PNP type transistor is connected to the power input port, and the collector electrode of the PNP type transistor is used as a load driving power output port and is connected to the bidirectional port I;

the base electrode of the NPN type transistor I is connected to a power supply input port through a first resistor R1, the collector electrode of the NPN type transistor I is used as a load state detection signal input end and connected to a bidirectional port I, and the emitter electrode of the NPN type transistor I is connected to a common port through a fifth resistor;

an emitter of the NPN transistor II is directly connected to the public port, a base of the NPN transistor II is connected to the emitter of the NPN transistor I through a third resistor, and a collector of the NPN transistor II is directly connected to the bidirectional port II;

and two ends of the fourth resistor are respectively connected with the bidirectional port II and the power supply input port.

The further technical scheme is as follows: the switching device I is a diode; the constant current input device is an NPN type transistor I working in a constant current working state; the switching device II is an NPN transistor II which works in a current-limiting working state; the component I is a first resistor, the component II is a second resistor, the component III is a third resistor, the component IV is a fourth resistor, and the component V is a fifth resistor;

the anode of the diode is connected to the bidirectional port II through a second resistor, and the cathode of the diode is connected to the bidirectional port I;

the base electrode of the NPN type transistor I is connected to a power supply input port through a first resistor, the collector electrode of the NPN type transistor I is used as a load state detection signal input end and connected to a bidirectional port I, and the emitter electrode of the NPN type transistor I is connected to a common port through a fifth resistor;

The further technical scheme is as follows: the switching device I is a unipolar field effect triode of a P channel working in a current-limiting working state; the constant current input device is an N-channel unipolar field effect triode I working in a constant current working state; the switching device II is an N-channel unipolar field effect triode II working in a current-limiting working state; the component I is a first resistor, the component II is a second resistor, the component III is a third resistor, the component IV is a fourth resistor, and the component V is a fifth resistor;

the grid electrode of the P-channel unipolar field effect triode is connected to the bidirectional port II through a second resistor, the source electrode of the P-channel unipolar field effect triode is connected to the power input port, and the drain electrode of the P-channel unipolar field effect triode is used as a load driving power output port and is connected to the bidirectional port I;

the grid electrode of the N-channel unipolar field effect triode I is connected to a power input port through a first resistor, the drain electrode of the N-channel unipolar field effect triode I is connected to a bidirectional port I as a load state detection signal input end, and the source electrode of the N-channel unipolar field effect triode I is connected to a common port through a fifth resistor;

the source electrode of the N-channel unipolar field effect transistor II is directly connected to the common port, the grid electrode of the N-channel unipolar field effect transistor II is connected to the source electrode of the N-channel unipolar field effect transistor I through a third resistor, and the drain electrode of the N-channel unipolar field effect transistor II is directly connected to the bidirectional port II;

The further technical scheme is as follows: the switching device I is a diode; the constant current input device is an N-channel unipolar field effect triode I working in a constant current working state; the switching device II is an N-channel unipolar field effect triode II working in a current-limiting working state; the component I is a first resistor, the component II is a second resistor, the component III is a third resistor, the component IV is a fourth resistor, and the component V is a fifth resistor;

Due to the adoption of the technical scheme, the self-adaptive IO monitor has the following beneficial effects:

1. when the hardware circuit is designed, the direction control lines of the bidirectional ports for external input and output need not to be considered which controller ports need to be consumed.

2. When software is designed, the operation of an external bidirectional port circuit outside the controller is the same as the operation of the port of the controller, and the direction control line is not required to be operated, so that the aim of completely having nothing to do with external equipment is achieved, and the software is convenient to transplant.

3. The software design efficiency is improved, the requirement degree of a programmer on hardware knowledge is reduced, the learning time is shortened, and only the problems related to the controller can be considered.

4. In teaching, experiment and debugging, the number of input lines and output lines is not considered, and the sequence problem of physical space is not worried, because any one from Di/o port to Di/Do port (corresponding to Doi port in the embodiment) is an adaptive bidirectional port.

5. In engineering practice, as long as the total number of reserved I/O port lines is enough, the problem that output lines are few or input lines are few is not worried about, engineering implementation, maintenance and modification are facilitated, and the cost of the corresponding stage is reduced.

6. On the side of an application person, whether a board, a card and a device are input by multiple inventory points or output by multiple inventory points is not considered, and only the inventory self-adaptive IO monitor is needed, so that the inventory and purchase cost is reduced, and the economic benefit is improved.

7. On the producer side, the input board, card and equipment production line, the output board, card and equipment production line and the raw material purchase, inventory and finished product inventory of the input or output board, card and equipment are not required to be considered.

8. On the seller side, only one kind of product is needed to be purchased and publicized, and the user requirements of input or output are met, so that the cost before and after sale can be reduced, and the economic benefit of the operation is improved.

9. In the practice of application and maintenance, the voltage for driving the load is irrelevant to the voltage at the controller end and can be externally connected according to the requirement, so that the replaceability of the load is particularly strong, the fault removal time is shortened, and the production stop loss caused by faults is reduced.

10. Because the signal with high voltage value is input through the port Di and then output from the port Di/o, the signal with low voltage value is changed into the signal with low voltage value smaller than Vcc, the circuit also has the chopping function, and the part with amplitude larger than Vcc in the input signal can be chopped off, so that the maximum amplitude of the input signal is limited within the range smaller than Vcc.

The technical features of the adaptive IO monitor of the present invention will be further described with reference to the accompanying drawings and embodiments.

Drawings

FIG. 1 is a schematic diagram of a basic structure of an adaptive IO monitor;

FIG. 2 is a schematic diagram of the basic structure of an adaptive IO monitor of example 1;

FIG. 3 is a schematic diagram of an adaptive IO monitor external microprocessor of example 1;

FIG. 4 is a schematic diagram of the basic structure of the adaptive IO monitor of example 2;

FIG. 5 is a schematic diagram of the basic structure of the adaptive IO monitor of example 3-1;

FIG. 6 is a schematic diagram of the basic structure of the adaptive IO monitor of example 3-2;

FIG. 7 is a schematic diagram of the basic structure of the adaptive IO monitor of example 3-3;

FIG. 8 is a schematic diagram of the basic structure of the adaptive IO monitor of examples 3-4;

fig. 9 is an application schematic diagram of a prior art photocoupler.

In the figure:

1-adaptive IO monitor, 2-microcontroller.

Detailed Description

An adaptive IO monitor 1, as shown in fig. 1, includes two controlled current sources, two uncontrolled current sources, a current limiting switch controller C and an external port.

The two controlled current sources are respectively a controlled switch type current-limiting driver IO 2 and a controlled switch type current-limiting driver II IO 3;

the two uncontrolled current sources are an uncontrolled current source I4 and an uncontrolled current source II Ii respectively;

the external ports comprise a load driving power supply port Vdd, a load driving power output port Do, a working power supply input port Vcc of the self-adaptive IO monitor, a load state detection signal input end Di, a bidirectional port II Di/o and a common port Gnd; and the bidirectional port IIDi/o is used as a common bidirectional port for the output of the load state detection signal and the input of a power output control signal for driving or not driving the load.

The controlled switched current limit driver io 2 is a current limit driver for limiting a maximum current output; the power input end of the controlled switch type current-limiting driver IO 2 is connected with a load driving power supply port Vdd, the output end thereof is connected with a load driving power output port Do, and the input end thereof is connected with the output end of a current-limiting switch controller C; when turned on, the impedance between the load drive power supply port Vdd and the load drive power output port Do becomes small, allowing a current to pass through within a range of a set value, the maximum value of which is limited.

The uncontrolled current source II 4 is a current-limiting driver for limiting the maximum amount of current flowing from the working power supply input port Vcc to the common port Gnd through the uncontrolled current source II 4, and provides a bias current to the current-limiting switch controller C to pull up the level of the bidirectional port II Di/o and adjust the voltage value of the maximum low level of the bidirectional port II Di/o; the input end of the uncontrolled current source I4 is connected with the working power supply input port Vcc, and the output end of the uncontrolled current source I4 and the input end of the current limiting switch controller C are connected with the bidirectional port IIDi/o in common.

The uncontrolled current source II Ii works in a constant current source mode, the input end of the uncontrolled current source II Ii is connected with the load state detection signal input end Di, the output end of the uncontrolled current source II Ii is connected with the input end of the switch type current-limiting driver II IO3, and the ground end of the uncontrolled current source II Ii is connected with the common port Gnd; when a sufficiently large current is input from the voltage status detection port (i.e., the load status detection signal input Di), a control signal is output to the controlled switched current-limiting driver ii IO3 and is turned on. The magnitude of this sufficiently large current is determined by a constant current source circuit within the uncontrolled current source Ii.

The controlled switched current-limiting driver IIIO 3 is a current-limiting driver for limiting the maximum value of current drawn from the bi-directional port IIDi/o; the controlled switched current-limited driver iiio 3 has its output connected to the bi-directional port iidi/o, its input connected to the output of the uncontrolled current source iii, and its ground connected to the common port Gnd. When opened, allows no more than a set value of current to pass.

The current limit switch controller C is used to switch the controlled switched current limit driver io 2. When a switching signal is applied to the bi-directional port iidi/O that is required to turn on the controlled switched current limiting driver io 2, the current limiting switch controller C turns on the controlled switched current limiting driver io 2 to place the controlled switched current limiting driver io 2 in an on state to allow current from the power supply Vdd to pass through to draw current from the electrical load.

The working power supply input port Vcc is an access port (see fig. 3) for connecting the working power supply Vcc of an external microcontroller 2 (MCU for short) to which the adaptive IO monitor of the present invention is applied, and the power supply connected to this port is also the working power supply of the adaptive IO monitor of the present invention.

The load driving power supply port Vdd and the load driving power output port Do are load driving ports. Two ports of a controlled switched current limited driver IO 2 connected in series between an external electrical load and a drive power supply correspond to two terminal ports of a switch in a closed loop.

The load state detection signal input terminal Di is an input port to which a sampling detection signal of a sampled point is connected.

And the public port Gnd is a wiring port of the circuit and a public end connected with an external circuit.

The internal circuit of the self-adaptive IO monitor can be composed of different electronic components, and the adopted electronic components can be integrated on one chip. The following different embodiments are possible depending on the different electronic component configurations.

Example 1:

as shown in FIG. 2, the adaptive IO monitor of this embodiment comprises the above-mentioned two controlled current sources (i.e. the controlled switch-type current-limiting driver IO 2 and the controlled switch-type current-limiting driver IIIO 3), two uncontrolled current sources (i.e. the uncontrolled current source II 4 and the uncontrolled current source II), a current-limiting switch controller C and an external port (i.e. the load-driving power supply port Vdd, the load-driving power output port Do, the operating power input port Vcc of the adaptive IO monitor, the load state detection signal input terminal Di, the bidirectional port IIDi/O and the common port Gnd; the bidirectional port IIDi/O is used as a bidirectional port shared by the load state detection signal output and the power output control signal input whether the load is driven or not). The controlled switch type current-limiting driver IO 2 and the current-limiting switch controller C are formed by a circuit of a first electronic amplifier Ao1 and a first current limiter I2; the first current limiter I2 is a current limiter set to allow a maximum value of current to flow to the load drive power output port Do; the first electronic amplifier Ao1 controls the on and off states of the first current limiter I2 through its output port Do 1.

The internal bias of the first electronic amplifier Ao1 acts as an uncontrolled current source i 4.

The controlled switch type current-limiting driver II IO3 and the uncontrolled current source II Ii are formed by a circuit of a second electronic amplifier Ai1 and a second current limiter I1; the second current limiter I1 is a current limiter arranged to allow the maximum value of the current from the bidirectional port ndi/o to be absorbed; the second electronic amplifier Ai1 detects the level state of the load state detection signal input terminal Di through its input terminal Di 1; the power supply end of the first electronic amplifier Ao1 and the power supply end of the second electronic amplifier Ai1 are connected with a working power supply input port Vcc in common, the non-inverting input port of the first electronic amplifier Ao1 and the input port of the second current limiter I1 are connected with a bidirectional port IIDi/o in common, and the output port Do1 of the first electronic amplifier Ao1 is connected with the input port of the first current limiter I2; the power end of the first current limiter I2 is connected with the load driving power supply port Vdd, and the output end thereof is connected with the load driving power output port Do; the output port of the second current limiter I1 is connected with the output port of a second electronic amplifier Ai 1; the inverting input port of the second electronic amplifier Ai1 is connected to the load state detection signal input Di.

Referring to fig. 3, the operating power input port Vcc is externally connected to the operating power input port Vcc of the microprocessor 2; the bidirectional port II Di/o is externally connected with an input/output bidirectional port Di/o of the microprocessor 2; the common port Gnd is externally connected with a ground port of the microprocessor 2.

Example 2:

as shown in fig. 4, the internal circuit of the adaptive IO monitor of this embodiment is substantially the same as that of the first embodiment, except that: the external port has a merging condition, specifically: the load driving power supply port Vdd is connected with the working power supply input port Vcc to form a single power supply working state, and the load driving power output port Do is connected with the load state detection signal input end Di and combined into a bidirectional port IDio.

The controlled switch type current-limiting driver II IO3 and the uncontrolled current source II Ii are formed by a circuit of a second electronic amplifier Ai1 and a second current limiter I1; the second current limiter I1 is a current limiter arranged to allow the maximum value of the current from the bidirectional port ndi/o to be absorbed; the second electronic amplifier Ai1 detects the level state of the bidirectional port Idio through its input port Di 1; the power supply end of the first electronic amplifier Ao1 and the power supply end of the second electronic amplifier Ai1 are connected with a working power supply input port Vcc in common, the non-inverting input port of the first electronic amplifier Ao1 and the input port of the second current limiter I1 are connected with a bidirectional port IIDi/o in common, and the output port Do1 of the first electronic amplifier Ao1 is connected with the input port of the first current limiter I2; the power end of the first current limiter I2 is connected with the load driving power supply port Vdd, and the output end thereof is connected with the load driving power output port Do; the output port of the second current limiter I1 is connected with the output port of a second electronic amplifier Ai 1; the inverting input port Di1 of the second electronic amplifier Ai1 is connected to the bi-directional port idio.

The electronic amplifiers in

embodiments

1 and 2 are constituted by 1 kind or any 2 kinds or more than 2 kinds of operational amplifiers, bipolar semiconductor transistors, or unipolar field effect transistors. Namely the electronic amplifier or the operational amplifier; or is composed of a bipolar semiconductor triode; or is formed by a unipolar field effect transistor; or a triode mixed amplifier composed of a bipolar semiconductor triode and a unipolar field effect triode; or a pure bipolar semiconductor amplifier consisting of a plurality of bipolar semiconductor triodes; or a pure unipolar field effect amplifier composed of a plurality of unipolar field effect transistors. The specific implementation method has various combinations, the bipolar triode has a PNP type and an NPN type, the unipolar field effect triode has an N channel and a P channel, in the specific application, part of components can be replaced by diodes, an amplifier formed by the triodes can be replaced by an operational amplifier, and in addition: the resistor may be an operational amplifier or a unipolar field effect transistor. When the amplification factor of the electronic amplifier is 1 or the electronic amplifier is only used for current limiting, the electronic amplifier can also adopt a pure resistor.

Example 3:

the adaptive IO monitor of this embodiment comprises two controlled current sources (i.e. controlled switched current limiting driver IO 2 and controlled switched current limiting driver iio 3), two uncontrolled current sources (i.e. uncontrolled current source Ii 4 and uncontrolled current source iii), a current limiting switch controller C and the external port described above. The load driving power supply port Vdd and the working power supply input port Vcc are connected together and combined into a power supply input port Vc to form a single power supply working state, and the load driving power output port Do and the load state detection signal input end Di are connected together and combined into a two-way port I Dio shared by a load state detection signal input and a load driving power output; the bi-directional port idio is also a load port.

The controlled switch type current-limiting driver IO 2 is composed of a switch device I for limiting the maximum current output and a component II for adjusting the maximum driving current output value of the switch device I for limiting the maximum current output; the component II for adjusting the maximum driving current output value of the switching device I for limiting the maximum current output is used as a current-limiting switching controller C;

the uncontrolled current source II Ii consists of a constant current input device, a component I for adjusting the constant current value of the constant current input device and a component V for adjusting the level value of a common point E connected with the constant current input device when the constant current input device enters a constant current working state;

the controlled switch type current-limiting driver II IO3 is composed of a switch device II for limiting the maximum suction current and a component III for adjusting the maximum suction current value of the switch device II for limiting the maximum suction current; and the uncontrolled current source II 4 consists of a component IV which provides a pull-up level for the bidirectional port II Di/o and limits the maximum value of the current output from the bidirectional port II Di/o.

The switching device I is a unipolar field effect transistor or a bipolar semiconductor transistor or a diode; the constant current input device and the switch device II are unipolar field effect transistors or bipolar semiconductor transistors. There are many combinations of specific implementations, and several different examples are listed below.

Example 3-1:

as shown in fig. 5, the adaptive IO monitor of this embodiment includes a power input port Vc, a bidirectional port idio, a bidirectional port iidi/o, and a common port Gnd as described in embodiment 3; and the switching device I, the constant current input device, the switching device II, the component I, the component II, the component III, the component IV and the component V. The switching device I is a PNP type transistor Q2 which works in a current-limiting working state; the constant current input device is an NPN type transistor I Q1 working in a constant current working state; the switching device II is an NPN transistor IIQ 3 working in a current-limiting working state; the component I is a first resistor R1, the component II is a second resistor R2, the component III is a third resistor R3, and the component IV is a fourth resistor R4; the component V is a fifth resistor Re;

the base electrode of the PNP type transistor Q2 is connected to the bidirectional port IIDi/o through a second resistor R2 and used for receiving input signals driven by power and limiting the maximum output current value of the switching device I; an emitter of the PNP type transistor Q2 is connected to a power supply input port Vc, and a collector of the PNP type transistor Q2 is connected to a bidirectional port Iodo as a load driving power output port Do; when the bidirectional port IIDi/o is input with a low level, the switching device I allows a current not greater than a maximum value to flow, the bidirectional port IDio has the capability of driving a load, and the load can be driven by the load as long as the load is connected between the bidirectional port IDio and the common port Gnd.

The base electrode of the NPN type transistor I is connected to a power supply input port Vc through a first resistor R1, the collector electrode of the NPN type transistor I is connected to a bidirectional port I Dio as a load state detection signal input end Di, the emitter electrode of the NPN type transistor I is connected to a common port Gnd through a fifth resistor Re, and the emitter electrode of the NPN type transistor I is connected to the base electrode of an NPN type transistor II Q3 through a third resistor R3; when the bi-directional port ndio port is in a high level state, a corresponding high level lower than the voltage of the power input port Vc is generated at a common connection point E between the emitter of the NPN transistor iq 1 and the fourth resistor Re and the third resistor R3, and the NPN transistor iq 3 is turned on to finally reflect that the bi-directional port iidi/o is in a low level state.

An emitter of the NPN transistor II Q3 is directly connected to the common port Gnd, a base of the NPN transistor II Q3 is connected to an emitter of the NPN transistor I Q1 through a third resistor R3, and a collector of the NPN transistor II Q3 is directly connected to the bidirectional port IIDi/o; and two ends of the fourth resistor R4 are respectively connected with the bidirectional port IIDi/o and the power supply input port Vc. Due to the special nature of the current limiting operation of NPN transistor iq 3, the drive signal applied to the bi-directional port ndi/o port is not inadvertently shorted. (when the driving current flowing into the bi-directional port ljdi/o is larger than the maximum current allowed to flow through the NPN transistor lq 3, the voltage at the bi-directional port ljdi/o will rise, which will eventually cause the PNP transistor Q2 in the on state to be saturated, and then maintain the PNP transistor Q2 in the saturated state through the fourth resistor R4).

Example 3-2:

as shown in fig. 6, the adaptive IO monitor of this embodiment includes a power input port Vc, a bidirectional port idio, a bidirectional port iidi/o, and a common port Gnd as described in embodiment 3; and the switching device I, the constant current input device, the switching device II, the component I, the component II, the component III, the component IV and the component V. The switching device I is a diode DG; the constant current input device is an NPN type transistor I Q1 working in a constant current working state; the switching device II is an NPN transistor IIQ 3 working in a current-limiting working state; the component I is a first resistor R1, the component II is a second resistor R2, the component III is a third resistor R3, the component IV is a fourth resistor R4, and the component V is a fifth resistor Re;

the diode DG is connected in series with a second resistor R2 to form a current limiting circuit (i.e. a controlled switched current limiting driver io 2) for limiting the output current, the anode of the diode DG being connected via a second resistor R2 to the bi-directional port iidi/O and the cathode thereof to the bi-directional port idio.

The base electrode of the NPN type transistor I Q1 is connected to a power supply input port Vc through a first resistor R1, the collector electrode of the NPN type transistor I Q1 is connected to a bidirectional port I Dio as a load state detection signal input end Di, and the emitter electrode of the NPN type transistor I Q1 is connected to a common port Gnd through a fifth resistor Re;

an emitter of the NPN transistor II Q3 is directly connected to the common port Gnd, a base of the NPN transistor II Q3 is connected to an emitter of the NPN transistor I Q1 through a third resistor R3, and a collector of the NPN transistor II Q3 is directly connected to the bidirectional port IIDi/o; and two ends of the fourth resistor R4 are respectively connected with the bidirectional port IIDi/o and the power supply input port Vc.

Examples 3 to 3:

as shown in fig. 7, the adaptive IO monitor of this embodiment includes a power input port Vc, a bidirectional port idio, a bidirectional port iidi/o, and a common port Gnd as described in embodiment 3; and the switching device I, the constant current input device, the switching device II, the component I, the component II, the component III, the component IV and the component V. The switching device I is a P-channel unipolar field effect transistor Q21 working in a current-limiting working state; the constant current input device is an N-channel unipolar field effect transistor I Q11 working in a constant current working state; the switching device II is an N-channel unipolar field effect transistor II Q31 working in a current-limiting working state; the component I is a first resistor R1, the component II is a second resistor R2, the component III is a third resistor R3, the component IV is a fourth resistor R4, and the component V is a fifth resistor Re;

a grid G2 of the P-channel unipolar field effect transistor Q21 is connected to the bidirectional port IIDi/o through a second resistor R2, a source S2 of the P-channel unipolar field effect transistor Q21 is connected to the power supply input port Vc, and a drain D2 of the P-channel unipolar field effect transistor Q21 is used as a load driving power output port and is connected to the bidirectional port I Dio;

a grid G1 of the N-channel unipolar field effect transistor I Q11 is connected to a power supply input port Vc through a first resistor R1, a drain D1 of the N-channel unipolar field effect transistor is connected to a bidirectional port I Dio as a load state detection signal input end, and a source S1 of the N-channel unipolar field effect transistor is connected to a common port Gnd through a fifth resistor Re;

a source S3 of the N-channel unipolar field effect transistor II Q31 is directly connected to the common port Gnd, a grid G3 of the N-channel unipolar field effect transistor II Q31 is connected to the source of the N-channel unipolar field effect transistor I Q11 through a third resistor R3, and a drain D3 of the N-channel unipolar field effect transistor II Q31 is directly connected to the bidirectional port II Di/o; and two ends of the fourth resistor R4 are respectively connected with the bidirectional port IIDi/o and the power supply input port Vc.

Examples 3 to 4:

as shown in fig. 8, the adaptive IO monitor of this embodiment includes a power input port Vc, a bidirectional port idio, a bidirectional port iidi/o, and a common port Gnd as described in embodiment 3; and the switching device I, the constant current input device, the switching device II, the component I, the component II, the component III, the component IV and the component V. The switching device I is a diode DG; the constant current input device is an N-channel unipolar field effect transistor I Q11 working in a constant current working state; the switching device II is an N-channel unipolar field effect transistor II Q31 working in a current-limiting working state; the component I is a first resistor R1, the component II is a second resistor R2, the component III is a third resistor R3, the component IV is a fourth resistor R4, and the component V is a fifth resistor Re;

The working principle of the self-adaptive IO monitor of the invention is as follows:

1. state level detection process

The detected state signal is connected between the load state detection signal input terminal Di and the common port Gnd. Relative to the level of the common port Gnd, when the state signal received by the load state detection signal input end Di is at a high level, an uncontrolled current source Ii in a constant current source mode has a current which is not larger than a set constant current value and flows in, the current is internally processed to generate a signal for driving a controlled switch type current-limiting driver Ii IO3 to be turned on, at the moment, the controlled switch type current-limiting driver Ii IO3 is connected with the common port Gnd or is in a low-resistance state, the level of the two-way port Ii Di/o is pulled down, namely, when the load state detection signal input end Di is at a high level, the two-way port Ii/o is changed into a low level; when the state signal of the port connected to the load state detection signal input end Di is at a low level, the uncontrolled current source IIIi working in a constant current source mode has no current flowing in, so that a signal for driving the controlled switch type current-limiting driver IIIO 3 to be opened is generated, the controlled switch type current-limiting driver II IO3 is in an off state, namely, the controlled switch type current-limiting driver II IO3 is in an open circuit or high impedance state with the common port Gnd, and the level of the bidirectional port II Di/o is in a state that the bidirectional port II Di/o can be pulled up by an external circuit, namely, when the load state detection signal input end Di is at a low level, the bidirectional port II Di/o allows the external circuit to pull up the bidirectional port II/o to a high level state.

2. Load device driving process

The driven load device is connected between the load drive power output port Do and the common port Gnd of the load drive supply. When the bi-directional port iidi/O is pulled down by an external circuit and is in a low level state, the current limit switch controller C outputs a control signal for turning on the controlled switch-type current limit driver io 2, so that the load driving power output port Do is connected with the load driving power supply port Vdd (or called a low-resistance state therebetween) and can generate a current flowing through the driving electrical load device. When high-level driving is needed, the load driving power supply port Vdd is connected with a device driving power supply, the load device needing to be driven is connected between the load driving power output port Do and the common port Gnd, after the two-way port II Di/o is ready, a low-level load device driving signal is provided for the two-way port II Di/o, the load driving power output port Do and the load driving power supply port Vdd are in a low-resistance state, and the load driving power output port Do obtains a high-level output with load driving capacity so that the load device obtains the driving power supply.

3. The key reason why the load driving power output port Do can be connected to one electrical contact with the load state detection signal input terminal Di is:

just as the two-way port iidi/O can be used for both output and input because of the principle of using a controlled switched current limiting driver iiio 3, the uncontrolled current source iii is a current source operating in a constant current source mode and the controlled switched current limiting driver IO 2 is a controlled switched current limiting driver whose maximum current allowed to pass is limited by design and production, so that the load drive power output port Do can be connected to an electrical connection at the same time as the load condition detection signal input Di. In order to prevent the logic state from being confused, the time sharing is used when the application is carried out. That is, the state level applied to the collected load state detection signal input terminal Di is not applied at the same time when applied to driving the load device, and the state level applied to the collected load state detection signal input terminal Di is not applied at the same time when applied to driving the load device. But as an interface device with a bidirectional function, it is one that does not require a direction control line, has an adaptive function, and does not require any intervention of a programmer.

The self-adaptive IO monitor has the advantages that:

1. there is no need to use a direction control line to tell a device using the adaptive IO monitor described herein whether it is operating in an input state or an output state at a certain time.

2. Wide input voltage range: the voltage at which the high level is input can be realized in a range from a few volts to a few hundred volts, depending on the maximum voltage value and the maximum dissipated power that the uncontrolled current source Ii can withstand.

3. The input sinking current is small and has little influence on the detected point, depending on the maximum current value allowed by the uncontrolled current source Ii.

4. The output driving current is large and can reach 1000mA and above, and is determined by the driving capability of the controlled switch type current limiting driver IO 2.

5. The output driving voltage is high and can be higher than the voltage of the bidirectional port IIDi/o and reach hundreds of volts, and the voltage is determined according to the value of the load driving power supply port Vdd.

6. For the controller, the bidirectional port IIDi/o has bidirectional performance and does not need directional control, so that whether the load driven by the bidirectional port IIDi/o exists or not can be timely reflected to the control system, and meanwhile, the software and hardware expenses are saved.

Compared with the prior art, the application of the self-adaptive IO monitor of the invention has obvious progress:

1. compared with a circuit using a photoelectric coupler as an isolation input and a circuit using a resistance voltage divider as an input voltage reduction circuit, the self-adaptive IO monitor has the characteristic of wide voltage range suitable for detected signals, and the ratio of the maximum value to the minimum value can be larger than 10.

When a photoelectric coupler is used as a circuit for isolating input, according to electric power = current × voltage (calculation formula: P = IV), when the voltage value is increased by 10 times, the power consumption P is increased only by 10 times. When the ratio of the maximum value to the minimum value of the signal voltage detected by the photocoupler is 5, the power loss (the thermal power to be generated when the current flows through the resistor) borne by the current limiting resistor is increased to 25 times (fig. 9 is an application schematic diagram of the photocoupler, Q is a phototriode, D is a light emitting diode LED, R is the current value limiting the current flowing into D, and V is the signal voltage, as will be known by those skilled in the art, the recommended input current of the photocoupler is 10mA, 4mA minimum, 20mA maximum, and 5 times the maximum value, if the voltage drop of the input light emitting diode D is neglected, the power consumption of the current limiting resistor R is P = IV = (V/R) × V = V2/R, that is, the power consumption P that the current limiting resistor R needs to bear is quadratic proportional to the voltage applied to both ends of the current limiting resistor R), if the reserved power consumption safety factor is not allowed to be large enough when the photocoupler application system is designed, the current limiting resistor is burned out due to overheating.

When the resistor voltage divider is used as the step-down input circuit, the ratio of the maximum value to the minimum value of the signal voltage is not more than 5. When the maximum output voltage is 5V, if the resistive voltage-dividing input circuit is used for detecting a state signal with the maximum voltage of 50V, the maximum voltage-dividing output value of the resistive voltage-dividing input circuit is increased to 25V, which is far greater than the maximum voltage allowed to be input at the port of the device for detecting the state signal, and the port and even the device are damaged. The power loss to be borne by the voltage dividing circuit is increased by 25 times (the voltage divider divides a signal source of 10V into 5V, the ratio of the voltage to the voltage is 2:1, because the output of the resistor voltage divider is in a linear relation with the input, when the detected voltage reaches 50V at most, the divided voltage output is 25V, the heating power of the voltage dividing resistor P = IV = V2/R, because the voltage to be borne by the voltage divider is 5 times of the voltage borne by 10V in design, the power consumption is increased by 25 times), and finally, the voltage dividing resistor is burnt out due to overheating because the reserved safety factor is not allowed to be large enough.

2. Since the current absorbed by the input circuit is constant and can be 0.1mA or below, when the highest voltage value of the detected state signal is 300V, the power loss of the input circuit can be not more than 30 mW. As long as the minimum value of the voltage of the detected signal is close to Vcc, the Di/o port will have a result (high and low of the status signal) that can reflect the change in the level of the detected signal.

3. The output port of the self-adaptive IO monitor has a current limiting function like an input port, and has a limiting function on the maximum value of output current, so that a load with the impedance of 0 can be directly connected to the output port, namely, the self-adaptive IO monitor has a function of allowing the load to be short-circuited, and the traditional driving circuit does not allow the load to be short-circuited;

4. the intelligent automobile line card can save a large amount of wires. Such as: the detection of the open and close states of the car door and the driving of the car door light can use the same wire, when the open state of a car door is detected, a driving power supply for lightening the car door light can be sent to the opened car door at night, so that the car door light can be lightened, and when the closed state of a car door is detected, the driving power supply for lightening the car door light can be turned off, so that the accident caused by the fact can be avoided; when the filament of a certain car lamp is blown or the cable is broken, prompt or alarm can be given in time; other electrical devices on the cable may also be sensed in a similar manner.

5. The intelligent controller is applied to an intelligent control system, so that the controller can timely know whether a non-intelligent electrical load which needs to be driven is on line or not, namely whether the load is disconnected or not.

The irrelevant parts of the invention are the same as or can be realized by the prior art, and the R2 in the embodiment can be replaced by a non-inverter. While the invention has been described in detail with reference to specific preferred embodiments thereof, it will be understood by those skilled in the art that the present invention is not limited to the details of the foregoing embodiments, and various changes and modifications may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. An adaptive IO monitor, comprising: the self-adaptive IO monitor comprises two controlled current sources, two uncontrolled current sources, a current limiting switch controller (C) and an external port;

the two controlled current sources are respectively a controlled switch type current-limiting driver I (O2) and a controlled switch type current-limiting driver II (IO 3);

the two uncontrolled current sources are an uncontrolled current source I (I4) and an uncontrolled current source II (Ii) respectively;

the external ports comprise a load driving power supply port (Vdd), a load driving power output port (Do), a working power supply input port (Vcc) of the self-adaptive IO monitor, a load state detection signal input end (Di), a bidirectional port II (Di/o) and a common port (Gnd); the bidirectional port II (Di/o) is used as a common bidirectional port for the output of the load state detection signal and the input of the power output control signal for driving or not driving the load;

the controlled switched current limited driver I (O2) is a current limited driver for limiting a maximum current output; the power input end of the controlled switch type current-limiting driver I (O2) is connected with a load drive power supply port (Vdd), the output end of the controlled switch type current-limiting driver I is connected with a load drive power output port (Do), and the input end of the controlled switch type current-limiting driver I is connected with the output end of a current-limiting switch controller (C);

the uncontrolled current source I (I4) is a current limiting driver for limiting the maximum amount of current flowing from the operating power supply input port (Vcc) to the common port (Gnd) through the uncontrolled current source I (I4), and provides a bias current to the current limiting switch controller (C) to pull up the level of the bidirectional port II (Di/o) and adjust the voltage value of the maximum low level of the bidirectional port II (Di/o); the input end of the uncontrolled current source I (I4) is connected with a working power supply input port (Vcc), and the output end of the uncontrolled current source I and the input end of the current limiting switch controller (C) are connected with a bidirectional port II (Di/o) in common;

the uncontrolled current source II (Ii) works in a constant current source mode, the input end of the uncontrolled current source II (Ii) is connected with the load state detection signal input end (Di), the output end of the uncontrolled current source II (Ii) is connected with the input end of the switch type current-limiting driver II (IO 3), and the grounding end of the uncontrolled current source II (Ii) is connected with the common port (Gnd);

the controlled switched current-limiting driver II (IO 3) is a current-limiting driver for limiting the maximum value of current drawn from the bi-directional port II (Di/o); the output end of the controlled switch type current-limiting driver II (IO 3) is connected with the bidirectional port II (Di/o), the input end of the controlled switch type current-limiting driver II is connected with the output end of the uncontrolled current source II (Ii), and the grounding end of the controlled switch type current-limiting driver II is connected with the common port (Gnd).

2. The adaptive IO monitor of claim 1, wherein: the controlled switch type current-limiting driver I (O2) and the current-limiting switch controller (C) are formed by a circuit of a first electronic amplifier (Ao 1) and a first current limiter (I2); the first current limiter (I2) is arranged to be the current limiter which allows the maximum value of the current flowing to the load driving power output port (Do); the first electronic amplifier (Ao 1) controls the on and off states of a first current limiter (I2) through an output port (Do 1) of the first electronic amplifier;

the internal bias of the first electronic amplifier (Ao 1) is used as an uncontrolled current source I (I4);

the controlled switch type current-limiting driver II (IO 3) and the uncontrolled current source II (Ii) are formed by a circuit of a second electronic amplifier (Ai 1) and a second current limiter (I1); the second current limiter (I1) is set as a current limiter which allows the maximum value of the current from the bidirectional port II (Di/o) to be absorbed; the second electronic amplifier (Ai 1) detects the level state of the load state detection signal input terminal (Di) through the input terminal (Di 1) thereof; the power supply end of the first electronic amplifier (Ao 1) and the power supply end of the second electronic amplifier (Ai 1) are connected with a working power supply input port (Vcc), the same-direction input port of the first electronic amplifier (Ao 1) and the input port of the second current limiter (I1) are connected with a two-way port II (Di/o), and the output port (Do 1) of the first electronic amplifier (Ao 1) is connected with the input port of the first current limiter (I2); the power end of the first current limiter (I2) is connected with the load driving power supply port (Vdd), and the output end of the first current limiter is connected with the load driving power output port (Do); the output port of the second current limiter (I1) is connected with the output port of a second electronic amplifier (Ai 1); the inverting input port of the second electronic amplifier (Ai 1) is connected to the load condition detection signal input (Di).

3. The adaptive IO monitor of claim 2, wherein: the load driving power supply port (Vdd) is connected with the working power supply input port (Vcc) to form a single power supply working state, and the load driving power output port (Do) is connected with the load state detection signal input end (Di) together and combined into a bidirectional port I (Dio).

4. An adaptive IO monitor according to claim 2 or claim 3, wherein: the electronic amplifier is composed of 1 or more than 2 of operational amplifier, bipolar semiconductor triode or unipolar field effect triode; the electronic amplifier is composed of an operational amplifier; or is composed of a bipolar semiconductor triode; or is formed by a unipolar field effect transistor; or a triode mixed amplifier composed of a bipolar semiconductor triode and a unipolar field effect triode; or a pure bipolar semiconductor amplifier consisting of a plurality of bipolar semiconductor triodes; or a pure unipolar field effect amplifier composed of a plurality of unipolar field effect transistors; the bipolar semiconductor triode is provided with a PNP type and an NPN type, and the unipolar field effect triode is provided with an N channel and a P channel.

5. The adaptive IO monitor of claim 4, wherein: when the amplification factor of the electronic amplifier is 1 or the electronic amplifier is only used for current limiting, the electronic amplifier adopts a pure resistor.

6. The adaptive IO monitor of claim 1, wherein: the load driving power supply port (Vdd) and the working power supply input port (Vcc) are connected together and combined into a power supply input port (Vc) to form a single power supply working state, and the load driving power output port (Do) and the load state detection signal input port (Di) are connected together and combined into a bidirectional port I (Dio);

the controlled switch type current-limiting driver I (O2) is composed of a switch device I for limiting the maximum current output and a component II for adjusting the maximum driving current output value of the switch device I; the component II is used as a current-limiting switch controller (C);

the uncontrolled current source II (Ii) is composed of a constant current input device, a component I for adjusting the constant current value of the constant current input device and a component V for adjusting the level value of a common point (E) connected with the constant current input device when the constant current input device enters a constant current working state;

the controlled switch type current-limiting driver II (IO 3) is composed of a switch device II for limiting the maximum suction current and a component III for adjusting the maximum suction current value of the switch device II; and the uncontrolled current source I (I4) is composed of an element IV for providing a pull-up level for the bidirectional port II (Di/o) and limiting the maximum value of the current output from the bidirectional port II (Di/o).

7. The adaptive IO monitor of claim 6, wherein: the switching device I is a PNP type transistor (Q2) which works in a current-limiting working state; the constant current input device is an NPN type transistor I (Q1) working in a constant current working state; the switching device II is an NPN transistor II (Q3) which works in a current-limiting working state; the component I is a first resistor (R1), the component II is a second resistor (R2), the component III is a third resistor (R3), the component IV is a fourth resistor (R4), and the component V is a fifth resistor (Re);

the base electrode of the PNP type transistor (Q2) is connected to the bidirectional port II (Di/o) through a second resistor (R2), the emitter electrode of the PNP type transistor is connected to the power supply input port (Vc), and the collector electrode of the PNP type transistor is connected to the bidirectional port I (Dio) as a load driving power output port (Do);

the base electrode of the NPN type transistor I (Q1) is connected to the power supply input port (Vc) through a first resistor R1, the collector electrode of the NPN type transistor I (Q1) is connected to the bidirectional port I (Dio) as a load state detection signal input end (Di), and the emitter electrode of the NPN type transistor I (Q1) is connected to the common port (Gnd) through a fifth resistor (Re);

the emitter of the NPN transistor II (Q3) is directly connected to the common port (Gnd), the base of the NPN transistor II is connected to the emitter of the NPN transistor I (Q1) through a third resistor (R3), and the collector of the NPN transistor II is directly connected to the bidirectional port II (Di/o);

and two ends of the fourth resistor (R4) are respectively connected with the bidirectional port II (Di/o) and the power supply input port (Vc).

8. The adaptive IO monitor of claim 6, wherein: the switching device I is a Diode (DG); the constant current input device is an NPN type transistor I (Q1) working in a constant current working state; the switching device II is an NPN transistor II (Q3) which works in a current-limiting working state; the component I is a first resistor (R1), the component II is a second resistor (R2), the component III is a third resistor (R3), the component IV is a fourth resistor (R4), and the component V is a fifth resistor (Re);

the anode of the Diode (DG) is connected to the bidirectional port II (Di/o) through a second resistor (R2), and the cathode of the Diode (DG) is connected to the bidirectional port I (Dio);

the base electrode of the NPN type transistor I (Q1) is connected to the power supply input port (Vc) through a first resistor (R1), the collector electrode of the NPN type transistor I (Q1) is connected to the bidirectional port I (Dio) as a load state detection signal input end (Di), and the emitter electrode of the NPN type transistor I (Q1) is connected to the common port (Gnd) through a fifth resistor (Re);

9. The adaptive IO monitor of claim 6, wherein: the switching device I is a P-channel unipolar field effect transistor (Q21) working in a current-limiting working state; the constant current input device is an N-channel unipolar field effect triode I (Q11) working in a constant current working state; the switching device II is an N-channel unipolar field effect transistor II (Q31) working in a current-limiting working state; the component I is a first resistor (R1), the component II is a second resistor (R2), the component III is a third resistor (R3), the component IV is a fourth resistor (R4), and the component V is a fifth resistor (Re);

the grid electrode of the P-channel unipolar field effect transistor (Q21) is connected to the bidirectional port II (Di/o) through a second resistor (R2), the source electrode of the P-channel unipolar field effect transistor is connected to the power supply input port (Vc), and the drain electrode of the P-channel unipolar field effect transistor is used as a load driving power output port and is connected to the bidirectional port I (Dio);

the grid electrode of the N-channel unipolar field effect transistor I (Q11) is connected to the power supply input port (Vc) through a first resistor (R1), the drain electrode of the N-channel unipolar field effect transistor I (Q11) is connected to the bidirectional port I (Dio) as a load state detection signal input end, and the source electrode of the N-channel unipolar field effect transistor I (Q11) is connected to the common port (Gnd) through a fifth resistor (Re);

the source electrode of the N-channel unipolar field effect transistor II (Q31) is directly connected to the common port (Gnd), the grid electrode of the N-channel unipolar field effect transistor II (Q31) is connected to the source electrode of the N-channel unipolar field effect transistor I (Q11) through a third resistor (R3), and the drain electrode of the N-channel unipolar field effect transistor II (Q31) is directly connected to the bidirectional port II (Di/o);

10. The adaptive IO monitor of claim 6, wherein: the switching device I is a Diode (DG); the constant current input device is an N-channel unipolar field effect triode I (Q11) working in a constant current working state; the switching device II is an N-channel unipolar field effect transistor II (Q31) working in a current-limiting working state; the component I is a first resistor (R1), the component II is a second resistor (R2), the component III is a third resistor (R3), the component IV is a fourth resistor (R4), and the component V is a fifth resistor (Re);