CN103488225A - Power supply load voltage adjusting and monitoring circuit - Google Patents
Power supply load voltage adjusting and monitoring circuit Download PDFInfo
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- CN103488225A CN103488225A CN201310407119.6A CN201310407119A CN103488225A CN 103488225 A CN103488225 A CN 103488225A CN 201310407119 A CN201310407119 A CN 201310407119A CN 103488225 A CN103488225 A CN 103488225A
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Abstract
The invention discloses a power supply load voltage adjusting and monitoring circuit which is provided with 10 terminals, namely an adjustable reference voltage terminal VR, a reference voltage terminal R, an external voltage detecting input terminal DV, a protection time keeping and setting terminal ST, a grounding terminal GND, a current sensing and input terminal CS, a load terminal voltage monitoring and input terminal FB, a power electronic protection switch drive terminal DR, a VCC power supply terminal and a high-voltage power supply terminal HV. The power supply load voltage adjusting and monitoring circuit has the advantages that load control can be realized through a simple control circuit so as to allow a system to operate normally; the adjusting and monitoring circuit is used for monitoring voltage change power supply systems such as a large-capacity storage battery (a lead acid battery, a gel battery, a lithium battery and the like), a solar cell, a super capacitor, a transformer, a switch power supply and mains supply before, after and during loading and providing a switch control signal output function of power output; the adjusting and monitoring circuit is widely applicable to power supply system monitoring in occasions such as automobile electronics and photovoltaic.
Description
Technical field
The present invention relates to a kind of monitoring to the multiple power sources load voltage and Circuit tuning, belong to the circuit engineering field.
Background technology
For power-supply systems such as common large-capacity battery (lead-acid battery, colloid battery and lithium battery etc.), solar cell, super capacitor, transformer, Switching Power Supply, civil powers, whether be with its output voltage and rear end is loaded with pass.When connecting load, or pull-up resistor can cause the increase of output current while reducing, and because power supply has internal resistance, in internal resistance, pressure drop also increases, thereby causes the decline of output voltage.When power-supply system descends because overload causes output voltage, and while surpassing certain limit, if cut off not in time load, can cause the whole system cisco unity malfunction, even damage.Therefore, need to monitor and adjust power source loads voltage, normally stably work with the assurance system.The present invention puts forward the circuit arrangement that a kind of band for the monitoring power supply system carries the output voltage variation of front and back and band year process, and the switch controlling signal output function of the load of cutting off the electricity supply is provided.Can be widely used in the electric power system monitoring of the occasions such as automotive electronics, photovoltaic.
Summary of the invention
Technical matters to be solved by this invention is the defect that overcomes prior art, provides a kind of power source loads to adjust voltage monitoring circuit, can monitor and adjust power source loads voltage, with the assurance system, normally stably works.
For solving the problems of the technologies described above, the invention provides a kind of power source loads and adjust voltage monitoring circuit.
A kind of power source loads voltage is adjusted supervisory circuit, it is characterized in that, 10 terminals are set, are respectively adjustable reference voltage end VR end, reference voltage end R end, external voltage detection input end DV end, guard time and keep arranging end ST end, ground wire GND, current sense input end CS end, load terminal voltage monitoring input end FB end, power electronic protection switch drive end DR end, VCC power end and high voltage supply end HV and hold;
Described VR end is connected to the VCC power end by the 7th current source,
The voltage of described reference voltage end R end and outside adjustable reference voltage end VR end, by the initialization circuit adjustment, is exported a reference voltage 2.500V;
After first resistance of described DV end series connection, with the in-phase input end of the first comparer, the 3rd comparer, be connected respectively, described the first comparer inverting input is connected to described VR end, described the first comparator output terminal is connected with the positive pole of the first diode, the negative pole of described the first diode is connected with the positive pole of the second diode, the negative pole of described the second diode is connected to the output terminal of the 3rd comparer, and the inverting input of described the 3rd comparer is connected to reference voltage 2.500V; The output terminal of described the first comparer, the 3rd comparer is connected to described VCC power end by the first current source, the second current source respectively;
Described ST end is connected to the 4th comparer in-phase input end, and be connected with the negative pole of the anode of the 5th diode, the 3rd transistorized drain electrode, the 5th voltage stabilizing diode, described the 4th comparer inverting input is connected to reference voltage 2.500V, described the 4th comparator output terminal connects respectively the negative pole of the 4th current source and the 4th diode, the positive pole of described the 4th diode is connected with the negative pole of input end, the first diode and the 3rd diode of impact damper, the positive pole of the second diode respectively, and described the 4th current source is connected to described VCC power end;
Described ground wire GND is connected with the 3rd transistorized source electrode, the 3rd transistorized source electrode is connected to described VCC power end through the 5th stabilivolt and the 5th current source respectively, the 3rd transistorized drain electrode connects described VCC power end through the 5th diode, and the output terminal of the 3rd transistor gate and the 5th voltage comparator is connected to described VCC power end altogether through the 8th current source; The inverting input of the 5th voltage comparator is connected to another reference voltage 0.250V, and the in-phase input end of described the 5th voltage comparator is connected and is connected with the CS end after the second resistance;
After described FB end series connection the 4th resistance, with the second comparer in-phase input end, be connected, described the second comparer is anti-phase is connected to reference voltage 2.500V to input end, described the second comparator output terminal is connected to the VCC power end via the 3rd current source, and the output terminal of tertiary voltage comparer also connects the negative pole of the second diode;
Described DR end is connected with the 7th diode cathode, the 7th voltage stabilizing diode negative pole respectively, and described the 7th diode cathode is connected to the VCC power end, the 7th voltage stabilizing diode plus earth; The positive pole of described the 7th diode, negative pole also are connected with the 4th transistorized source electrode respectively; The positive pole of described the 7th diode also is connected with the 5th transistorized drain electrode; Described the 4th transistor, the 5th transistor common gate connect and are connected with the output terminal of impact damper.
Described reference voltage adjustment end initialization circuit comprises the first transistor, the second stabilivolt, the first electric capacity, the 6th current source, the 6th operational amplifier, transistor seconds and the 3rd stabilivolt;
Described R end is connected to the source electrode of the first transistor and the in-phase input end of the 6th operational amplifier simultaneously, and the grid of the first transistor is exported a reference voltage 2.500V, and the drain electrode of the first transistor is connected to the inverting input of the 6th operational amplifier; The 6th operational amplifier output terminal is connected with the grid of transistor seconds, the source ground of transistor seconds, and the drain electrode of transistor seconds is connected to described VR end; One the 3rd stabilivolt in parallel between the source electrode of described transistor seconds, drain electrode.
Connect the first voltage regulator resistor between VR end and R end, between R end and ground wire, is connected the second voltage adjusting resistance, realize the in-phase end (the DV end is connected) of the first voltage comparator and the input voltage difference setting of end of oppisite phase (with VR, hold and be connected).
DV end and first and the in-phase input end of tertiary voltage comparer between first resistance of having connected, the first resistance with first and the in-phase input end of tertiary voltage comparer between connecting line and ground wire GND between in parallel the 4th voltage stabilizing diode and the second electric capacity; Wherein, the negative pole of the 4th voltage stabilizing diode is connected with the in-phase input end of tertiary voltage comparer with first, and the positive pole of the 4th voltage stabilizing diode is connected with ground wire GND.
Second resistance of having connected between the in-phase end of CS end and the 5th voltage comparator, the connecting line between the in-phase input end of the second resistance and the 5th voltage comparator is connected with the positive pole of the 6th diode, the negative pole connection ground wire GND of the 6th diode; Be parallel with the 3rd electric capacity and the 3rd resistance on connecting line between the second resistance and port CS and between ground wire GND.
The 4th resistance of having connected between the in-phase input end of FB end and second voltage comparer, connecting line between the in-phase input end of the 4th resistance and second voltage comparer is connected with the negative pole of the 6th voltage stabilizing diode, and the positive pole of the 6th voltage stabilizing diode connects ground wire GND; Be parallel with the 4th electric capacity and the 5th resistance on connecting line between the 4th resistance and port FB and between ground wire GND.
Use electric capacity, at the ST end, protection trigger pip time holding circuit is set, comprise the capacitor C of series connection
t1with C
t, and capacitance C
t1>=0.5C
t.
Use resistance and electric capacity at the ST end, protection trigger pip time holding circuit, resistance R to be set simultaneously
twith capacitor C
t1after parallel connection again with capacitor C
tseries connection, C
t1>=0.5C
t.
Described capacitor C
ttwo ends be parallel to the 6th transistorized source electrode and drain electrode, the 6th transistorized grid is connected with the negative pole of two diodes, the positive pole of two diodes is connected to respectively the output terminal of the 7th amplifier, the 8th amplifier; The in-phase input end of the 7th amplifier is connected to described VR end, the inverting input of the 7th amplifier be connected to the DV end; The in-phase input end of the 8th amplifier is connected to described FB end, and the inverting input of the 8th amplifier is connected to the R end.
Power end VCC service area is at DC5.0-18.0V, and high voltage supply end HV end input voltage range is DC18-100V.
HV end input voltage range is DC18-100V, and when this port provides the voltage of DC18-100V, the VCC power end produces DC18V voltage, and when the voltage of VCC power end reaches 18V, the input current of HV end automatically shuts down.
The beneficial effect that the present invention reaches:
Power source loads of the present invention is adjusted voltage monitoring circuit, in the power-supply systems such as large-capacity battery (lead-acid battery, colloid battery and lithium battery etc.), solar cell, super capacitor, transformer, Switching Power Supply, civil power, for monitoring, its band carries front and back and band carries the change in voltage situation of process, and the switch controlling signal output function of power supply output is provided.Can be widely used in the electric power system monitoring of the occasions such as automotive electronics, photovoltaic.
The accompanying drawing explanation
Fig. 1 is that power source loads voltage is adjusted supervisory circuit figure;
Fig. 2 is the current source CS1-CS7 internal circuit diagram in Fig. 1;
Fig. 3 is the current source HVCS internal circuit diagram in Fig. 1;
Fig. 4 is the reference voltage adjustment end initialization circuit in Fig. 1;
Fig. 5 is the voltage monitoring end initialization circuit in Fig. 1;
Fig. 6 is the protection trigger pip time holding circuit of using electric capacity to arrange in Fig. 1;
Fig. 7 is the protection trigger pip time holding circuit of using resistance and electric capacity to arrange in Fig. 1;
Fig. 8 is that the protection of voltage detecting end DV and feedback end FB in Fig. 1 triggers the retention time initialization circuit;
Fig. 9 is power source loads voltage monitoring circuit packing forms of the present invention;
Figure 10 is that the present invention inputs non-isolated PMOSFET protection switch control application at low-voltage direct;
Figure 11 is that the present invention inputs non-isolated PMOSFET protection switch control application at low-voltage alternating-current;
Figure 12 is that the present invention controls application at the P-MOSFET protection switch of high-voltage alternating input isolation output system;
Figure 13 is that the present invention controls application at N-MOSFET or the IGBT protection switch of high-voltage alternating input isolation output system.
Embodiment
Below in conjunction with accompanying drawing, the invention will be further described.Following examples are only for technical scheme of the present invention more clearly is described, and can not limit the scope of the invention with this.
As shown in Figure 1, power source loads is adjusted voltage monitor 10 terminals is set, and the VR end is adjustable reference point pressure side; R is reference voltage end, and output voltage R is 2.500V; The DV end is the external voltage detection input end; The ST end keeps arranging end for guard time; GND is ground terminal; CS is the current sense input end; FB is load terminal voltage monitoring input end; DR is power electronic protection switch drive end; VCC is power end, and service area is at DC5.0-18.0V; HV holds as the high voltage supply end, and input voltage range is DC18-100V, and when this port provides the voltage of DC18-100V, the VCC end produces DC18V voltage, now, and the electric capacity that the VCC end is answered external 1uF.When the voltage of VCC end reaches 18V, the input current of HV end automatically shuts down.
A1, A2, A3, A4 are voltage comparator (possessing line and function), and A5 is voltage comparator, and A6 is operational amplifier.The output voltage of each voltage comparator means with H or L respectively, and wherein, H means high voltage, L means low-voltage, below in conjunction with each terminal voltage comparison, each voltage comparator output voltage state relation in analysis circuit, further determine the logic state relation that G1 and DR hold.
Work as V
dVv
vR: A1=H, A3=H;
V
R<V
DV<V
VR：A1=L,A3=H；
V
DV<V
R：A1=L,A3=L；
V
FB<V
R：A2=L；
V
FB>V
R：A2=H。
A4 consists of voltage comparator and Schmidt trigger cascade, and its effect is to eliminate glitch to trigger, and jointly completes guard mode output with the external circuit of ST end, and guard mode is maintained to the regular hour.
The resistance R 1 of having connected between the in-phase input end of DV end and voltage comparator A1, A3, in parallel voltage stabilizing diode 4 and capacitor C 2 between the connecting line between the in-phase input end of resistance R 1 and voltage comparator A1, A3 and ground wire GND; Wherein, the negative pole of voltage stabilizing diode Z4 is connected with the in-phase input end of voltage comparator A1, A3, and the positive pole of voltage stabilizing diode Z4 is connected with ground wire GND.
The resistance R 2 of having connected between the in-phase end of CS end and voltage comparator A5, the connecting line between the in-phase input end of resistance R 2 and voltage comparator A5 is connected with the positive pole of diode D6, the negative pole connection ground wire GND of this diode D6; Be parallel with capacitor C 3 and the 3rd resistance R 3 on connecting line between resistance R 2 and port CS and between ground wire GND.
The resistance R 3 of having connected between the in-phase input end of FB end and voltage comparator A2, the connecting line between the in-phase input end of resistance R 3 and voltage comparator A2 is connected with the negative pole of a voltage stabilizing diode Z6, the positive pole connection ground wire GND of this voltage stabilizing diode; Be parallel with a capacitor C 4 and resistance R 5 on connecting line between resistance R 4 and port FB and between ground wire GND.
Be illustrated in figure 2 the inner structure of current source CS1-CS7 of the present invention, formed by resistance R i1 and CMOS pipe M1-M5.Wherein, CMOS pipe M2 and M4 can work in inferior threshold values state or saturated.The value of electric current I o1 is determined by the value of Ri1 and the raceway groove parameter of CMOS pipe M2 and M4.
Be illustrated in figure 3 current source HVCS inner structure of the present invention, comprise resistance R i2 and CMOS pipe M6-M10.Wherein, CMOS pipe M7 and M9 can work in inferior threshold values state or saturated.The value of electric current I o2 is determined by the value of resistance R i2 and the raceway groove parameter of CMOS pipe M7 and M9.The bleeder circuit that resistance R o1, Ro2 form, for detection of the VCC terminal voltage, when the voltage of VCC end reaches DC18V, the voltage at Ro2 two ends surpasses 2.500V, amplifier Ar output low level, send into Schmidt trigger ST, and Schmidt trigger ST output low level is turn-offed CMOS pipe M11; When the voltage of VCC end, during lower than DC18V, amplifier Ar export high level, and Schmidt trigger ST export high level, and driving CMOS manages the M11 conducting.
Be illustrated in figure 4 reference voltage adjustment end initialization circuit, triode T1, voltage stabilizing diode Z2, capacitor C 1, current source CS6, operational amplifier A 6, triode T2 and voltage stabilizing diode Z3 form inner fixed reference potential 2.500V and outside adjustable reference voltage end VR.The R end is connected to the source electrode of triode 1 and the in-phase input end of operational amplifier A 6 simultaneously, and the grid of triode T1 is exported a reference voltage 2.500V, and the drain electrode of triode T2 is connected to the inverting input of operational amplifier A 6; Be connected voltage stabilizing diode Z2 between the inverting input of operational amplifier A 6 and ground; Operational amplifier A 6 output terminals are connected with the grid of triode T2, the source ground of triode T2, and the drain electrode of triode T2 is connected to the VR end; Parallel voltage-stabilizing diode Z3 between the source electrode of triode T2, drain electrode.Externally between adjustable reference voltage end VR and voltage port R end, connect voltage regulator resistor RA1, between port R and ground wire, be connected voltage regulator resistor RA2, the voltage expression formula of adjustable reference voltage end VR is:
Because transistor T 1 is emitter following output, the voltage of port R is 2.500V, so the voltage expression formula of VR end is:
V
rthe voltage range that end can be set is (2.500V, V
cC).
Be illustrated in figure 5 voltage monitoring end initialization circuit, comprise the 100 Ω resistance R 1 that are connected with port DV, the voltage of Vin end, through the series connection voltage divider of RA3 and RA4 formation, is sent into port DV end.Capacitor C A1 and CA2 are in parallel with resistance R A3 and RA4 respectively, powered on moment, and the voltage divider that the voltage of Vin end forms by capacitor C A1 and CA2, the voltage fast rise that DV is held, make the voltage of DV end reach as early as possible equilibrium state.
Fig. 6 is for being used separately electric capacity, at the ST end, protection trigger pip time holding circuit, capacitor C are set
t1with C
tseries connection, C
t1>=0.5C
t, can guarantee that the voltage of ST end is greater than 2.500V at powered on moment, make the DR end of the controller shown in Fig. 1 start the effective high level signal of quick output of moment, the conducting of driving power electric protection switch.When an abnormal protection signal occurring, transistor T 3 triggering and conducting, to capacitor C
tdischarged, amplifier A4 output low level, the DR end output abnormality protection low level in Fig. 1.When transistor T 3 enters cut-off from conducting, 5 μ A constant current source CS5 are to capacitor C
tcharged, protect the expression formula of trigger pip time retention value to be:
Capacitor C in formula
twhen span is 0.1 μ F-1 μ F, protection trigger pip retention time t
hfor 0.05-0.5s.
Fig. 7 is for used resistance and electric capacity that the holding circuit of protection trigger pip time, resistance R are set at the ST end simultaneously
twith capacitor C
t1after parallel connection again with C
tseries connection, C
t1>=0.5C
t, can guarantee that the voltage of ST end is greater than 2.500V at powered on moment, make the DR end of the controller shown in Fig. 1 start the effective high level signal of quick output of moment, the conducting of driving power electric protection switch.When an abnormal protection signal occurring, transistor T 3 triggering and conducting, to capacitor C, T is discharged, amplifier A4 output low level, the DR end output abnormality protection low level in Fig. 1.When transistor T 3 enters cut-off from conducting, resistance R
tand capacitor C
tform charhing unit, in the situation that ignore 5uA constant current source CS5, protect the expression formula of trigger pip time retention value to be:
V in formula
cCfor the working power voltage of IC interior of the present invention, scope is 5.0-18V; R
tfor external charging resistance, span is 100k Ω-510k Ω; C
tfor being recharged electric capacity, span is 2.2 μ F-10 μ F.
Be illustrated in figure 8 DV end of the present invention and FB end protection triggering retention time initialization circuit, when input voltage vin is too low, in the bleeder circuit of the resistance R A3 shown in Fig. 5 and RA4 formation, the voltage DV got on resistance R A4 holds lower than VR, amplifier A7 exports high level, trigger transistor T 6 conductings, make amplifier A4 output low level, the protection of DR end output abnormality drives low level signal; When the overtension of load end, the voltage that the FB end produces is greater than the voltage of R end, and amplifier A8 export high level, makes transistor T 6 conductings, amplifier A4 output low level, DR end output abnormality protection driving low level signal.
As shown in Figure 9, packing forms of the present invention is 10-Lead Plastic MSOP or 10-Lead Plastic DFN.
As shown in Figure 10-Figure 11; power source loads voltage monitoring circuit of the present invention can be applied to the following low-voltage direct input of 100V, the following low-voltage alternating-current of 70V is inputted the electric power system monitoring that non-isolated PMOSFET protection switch is controlled the occasions such as application; for monitoring, its band carries front and back and band carries the change in voltage situation of process, and the switch controlling signal output function of power supply output is provided.
As shown in figure 12, the isolated PMOSFET protection switch that power source loads voltage monitoring circuit of the present invention can be applied to exchange higher than 100V is controlled the mains-supplied system monitoring of application scenario.The power end VCC of watch-dog, provided the direct supply VCC power supply of 10-15V by outside.Simultaneously, the high pressure VH of alternating current after rectifier bridge BR2 rectification of AC1 and AC2 input by resistance R P current limliting, powers to the HV end after storage capacitor CPA.The VH end connects the source electrode of the QP of PMOSFET power electronic switching, and the drain electrode of QP connects the switch power supply system of rear end; The DR end of power source loads adjustment voltage monitor is connected with the grid of field effect transistor QD, and when DR end output low level, field effect transistor QD closes, and the grid of power electronic switching QP and source voltage are equal, and QP is in off-state, and cut-out VH holds the electric current with late-class circuit.When DR end output high level, the QD conducting, the grid voltage that makes power electronic switching QP is fast conducting lower than source voltage; Capacitor C D1, resistance R D1 and diode DZ form the grid level Circuit tuning of QP, powered on moment, and VH to the grid rapid charge of QP, makes QP enter fast closed condition by CD1 and RD1.When the DR of controller end output high level, the QD conducting, the grid of QP is by resistance R D2 electric discharge, make its level fast-descending, source electrode and grid fast conducting, diode DZ is 18V voltage stabilizing diode or transient state killer tube, its effect is that the grid-source voltage that prevents QP transfinites.
The voltage divider that the output end voltage VP of the isolation type switching power supply formed as switch power controller US and transformer TR forms by resistance R F3 and RF4, send into the end of oppisite phase of voltage comparator A1.When the voltage of voltage comparator A1 end of oppisite phase surpasses the threshold voltage of RF6, DZ1 and CF1 setting, the A1 output low level, make the photodiode conducting of optocoupler UI1 inside luminous, the phototriode conducting that it is inner, power supply VCC is the FB end Injection Current to controller by resistance R Fv, when the voltage of FB end surpasses the reference voltage 2.500V of inner setting, DR holds output low level, turn-offs QP.System enters output terminal overvoltage protection state.
When the output terminal load current of the power supply that opens the light changes voltage into by sample resistance RS; send into the end of oppisite phase of voltage comparator A2; the current reference voltage that the voltage divider that resistance R F7 and RF8 form is set is sent into the in-phase end of voltage comparator A2; when the electric current passed through on load RL surpasses predefined electric current; the triode conducting of A2 output low level optocoupler UI2 inside; the CS end of controller obtains the voltage over the 0.250V of inner setting; DR holds output low level; QP is turn-offed, enter the overcurrent protection state.Overcurrent protection state duration RT and CT parameter as shown in Figure 7 determined.
As shown in figure 13, power source loads voltage monitoring circuit of the present invention can be applied to the mains-supplied system monitoring of controlling application scenario higher than isolated NMOSFET or the IGBT protection switch of 100V interchange.QP in Figure 13 is NMOSFET or IGBT power switch pipe, and diode DZ is 18V voltage stabilizing diode or transient state killer tube, and its effect is the grid overvoltage that prevents QP.For NMOSFET, the ground wire 15G of power supply D15V is connected with drain electrode; For IGBT, the ground wire 15G of power supply D15V is connected with emitter.Field effect transistor QD1 and resistance R D4 form phase inverter, when DR end output high level, and QD1 conducting, QD cut-off, power switch QP conducting; When DR end output low level, QD1 cut-off, QD conducting, power switch QP cut-off.The principle of work and power that other circuit connects is described identical with Figure 12.
The above is only the preferred embodiment of the present invention; it should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the technology of the present invention principle; can also make some improvement and distortion, these improvement and distortion also should be considered as protection scope of the present invention.
Claims (11)
1. a power source loads voltage is adjusted supervisory circuit, it is characterized in that, 10 terminals are set, are respectively adjustable reference voltage end VR end, reference voltage end R end, external voltage detection input end DV end, guard time and keep arranging end ST end, ground wire GND, current sense input end CS end, load terminal voltage monitoring input end FB end, power electronic protection switch drive end DR end, VCC power end and high voltage supply end HV and hold;
Described VR end is connected to the VCC power end by the 7th current source,
The voltage of described reference voltage end R end and outside adjustable reference voltage end VR end, by the initialization circuit adjustment, is exported a reference voltage 2.500V;
After first resistance of described DV end series connection, with the in-phase input end of the first comparer, the 3rd comparer, be connected respectively, described the first comparer inverting input is connected to described VR end, described the first comparator output terminal is connected with the positive pole of the first diode, the negative pole of described the first diode is connected with the positive pole of the second diode, the negative pole of described the second diode is connected to the output terminal of the 3rd comparer, and the inverting input of described the 3rd comparer is connected to reference voltage 2.500V; The output terminal of described the first comparer, the 3rd comparer is connected to described VCC power end by the first current source, the second current source respectively;
Described ST end is connected to the 4th comparer in-phase input end, and be connected with the negative pole of the anode of the 5th diode, the 3rd transistorized drain electrode, the 5th voltage stabilizing diode, described the 4th comparer inverting input is connected to reference voltage 2.500V, described the 4th comparator output terminal connects respectively the negative pole of the 4th current source and the 4th diode, the positive pole of described the 4th diode is connected with the negative pole of input end, the first diode and the 3rd diode of impact damper, the positive pole of the second diode respectively, and described the 4th current source is connected to described VCC power end;
Described ground wire GND is connected with the 3rd transistorized source electrode, the 3rd transistorized source electrode is connected to described VCC power end through the 5th stabilivolt and the 5th current source respectively, the 3rd transistorized drain electrode connects described VCC power end through the 5th diode, and the output terminal of the 3rd transistor gate and the 5th voltage comparator is connected to described VCC power end altogether through the 8th current source; The inverting input of the 5th voltage comparator is connected to another reference voltage 0.250V, and the in-phase input end of described the 5th voltage comparator is connected and is connected with the CS end after the second resistance;
After described FB end series connection the 4th resistance, with the second comparer in-phase input end, be connected, described the second comparer is anti-phase is connected to reference voltage 2.500V to input end, described the second comparator output terminal is connected to the VCC power end via the 3rd current source, and the output terminal of tertiary voltage comparer also connects the negative pole of the second diode;
Described DR end is connected with the 7th diode cathode, the 7th voltage stabilizing diode negative pole respectively, and described the 7th diode cathode is connected to the VCC power end, the 7th voltage stabilizing diode plus earth; The positive pole of described the 7th diode, negative pole also are connected with the 4th transistorized source electrode respectively; The positive pole of described the 7th diode also is connected with the 5th transistorized drain electrode; Described the 4th transistor, the 5th transistor common gate connect and are connected with the output terminal of impact damper.
2. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, described reference voltage adjustment end initialization circuit comprises the first transistor, the second stabilivolt, the first electric capacity, the 6th current source, the 6th operational amplifier, transistor seconds and the 3rd stabilivolt;
Described R end is connected to the source electrode of the first transistor and the in-phase input end of the 6th operational amplifier simultaneously, and the grid of the first transistor is exported a reference voltage 2.500V, and the drain electrode of the first transistor is connected to the inverting input of the 6th operational amplifier; The 6th operational amplifier output terminal is connected with the grid of transistor seconds, the source ground of transistor seconds, and the drain electrode of transistor seconds is connected to described VR end; One the 3rd stabilivolt in parallel between the source electrode of described transistor seconds, drain electrode.
3. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, connect the first voltage regulator resistor between VR end and R end, is connected the second voltage adjusting resistance between R end and ground wire, realizes the in-phase end (the DV end is connected) of the first voltage comparator and the input voltage difference setting of end of oppisite phase (with VR, hold and be connected).
4. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, DV end and first and the in-phase input end of tertiary voltage comparer between first resistance of having connected, the first resistance with first and the in-phase input end of tertiary voltage comparer between connecting line and ground wire GND between in parallel the 4th voltage stabilizing diode and the second electric capacity; Wherein, the negative pole of the 4th voltage stabilizing diode is connected with the in-phase input end of tertiary voltage comparer with first, and the positive pole of the 4th voltage stabilizing diode is connected with ground wire GND.
5. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, second resistance of having connected between the in-phase end of CS end and the 5th voltage comparator, connecting line between the in-phase input end of the second resistance and the 5th voltage comparator is connected with the positive pole of the 6th diode, and the negative pole of the 6th diode connects ground wire GND; Be parallel with the 3rd electric capacity and the 3rd resistance on connecting line between the second resistance and port CS and between ground wire GND.
6. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, the 4th resistance of having connected between the in-phase input end of FB end and second voltage comparer, connecting line between the in-phase input end of the 4th resistance and second voltage comparer is connected with the negative pole of the 6th voltage stabilizing diode, and the positive pole of the 6th voltage stabilizing diode connects ground wire GND; Be parallel with the 4th electric capacity and the 5th resistance on connecting line between the 4th resistance and port FB and between ground wire GND.
7. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, uses electric capacity, at the ST end, protection trigger pip time holding circuit is set, and comprises the capacitor C of series connection
t1with C
t, and capacitance C
t1>=0.5C
t.
8. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, uses resistance and electric capacity at the ST end, protection trigger pip time holding circuit, resistance R to be set simultaneously
twith capacitor C
t1after parallel connection again with capacitor C
tseries connection, C
t1>=0.5C
t.
9. power source loads voltage according to claim 8 is adjusted supervisory circuit, it is characterized in that described capacitor C
ttwo ends be parallel to the 6th transistorized source electrode and drain electrode, the 6th transistorized grid is connected with the negative pole of two diodes, the positive pole of two diodes is connected to respectively the output terminal of the 7th amplifier, the 8th amplifier; The in-phase input end of the 7th amplifier is connected to described VR end, the inverting input of the 7th amplifier be connected to the DV end; The in-phase input end of the 8th amplifier is connected to described FB end, and the inverting input of the 8th amplifier is connected to the R end.
10. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, power end VCC service area is at DC5.0-18.0V, and high voltage supply end HV end input voltage range is DC18-100V.
11. power source loads voltage according to claim 1 is adjusted supervisory circuit, it is characterized in that, HV end input voltage range is DC18-100V, when this port provides the voltage of DC18-100V, the VCC power end produces DC18V voltage, when the voltage of VCC power end reaches 18V, the input current of HV end automatically shuts down.
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| CN201310407119.6A CN103488225B (en) | 2013-09-09 | 2013-09-09 | Power supply load voltage adjusting and monitoring circuit |
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| CN201310407119.6A CN103488225B (en) | 2013-09-09 | 2013-09-09 | Power supply load voltage adjusting and monitoring circuit |
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| CN103488225A true CN103488225A (en) | 2014-01-01 |
| CN103488225B CN103488225B (en) | 2015-05-13 |
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Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107995749A (en) * | 2017-12-28 | 2018-05-04 | 广州爱易学智能信息科技有限公司 | The driving short-circuit protection circuit of classroom blackboard LED light strip |
| CN109936206A (en) * | 2019-05-05 | 2019-06-25 | 深圳市阿达视高新技术有限公司 | Super capacitor balancing circuitry and vehicle electronic device |
| CN110069026A (en) * | 2019-03-26 | 2019-07-30 | 柳州埃锡科技有限公司 | Adaptive IO monitor |
| CN111006575A (en) * | 2019-12-06 | 2020-04-14 | 江西洪都航空工业集团有限责任公司 | Linear variable differential transformer signal generating device |
| CN112580399A (en) * | 2019-09-29 | 2021-03-30 | 京东方科技集团股份有限公司 | Fingerprint identification circuit, driving method thereof, display panel and display device |
| CN112580399B (en) * | 2019-09-29 | 2024-07-05 | 京东方科技集团股份有限公司 | Fingerprint identification circuit, driving method thereof, display panel and display device |
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| CN2741087Y (en) * | 2004-10-27 | 2005-11-16 | 华为技术有限公司 | Overvoltage and undervoltage slow start protecting circuit of negative power supply |
| US20090096510A1 (en) * | 2007-10-15 | 2009-04-16 | Kabushiki Kaisha Toshiba | Reference voltage generating circuit for use of integrated circuit |
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- 2013-09-09 CN CN201310407119.6A patent/CN103488225B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN2741087Y (en) * | 2004-10-27 | 2005-11-16 | 华为技术有限公司 | Overvoltage and undervoltage slow start protecting circuit of negative power supply |
| US20090096510A1 (en) * | 2007-10-15 | 2009-04-16 | Kabushiki Kaisha Toshiba | Reference voltage generating circuit for use of integrated circuit |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107995749A (en) * | 2017-12-28 | 2018-05-04 | 广州爱易学智能信息科技有限公司 | The driving short-circuit protection circuit of classroom blackboard LED light strip |
| CN110069026A (en) * | 2019-03-26 | 2019-07-30 | 柳州埃锡科技有限公司 | Adaptive IO monitor |
| CN110069026B (en) * | 2019-03-26 | 2022-03-25 | 柳州埃锡科技有限公司 | Self-adaptive IO monitor |
| CN109936206A (en) * | 2019-05-05 | 2019-06-25 | 深圳市阿达视高新技术有限公司 | Super capacitor balancing circuitry and vehicle electronic device |
| CN112580399A (en) * | 2019-09-29 | 2021-03-30 | 京东方科技集团股份有限公司 | Fingerprint identification circuit, driving method thereof, display panel and display device |
| CN112580399B (en) * | 2019-09-29 | 2024-07-05 | 京东方科技集团股份有限公司 | Fingerprint identification circuit, driving method thereof, display panel and display device |
| CN111006575A (en) * | 2019-12-06 | 2020-04-14 | 江西洪都航空工业集团有限责任公司 | Linear variable differential transformer signal generating device |
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| Publication number | Publication date |
|---|---|
| CN103488225B (en) | 2015-05-13 |
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Inventor after: Li Xuefei Inventor before: Chen Bingyan Inventor before: Gao Yuan Inventor before: Tang Yibin Inventor before: Yin Cheng Inventor before: Fei Juntao Inventor before: Zhu Changping Inventor before: Zhou Juan Inventor before: Han Yifeng Inventor before: Shan Minglei Inventor before: Liu Hao Inventor before: Han Qingbang Inventor before: Li Qinglong |
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Effective date of registration: 20151207 Address after: 2, building 8, building 2, Cole Road, Tung Chung Town, Nansha District, Guangzhou, Guangdong 511400, China Patentee after: GUANGZHOU KAIHUI ELECTRONICS CO.,LTD. Address before: 213022 Changzhou Jin Ling North Road, Jiangsu, No. 200 Patentee before: CHANGZHOU CAMPUS OF HOHAI University |
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