CN1097302C - 形成半导体器件中芯柱的方法 - Google Patents
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- 238000000034 method Methods 0.000 title claims abstract description 20
- 239000004065 semiconductor Substances 0.000 title claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 claims abstract description 112
- 239000002184 metal Substances 0.000 claims abstract description 112
- 230000004888 barrier function Effects 0.000 claims description 25
- 229910052721 tungsten Inorganic materials 0.000 claims description 20
- 239000010937 tungsten Substances 0.000 claims description 20
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 16
- 239000010949 copper Substances 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 7
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical group [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 7
- 229910052710 silicon Inorganic materials 0.000 claims description 7
- 239000010703 silicon Substances 0.000 claims description 7
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- -1 tungsten nitride Chemical class 0.000 claims description 7
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 239000000463 material Substances 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 4
- 239000004411 aluminium Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 239000000428 dust Substances 0.000 claims description 3
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 claims description 3
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims description 2
- 230000008021 deposition Effects 0.000 claims description 2
- 229910052707 ruthenium Inorganic materials 0.000 claims description 2
- 238000001465 metallisation Methods 0.000 abstract description 4
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Abstract
本发明公开了一种形成半导体器件中芯柱的方法。使用性质彼此不同的金属,以使金属在接触孔中沿固定方向生长,由此防止由因为金属在接触孔内生长方向导致的密度不同而造成的过腐蚀。利用形成芯柱的全表面腐蚀工艺,可以使在接触孔顶上产生的差锐度最小,从而在随后的金属化工艺期间改善金属的台阶覆盖,增强器件的电特性和可靠性。
Description
本发明涉及一种在半导体器件中形成芯柱的方法,特别涉及一种形成能改善金属台阶覆盖的半导体器件中芯柱的方法。
通常,形成于硅衬底中的结、金属布线或下层金属布线和上层金属布线通过接触孔或通孔互连。由于半导体器件集成度更高,而减小接触孔的尺寸,相应地接触孔中金属的台阶覆盖变差。为了解决该问题,在接触孔中埋置如钨(W)等金属,以形成芯柱,然后再进行形成金属层的工艺。
下面结合图1A-1C说明形成芯柱的常规方法。
图1A-1C是说明形成半导体器件中芯柱的常规方法的器件剖面图。
参见图1A,在硅衬底1上形成绝缘层3,硅衬底1中形成有结2。腐蚀部分绝缘层3,形成接触孔6,于是暴露出结2。在包括接触孔6的整个结构上形成阻挡金属层4。阻挡金属层4是通过依次淀积钛(Ti)和氮化钛(TiN)形成的。
在图1B中,通过钨淀积工艺,直到完全掩埋接触孔6为止,从而在阻挡金属层4上形成钨层5。
图2是图1B中的接触孔6的放大示图,如该图所示,钨层5垂直于阻挡金属层4的表面生长。即,形成于接触孔6底表面的钨层5向上生长,而形成于接触孔6侧壁的钨层横向生长。因此,接触孔6中心的钨层5较不致密。
参见图1C,完全腐蚀钨层5,直到形成于绝缘层3上的阻挡金属层4暴露出为止,从而在接触孔6内形成钨芯柱5A。由于对应于接触孔6中心的钨层5的密度如上所述最低,所以接触孔6内钨层5的中心部分在腐蚀钨层5期间被过腐蚀,因此,在随后的金属化工艺期间,金属的台阶覆盖变差。所以,产生了器件电特性和可靠性退化的问题。
因此,本发明的目的在于提供一种形成半导体器件中芯柱的方法。
按本发明,使用性质彼此不同的金属,以使金属在接触孔中沿固定方向生长。在接触孔内生长的金属层的密度变均匀,由此防止由因为金属层生长方向导致的密度不同而造成的过腐蚀。
为了实现上述目的,本发明的方法1包括以下步骤:在形成了绝缘层的硅衬底上形成接触孔;在包括所述接触孔的整个结构上形成阻挡金属层,所述阻挡金属层是通过依次淀积钛(Ti)和氮化钛(TiN)形成的;在所述阻挡金属层上形成第一金属层,所述第一金属层由铝(Al)、铜(Cu)、钨(W)组成的集合形成;在所述第一金属层上形成第二金属层,所述第二金属层由氮化钛(TiN)、钌(Ru)、氧化钌(RuO2)、氮化钨(WN2)组成的集合形成;腐蚀所述第二金属层的一部分,以在所述接触孔侧壁的所述第一金属层上形成第二金属层隔离层;在包括所述第二金属层隔离层的所述第一金属层上形成第三金属层,直到所述接触孔被完全掩埋为止,并且第一和第三金属层由相同的材料形成;以及腐蚀所述第三和第一金属层,以暴露形成于所述绝缘层上的所述阻挡金属层,从而在所述接触孔内形成金属芯柱。
通过阅读结合附图对实施例的详细说明,可以理解本发明的其它目的和优点,附图中:
图1A-1C是说明形成半导体器件中芯柱的常规方法的器件剖面图;
图2是图1B中接触孔的放大图;
图3A-3E是说明根据本发明形成半导体器件中芯柱的方法的器件剖面图;
图4是图3D中接触孔的放大图。
下面将结合附图详细说明本发明的一个实施例。
3A-3E是说明根据本发明形成半导体器件中芯柱的方法的器件剖面图。
参见图3A,在硅衬底11上形成绝缘层13,硅衬底上形成有结12。腐蚀部分绝缘层13,形成接触孔19,由此暴露结12。在包括接触孔19的整个结构上形成阻挡金属层14。阻挡金属层14是通过依次淀积钛(Ti)和氮化钛(TiN)形成的。
在图3B中,在阻挡金属层14上形成第一金属层15,在第一金属层15上形成第二金属层16。第一金属层15由铝(Al)、铜(Cu)、钨(W)组成的集合形成。第二金属层16由氮化钛(TiN)、钉(Ru)、氧化钌(RuO2)、氮化钨(WN2)组成的集合形成。第一和第二层金属15和16是利用化学汽相淀积法或物理汽相淀积法形成的。
参见图3C和3D,充分腐蚀第二金属层16,在形成于接触孔19侧壁的第一金属层15上形成第二金属层隔离层16A。进行淀积工艺,直到接触孔19被完全掩埋为止,在第一金属层15和第二金属隔离层16A上形成用于构成芯柱的第三金属层17。第三金属层17由与构成第一金属层15的铝(Al)、铜(Cu)、钨(W)组成的集合形成。
图4是图3D中接触孔的放大图,如图4所示,在由与第三金属层材料不同的第二金属隔离层16A上几乎不生长第三金属层17。然而,形成于第一金属层15上且由与构成第一金属层15相同的材料制成的第三金属层17在第一金属层15上快速生长。因此,第三金属层17多数在接触孔19内竖直生长,接触孔19内的第三金属层17的密度均匀。
参见图3E,充分腐蚀第三和第一金属层17和15,直到形成于绝缘层13上的阻挡金属层14暴露出为止,由此在接触孔19内形成由第一金属层15、第二金属隔离层16A、和第三金属层17组成的金属芯柱18。
如上所述,由于接触孔19内第三金属层17的密度均匀,所以可以均匀腐蚀第三金属层17。因此,通过深腐蚀工艺形成的金属芯柱18是平面化的,所以在随后的金属化工艺中可以改善金属芯柱18的台阶覆盖。
按本发明,如果所淀积的构成金属芯柱18的第一、第二和第三金属层15、16和17的总厚度约为5000埃,则要求形成厚约700-1700埃的第一金属层15,该厚度是总厚度的七分之一(1/7)至三分之一(1/3),形成厚约100-500埃的第二金属层16,形成其余厚度的第三金属层17。
为了防止在第二金属隔离层16A上生长第三金属层17,在低于与第三金属层17相同材料的第一金属层15的淀积温度下淀积第三金属层17。例如,如果第一和第三金属层15和17皆由钨形成,则第一金属层15在约450℃温度下淀积,而第三金属层17则在约300℃温度下淀积。
如上所述,按本发明,使用性质彼此不同的金属,以使金属在接触孔中沿固定方向生长。因此,在接触孔中生长的金属密度均匀,防止了由因为金属层在接触孔中的生长方向导致的密度不同造成的过腐蚀。因此,由形成芯柱的深腐蚀工艺,可以使在接触孔上部产生的台阶差减小,从而在随后的金属化工艺后,改善了金属芯柱的台阶覆盖,增强了器件的电特性和可靠性。
前面的说明,尽管在对优选实施例的说明中带有某种程度的特殊性,但这只是对本发明原理的说明。应该明了,本发明并不限于这里所公开的这些优选实施例。因此,在不脱离本发明的范围和精神的情况下,可以做出各种变化,但所有变化皆包含于本发明的另外的实施例中。
Claims (4)
1.一种形成半导体器件中芯柱的方法,其特征在于,该方法包括以下步骤:
在形成了绝缘层的硅衬底上形成接触孔;
在包括所述接触孔的整个结构上形成阻挡金属层,所述阻挡金属层是通过依次淀积钛(Ti)和氮化钛(TiN)形成的;
在所述阻挡金属层上形成第一金属层,所述第一金属层由铝(Al)、铜(Cu)、钨(W)组成的集合形成;
在所述第一金属层上形成第二金属层,所述第二金属层由氮化钛(TiN)、钌(Ru)、氧化钌(RuO2)、氮化钨(WN2)组成的集合形成;
腐蚀所述第二金属层的一部分,以在所述接触孔侧壁的所述第一金属层上形成第二金属层隔离层;
在包括所述第二金属层隔离层的所述第一金属层上形成第三金属层,直到所述接触孔被完全掩埋为止,并且第一和第三金属层由相同的材料形成;以及
腐蚀所述第三和第一金属层,以暴露形成于所述绝缘层上的所述阻挡金属层,从而在所述接触孔内形成金属芯柱。
2.根据权利要求1的形成半导体器件中芯柱的方法,其特征在于,在低于所述第一金属层的淀积温度下形成所述第三金属层。
3.根据权利要求1的形成半导体器件中芯柱的方法,其特征在于,按第一、第二和第三金属层总厚度的七分之一到三分之一的厚度形成所述第一金属层。
4.根据权利要求1的形成半导体器件中芯柱的方法,其特征在于,按约100-500埃的厚度形成所述第二金属层。
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KR960001601B1 (ko) * | 1992-01-23 | 1996-02-02 | 삼성전자주식회사 | 반도체 장치의 접촉구 매몰방법 및 구조 |
JPH04307933A (ja) * | 1991-04-05 | 1992-10-30 | Sony Corp | タングステンプラグの形成方法 |
JP3216104B2 (ja) * | 1991-05-29 | 2001-10-09 | ソニー株式会社 | メタルプラグ形成方法及び配線形成方法 |
KR0144956B1 (ko) * | 1994-06-10 | 1998-08-17 | 김광호 | 반도체 장치의 배선 구조 및 그 형성방법 |
-
1996
- 1996-06-28 KR KR1019960024939A patent/KR100193897B1/ko not_active IP Right Cessation
-
1997
- 1997-06-16 TW TW086108330A patent/TW366561B/zh active
- 1997-06-19 GB GB9712953A patent/GB2314679B/en not_active Expired - Fee Related
- 1997-06-23 JP JP9165855A patent/JP2828439B2/ja not_active Expired - Fee Related
- 1997-06-25 US US08/882,049 patent/US5837608A/en not_active Expired - Fee Related
- 1997-06-27 DE DE19727399A patent/DE19727399A1/de not_active Ceased
- 1997-06-27 CN CN97111874A patent/CN1097302C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH1064844A (ja) | 1998-03-06 |
GB9712953D0 (en) | 1997-08-20 |
JP2828439B2 (ja) | 1998-11-25 |
CN1177202A (zh) | 1998-03-25 |
US5837608A (en) | 1998-11-17 |
GB2314679A (en) | 1998-01-07 |
GB2314679B (en) | 2001-07-25 |
DE19727399A1 (de) | 1998-01-02 |
KR100193897B1 (ko) | 1999-06-15 |
KR980005571A (ko) | 1998-03-30 |
TW366561B (en) | 1999-08-11 |
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