CN109524521B - Light emitting diode epitaxial wafer and manufacturing method thereof - Google Patents

Light emitting diode epitaxial wafer and manufacturing method thereof Download PDF

Info

Publication number
CN109524521B
CN109524521B CN201811133968.6A CN201811133968A CN109524521B CN 109524521 B CN109524521 B CN 109524521B CN 201811133968 A CN201811133968 A CN 201811133968A CN 109524521 B CN109524521 B CN 109524521B
Authority
CN
China
Prior art keywords
layer
type gan
gan layer
aln
epitaxial wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201811133968.6A
Other languages
Chinese (zh)
Other versions
CN109524521A (en
Inventor
唐成双
李昱桦
张燕飞
刘春杨
胡加辉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HC Semitek Zhejiang Co Ltd
Original Assignee
HC Semitek Zhejiang Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
First worldwide family litigation filed litigation Critical https://patents.darts-ip.com/?family=65770026&utm_source=***_patent&utm_medium=platform_link&utm_campaign=public_patent_search&patent=CN109524521(B) "Global patent litigation dataset” by Darts-ip is licensed under a Creative Commons Attribution 4.0 International License.
Application filed by HC Semitek Zhejiang Co Ltd filed Critical HC Semitek Zhejiang Co Ltd
Priority to CN201811133968.6A priority Critical patent/CN109524521B/en
Publication of CN109524521A publication Critical patent/CN109524521A/en
Application granted granted Critical
Publication of CN109524521B publication Critical patent/CN109524521B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention discloses a light-emitting diode epitaxial wafer and a manufacturing method thereof, and belongs to the technical field of semiconductors. The light emitting diode epitaxial wafer comprises a substrate, and a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer and a P-type GaN layer which are sequentially stacked on the substrate, and further comprises an AlN layer arranged on the P-type GaN layer. The energy band of the upper surface of the P-type GaN layer is adjusted and controlled, the bending direction of the upper surface of the P-type GaN layer is changed from upward to downward, the original hole potential energy valley disappears, and the hole is not limited on the surface any more, so that the movement of the hole towards the direction of the multiple quantum wells is promoted, the injection efficiency of the hole is improved, and the luminous efficiency of the LED is improved.

Description

Light emitting diode epitaxial wafer and manufacturing method thereof
Technical Field
The invention relates to the technical field of semiconductors, in particular to a light-emitting diode epitaxial wafer and a manufacturing method thereof.
Background
An LED (Light Emitting Diode) is a semiconductor electronic component capable of Emitting Light. As a novel high-efficiency, environment-friendly and green solid-state illumination light source, the solid-state illumination light source is rapidly and widely applied, such as traffic signal lamps, automobile interior and exterior lamps, urban landscape illumination, mobile phone backlight sources and the like.
The conventional GaN-based LED epitaxial wafer comprises a substrate, and a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer and a P-type layer which are sequentially stacked on the substrate. The N-type layer is a GaN layer doped with Si and can provide electrons, and the P-type layer is a GaN layer doped with Mg and can provide holes. When current is injected into the GaN-based LED epitaxial wafer, electrons provided by the N-type layer and holes provided by the P-type layer migrate to the multiple quantum well layer under the driving of the current, and radiative recombination luminescence is generated in the multiple quantum well layer.
In the process of implementing the invention, the inventor finds that the prior art has at least the following problems:
in the LED epitaxial wafer, a valence band of a P-type GaN layer, which is bent upwards, is a potential energy valley for a hole, and a part of the hole is limited in the potential energy valley, so that the hole is difficult to be injected into a light emitting region of a multiple quantum well, the hole injection efficiency is reduced, and the light emitting efficiency of the LED is reduced.
Disclosure of Invention
The embodiment of the invention provides a light-emitting diode epitaxial wafer and a manufacturing method thereof, which can improve the injection efficiency of holes so as to improve the luminous efficiency of an LED. The technical scheme is as follows:
in one aspect, an embodiment of the present invention provides an led epitaxial wafer, where the led epitaxial wafer includes a substrate, and a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electron blocking layer, and a P-type GaN layer sequentially stacked on the substrate, and is characterized in that the led epitaxial wafer further includes an AlN layer disposed on the P-type GaN layer.
Further, the AlN layer has a thickness of 0.6 to 1.8 nm.
Further, the AlN layer has a thickness of 1.2 nm.
In another aspect, the present invention provides a method for manufacturing an epitaxial wafer of a light emitting diode, the method comprising:
providing a substrate;
growing a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer and a P-type GaN layer on the substrate in sequence;
and growing an AlN layer on the P-type GaN layer.
Further, the AlN layer has a thickness of 0.6 to 1.8 nm.
Further, the AlN layer has a thickness of 1.2 nm.
Further, the growth temperature of the AlN layer is 800-900 ℃.
Further, the growth pressure of the AlN layer is 50-100 torr.
Further, the growth pressure of the AlN layer was 75 torr.
Further, after the P-type GaN layer is grown, the manufacturing method further includes:
and reducing the temperature of the substrate to 850 ℃, and carrying out in-situ annealing treatment on the P-type GaN layer in a pure nitrogen atmosphere for 10 min.
The technical scheme provided by the embodiment of the invention has the following beneficial effects:
through growing the AlN layer on P type GaN layer, the forbidden bandwidth width of AlN material is bigger than the GaN material, after one deck AlN grows on P type GaN layer upper surface, in order to align the Fermi level of two kinds of materials, the energy band of P type GaN layer upper surface can receive regulation and control, the crooked direction of P type GaN layer upper surface is turned into downwards by upwards, then original "potential energy valley" disappears, the hole will no longer be restricted to the surface, thereby promoted the direction motion of hole toward the multiple quantum well, improved the injection efficiency of hole, thereby improved LED's luminous efficacy. The AlN layer can reduce the density of dangling bonds on the upper surface of the P-type GaN layer, reduce the recombination loss on the surface of a cavity, reduce the density of surface defects of the P-type GaN layer, and reduce a leakage channel and a non-radiative recombination center caused by the surface defects, thereby further improving the radiant luminous efficiency of the LED.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention;
fig. 2 is a flowchart of a method for manufacturing an epitaxial wafer of a light emitting diode according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Fig. 1 is a schematic structural diagram of an led epitaxial wafer according to an embodiment of the present invention, and as shown in fig. 1, the led epitaxial wafer includes a substrate 1, and a low-temperature buffer layer 2, an undoped GaN layer 3, an N-type layer 4, a multi-quantum well layer 5, an electron blocking layer 6, and a P-type GaN layer 7 sequentially stacked on the substrate 1.
The light emitting diode epitaxial wafer further comprises an AlN layer 8 disposed on the P-type GaN layer 7.
According to the embodiment of the invention, the AlN layer grows on the P-type GaN layer, the forbidden band width of the AlN material is larger than that of the GaN material, after one layer of AlN grows on the upper surface of the P-type GaN layer, in order to align the Fermi levels of the two materials, the energy band of the upper surface of the P-type GaN layer can be regulated and controlled, the bending direction of the upper surface of the P-type GaN layer is changed from upward to downward, the original potential energy valley disappears, and the holes are not limited on the surface any more, so that the movement of the holes towards the direction of the multiple quantum wells is promoted, the injection efficiency of the holes is improved, and the luminous efficiency of the LED is improved. The AlN layer can reduce the density of dangling bonds on the upper surface of the P-type GaN layer, reduce the recombination loss on the surface of a cavity, reduce the density of surface defects of the P-type GaN layer, and reduce a leakage channel and a non-radiative recombination center caused by the surface defects, thereby further improving the radiant luminous efficiency of the LED.
Further, the AlN layer 8 has a thickness of 0.6 to 1.8 nm. Because the lattice constant of the AlN material is about 0.3nm, if the thickness of the AlN layer 8 is less than 0.6nm, the grown AlN layer is not compact enough in structure, and the effects of regulating the energy band and reducing the defect density are poor. If the AlN layer 8 has a thickness greater than 1.8nm, the AlN layer 8 becomes too thick, and an applied current is less likely to flow into the P-type GaN layer 7, resulting in a decrease in the photoelectric conversion efficiency.
Preferably, the AlN layer 8 has a thickness of 1.2 nm. In this case, the AlN layer 8 can form a dense structure, and serves to reduce the dangling bond density and the surface defect density on the upper surface of the P-type GaN layer 7, without affecting the inflow of an applied current. The energy band of the upper surface of the P-type GaN layer 7 which is originally bent upwards is regulated and controlled to be bent downwards, and the holes are not limited on the surface any more, so that the movement of the holes towards the direction of the multiple quantum wells is promoted, the injection efficiency of the holes is improved, and the luminous efficiency of the LED is improved.
Alternatively, the substrate 1 may be a sapphire substrate.
Alternatively, the buffer layer 2 may be a GaN layer having a thickness of 15nm to 35 nm.
Optionally, the thickness of the undoped GaN layer 3 is 2um to 3 um.
Alternatively, the N-type layer 4 may be a Si-doped GaN layer with a thickness of 2um to 3 um.
Alternatively, the multiple quantum well layer 5 is a plurality of InGaN quantum well layers 51 and GaN quantum barrier layers 52 alternately grown in a plurality of periods. The total thickness of the multiple quantum well layer 5 may be 130nm to 170 nm.
Alternatively, the electron blocking layer 6 may be an Mg-doped AlGaN layer with a thickness of 80 nm.
Alternatively, the thickness of the P-type GaN layer 7 is 0.2 um.
An embodiment of the present invention provides a method for manufacturing an led epitaxial wafer, which is used to manufacture an led epitaxial wafer provided in the first embodiment of the present invention, and fig. 2 is a flowchart of a method for manufacturing an led epitaxial wafer provided in the first embodiment of the present invention, as shown in fig. 2, the method includes:
step 201, a substrate is provided.
In this embodiment, the substrate is sapphire, and the substrate may be placed on a graphite tray and fed into the reaction chamber for epitaxial material growth.
Step 201 further comprises:
and controlling the temperature of the reaction chamber to 1050 ℃ and the pressure to 200-500 Torr, annealing the sapphire substrate in a pure hydrogen atmosphere for 5-6 min, and then nitriding the sapphire substrate.
The invention uses Veeco EPIK700MOCVD to grow high-brightness GaN-based LED epitaxial wafer. By using high-purity H2Or high purity N2Or high purity H2And high purity N2The mixed gas of (2) is used as a carrier gas, high-purity NH3As the N source, trimethyl gallium (TMGa) and triethyl gallium (TEGa) as gallium sources, trimethyl indium (TMIn) as indium sources, Silane (SiH)4) As N-type dopant, trimethylaluminum (TMAl) as aluminum source, magnesium diclomentate (CP)2Mg) as a P-type dopant, the substrate is (0001) plane sapphire, and the chamber pressure is between 50torr and 600 torr.
Step 202, growing a low temperature buffer layer on the substrate.
Specifically, the temperature of the reaction chamber is controlled at 540 ℃, the pressure is controlled at 400-600 torr, and a low-temperature GaN buffer layer with the thickness of 25nm is grown.
Optionally, after performing step 202, the manufacturing method may further include:
stopping introducing TMGa, raising the temperature of the reaction chamber to 1040 ℃, and carrying out annealing treatment on the low-temperature buffer layer in situ for 8 min.
Step 203, growing an undoped GaN layer on the low-temperature buffer layer.
Specifically, the temperature of the reaction chamber is controlled at 1040 ℃, the pressure is controlled at 300-500 torr, and an undoped GaN layer with the thickness of 2-3 μm is grown.
Step 204, an N-type layer is grown on the undoped GaN layer.
Specifically, the growth temperature is kept unchanged, the pressure is controlled to be 100-300 torr, and an N-type GaN layer with the thickness of 2-3 um is grown.
Step 205, growing a multiple quantum well layer on the N-type layer.
In the embodiment, the multiple quantum well layers are multi-period superlattice structures, each superlattice structure comprises an InGaN quantum well layer and a GaN quantum barrier layer grown on the InGaN quantum well layer, and the total thickness of the multiple quantum well layers is 130-170 nm.
Specifically, step 205 may include:
the temperature of the reaction chamber is controlled at 780-800 ℃, the pressure is controlled at 100-300 Torr, and an InGaN quantum well layer with a thickness of 2.5-3.5 nm is grown.
Controlling the temperature of the reaction chamber at 860 ℃ and 880 ℃, controlling the pressure at 100-300 Torr, and growing a GaN quantum barrier layer with the thickness of 12-14 nm.
And step 206, growing an electron barrier layer on the multi-quantum well layer.
Specifically, the temperature of the reaction chamber is controlled at 950 ℃, the pressure is controlled at 100-200 Torr, and the Mg-doped AlGaN electron barrier layer with the thickness of 80nm is grown. The doping concentration of Mg in the electron blocking layer is 5X 1019cm-3
And step 207, growing a P-type GaN layer on the electron blocking layer.
Specifically, the temperature of the reaction chamber is controlled at 950 ℃, the pressure is controlled at 400-600 Torr, and a Mg-doped P-type GaN layer with the thickness of 0.2um is grown. The doping concentration of Mg in the P-type GaN layer is 5 multiplied by 1020cm-3
Specifically, after the generating step 207 is performed, the manufacturing method further includes:
and reducing the temperature of the substrate to 850 ℃, and carrying out in-situ annealing treatment on the P-type GaN layer in a pure nitrogen atmosphere for 10 min.
And step 208, growing an AlN layer on the P-type GaN layer.
Specifically, the temperature of the reaction chamber is controlled to be 800-900 ℃, the pressure is controlled to be 50-100 torr, and an AlN layer with the thickness of 0.6-1.8 nm is grown.
In this example, an AlN layer was grown to a thickness of 1.2 nm.
After the steps are completed, the temperature of the reaction chamber is reduced to 800 ℃, annealing treatment is carried out for 5min in the nitrogen atmosphere, then the temperature is gradually reduced to the room temperature, and the epitaxial growth of the light emitting diode is finished.
The LED epitaxial wafer provided by the embodiment of the invention is subjected to subsequent processing technologies of cleaning, deposition, photoetching and etching to prepare a single 10 × 30mil LED chip.
After testing, the light intensity of the 10 × 30mil LED chip manufactured by the prior art is 190mW under the 120mA driving current, and the light intensity of the LED chip provided by the embodiment of the present invention is 192mW under the 120mA driving current, so that the light emitting efficiency is improved by about 1%.
According to the embodiment of the invention, the AlN layer grows on the P-type GaN layer, the forbidden band width of the AlN material is larger than that of the GaN material, after one layer of AlN grows on the upper surface of the P-type GaN layer, in order to align the Fermi levels of the two materials, the energy band of the upper surface of the P-type GaN layer can be regulated and controlled, the bending direction of the upper surface of the P-type GaN layer is changed from upward to downward, the original potential energy valley disappears, and the holes are not limited on the surface any more, so that the movement of the holes towards the direction of the multiple quantum wells is promoted, the injection efficiency of the holes is improved, and the luminous efficiency of the LED is improved. The AlN layer can reduce the density of dangling bonds on the upper surface of the P-type GaN layer, reduce the recombination loss on the surface of a cavity, reduce the density of surface defects of the P-type GaN layer, and reduce a leakage channel and a non-radiative recombination center caused by the surface defects, thereby further improving the radiant luminous efficiency of the LED.
The present invention is not limited to the above preferred embodiments, and any modifications, equivalent replacements, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (8)

1. The light-emitting diode epitaxial wafer comprises a substrate, and a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electron blocking layer and a P-type GaN layer which are sequentially stacked on the substrate, and is characterized by further comprising an AlN layer arranged on the P-type GaN layer, wherein the AlN layer covers the upper surface of the P-type GaN layer, and the thickness of the AlN layer is 0.6-1.8 nm.
2. The light emitting diode epitaxial wafer of claim 1, wherein the AlN layer has a thickness of 1.2 nm.
3. A manufacturing method of a light emitting diode epitaxial wafer is characterized by comprising the following steps:
providing a substrate;
growing a low-temperature buffer layer, an undoped GaN layer, an N-type layer, a multi-quantum well layer, an electronic barrier layer and a P-type GaN layer on the substrate in sequence;
and growing an AlN layer on the P-type GaN layer, wherein the AlN layer covers the upper surface of the P-type GaN layer, and the thickness of the AlN layer is 0.6-1.8 nm.
4. The manufacturing method according to claim 3, wherein the AlN layer has a thickness of 1.2 nm.
5. The method according to claim 3, wherein the AlN layer is grown at a temperature of 800 to 900 ℃.
6. The method according to claim 3, wherein the growth pressure of the AlN layer is 50to 100 torr.
7. The method according to claim 3, wherein a growth pressure of the AlN layer is 75 torr.
8. The manufacturing method according to claim 3, further comprising, after growing the P-type GaN layer:
and reducing the temperature of the substrate to 850 ℃, and carrying out in-situ annealing treatment on the P-type GaN layer in a pure nitrogen atmosphere for 10 min.
CN201811133968.6A 2018-09-27 2018-09-27 Light emitting diode epitaxial wafer and manufacturing method thereof Active CN109524521B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201811133968.6A CN109524521B (en) 2018-09-27 2018-09-27 Light emitting diode epitaxial wafer and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201811133968.6A CN109524521B (en) 2018-09-27 2018-09-27 Light emitting diode epitaxial wafer and manufacturing method thereof

Publications (2)

Publication Number Publication Date
CN109524521A CN109524521A (en) 2019-03-26
CN109524521B true CN109524521B (en) 2020-04-14

Family

ID=65770026

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201811133968.6A Active CN109524521B (en) 2018-09-27 2018-09-27 Light emitting diode epitaxial wafer and manufacturing method thereof

Country Status (1)

Country Link
CN (1) CN109524521B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740693A (en) * 2009-12-25 2010-06-16 武汉华灿光电有限公司 Method for reducing luminous decay of III group nitride light-emitting diode
CN102299218A (en) * 2011-08-24 2011-12-28 上海蓝光科技有限公司 Light emitting diode and manufacturing method thereof
CN103560190A (en) * 2013-11-15 2014-02-05 湘能华磊光电股份有限公司 Epitaxial growth method and structure for preventing electronic leakage and defect extension
CN103730431A (en) * 2014-01-07 2014-04-16 宝钢金属有限公司 High-power array light-emitting diode (LED) chip surface radiating structure and manufacturing method
CN105140360A (en) * 2015-09-01 2015-12-09 天津三安光电有限公司 Nitride light-emitting diode and preparation method therefor
CN105428474A (en) * 2015-12-10 2016-03-23 厦门乾照光电股份有限公司 Simple manufacturing method of high-efficient light emitting diode chip
CN105870274A (en) * 2016-04-22 2016-08-17 河北工业大学 Light emitting diode epitaxial structure capable of shielding quantum well region polarized field effect

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101740693A (en) * 2009-12-25 2010-06-16 武汉华灿光电有限公司 Method for reducing luminous decay of III group nitride light-emitting diode
CN102299218A (en) * 2011-08-24 2011-12-28 上海蓝光科技有限公司 Light emitting diode and manufacturing method thereof
CN103560190A (en) * 2013-11-15 2014-02-05 湘能华磊光电股份有限公司 Epitaxial growth method and structure for preventing electronic leakage and defect extension
CN103730431A (en) * 2014-01-07 2014-04-16 宝钢金属有限公司 High-power array light-emitting diode (LED) chip surface radiating structure and manufacturing method
CN105140360A (en) * 2015-09-01 2015-12-09 天津三安光电有限公司 Nitride light-emitting diode and preparation method therefor
CN105428474A (en) * 2015-12-10 2016-03-23 厦门乾照光电股份有限公司 Simple manufacturing method of high-efficient light emitting diode chip
CN105870274A (en) * 2016-04-22 2016-08-17 河北工业大学 Light emitting diode epitaxial structure capable of shielding quantum well region polarized field effect

Also Published As

Publication number Publication date
CN109524521A (en) 2019-03-26

Similar Documents

Publication Publication Date Title
CN101359710B (en) Manufacturing method of green light LED
CN108091740B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN109216519B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN109119515B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN110718612B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN108461592B (en) A kind of LED epitaxial slice and its manufacturing method
CN107195739B (en) Light emitting diode and manufacturing method thereof
CN102881788A (en) Epitaxial growth method for improving GaN-based light-emitting diode (LED) quantum well structure to improve carrier recombination efficiency
CN109192825B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN109545924B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN108831974B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN109671814A (en) A kind of LED epitaxial slice and its manufacturing method
CN112951963B (en) Light-emitting diode epitaxial wafer and preparation method thereof
CN113690350B (en) Micro light-emitting diode epitaxial wafer and manufacturing method thereof
CN104576852A (en) Stress regulation method for luminous quantum wells of GaN-based LED epitaxial structure
CN111063772A (en) High-luminous-efficiency ultraviolet LED epitaxial structure
CN109449264B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN104576853B (en) It is a kind of to improve the epitaxy method of GaN base LED chip current expansion
CN108550676B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN110911529B (en) Growth method of epitaxial structure of light-emitting diode
CN108281519B (en) light emitting diode epitaxial wafer and manufacturing method thereof
CN112366256A (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN109473520B (en) Light emitting diode epitaxial wafer and manufacturing method thereof
CN116722083A (en) Preparation method of high-radiation light-emitting diode and light-emitting diode
CN114447170B (en) LED epitaxial wafer for improving light emitting uniformity and preparation method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant
IP01 Partial invalidation of patent right

Commission number: 4W112464

Conclusion of examination: Declare partial invalidity of invention patent right No. 201811133968.6, and maintain the validity of this patent right on the basis of claims 1-8 submitted by the patentee on August 20, 2021

Decision date of declaring invalidation: 20220211

Decision number of declaring invalidation: 54093

Denomination of invention: A light-emitting diode epitaxial wafer and its manufacturing method

Granted publication date: 20200414

Patentee: HC SEMITEK (ZHEJIANG) Co.,Ltd.

IP01 Partial invalidation of patent right