CN109285787B - 半导体装置的制造方法 - Google Patents
半导体装置的制造方法 Download PDFInfo
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Abstract
本发明涉及半导体装置的制造方法,关于该半导体装置,金属板在树脂封装体的两面露出,提供气泡不易残留于封装体内的制造方法。本说明书公开的制造方法具备准备工序、设置工序、成型工序、去除工序。在准备工序中,准备半导体元件和金属板的组件。在设置工序中,将组件设置于用于使树脂封装体成型的模具的腔体。使一个金属板与腔体的底表面接触而在另一个金属板的上方设置空间地设置组件。在成型工序中,以覆盖金属板的方式将熔融树脂注入到腔体,在腔体的上部残留空间的一部分地停止熔融树脂的注入,并使树脂硬化。在去除工序中,去除覆盖金属板的树脂部分。
Description
技术领域
本说明书公开的技术公开一种半导体装置的制造方法,关于该半导体装置,一对金属板夹持半导体元件,半导体元件由树脂封装体密封,并且金属板在树脂封装体的两面露出。金属板作为使半导体元件的热散热的散热板发挥功能。
背景技术
上述半导体装置利用以下工序来制造。首先,准备半导体元件和一对金属板的组件。接下来,将该组件设置于用于使树脂封装体成型的模具的腔体。当使一个金属板抵接于腔体的底表面而使另一个金属板抵接于腔体的上表面并将树脂注入到腔体时,被腔体的底表面和上表面夹持的组件发生热膨胀,被金属板夹持的半导体元件被压迫而有可能会遭受损坏。因此,组件被设置成如下状态:使一个金属板抵接于腔体的底表面并在另一个金属板之上确保有空间。将熔融树脂填充到腔体。在腔体内在上侧的金属板的上方的空间也充满熔融树脂。上侧的金属板向上发生膨胀,半导体元件不被压迫。
从模具取出固化后的树脂(树脂封装体)。与腔体的底表面接触的金属板从树脂封装体露出,但另一个金属板被树脂覆盖。因而,切削树脂封装体的表面而使另一个金属板露出。例如,在专利文献1、2中公开有这样的制造方法。
现有技术文献
专利文献
专利文献1:日本特开2007-73583号公报
专利文献2:日本特开2009-302281号公报
发明内容
当整个腔体充满树脂时,熔融树脂内的气泡难以脱出,有时在树脂封装体之中残留有气泡。本说明书涉及半导体元件被树脂封装体密封的半导体装置的制造方法,提供与以往相比气泡不易残留在树脂封装体之中的制造方法。
本说明书公开的制造方法具备准备工序、设置工序、成型工序、去除工序。在准备工序中,准备一对金属板被接合于半导体元件的组件。在设置工序中,将组件设置于用于使树脂封装体成型的模具的腔体。在设置工序中,使一个金属板与腔体的底表面接触并在另一个金属板的上方设置空间,将组件设置于腔体。在成型工序中,以覆盖上侧的金属板的方式将熔融树脂注入到腔体,在腔体的上部残留空间的一部分地停止熔融树脂的注入,并使树脂硬化。在去除工序中,去除覆盖金属板的树脂。
当整个腔体充满树脂时,熔融树脂内的气泡难以脱出被认为是因为在腔体内熔融树脂难以移动而气泡到达不了排气孔(通气孔)的缘故。在整个腔体充满树脂的情况下,特别在最后填充树脂的区域,树脂的流动紊乱,容易残留气泡。在本说明书公开的制造方法中,在腔体内在熔融树脂的上方留有空间地停止树脂的注入。因此,不会产生当腔体充满树脂的情况下的“填充末期的树脂的流动紊乱”,不易残留气泡。进而,因为树脂的上表面与空间相接,所以熔融树脂易于移动。其结果,熔融树脂内的气泡也易于移动,气泡从设置于腔体的排气孔脱出。
腔体在其上表面的与金属板对置的范围形成有凹陷即可。而且,在成型工序中,残留腔体的凹陷的内部空间的一部分地停止熔融树脂的注入。换言之,在熔融树脂进入至凹陷的中途的状态下停止熔融树脂的注入。在凹陷的周围,熔融树脂的高度变低。当注入熔融树脂时,熔融树脂从凹陷的周围流向凹陷,气泡易于集中到凹陷之中。其结果,气泡不易残留于树脂内。另外,残留于覆盖金属板的树脂部分的气泡之后与树脂一起被除掉,不残留于树脂封装体。此外,在熔融树脂固化时,覆盖金属板的树脂的表面未与模具相接,所以平面度有可能会变低。但是,覆盖金属板的树脂之后被去除,所以平面度不会成为问题。
本说明书公开的制造方法也可以进一步具备以下特征。即,组件包括两组夹持有半导体元件的一对金属板。一组的下侧的金属板和另一组的上侧的金属板具备从边缘延伸的接头部。在从金属板的法线方向观察时,两方的接头部重叠,并且两方的接头部经由焊料接合。在腔体内,上侧的接头部与腔体的上表面相接。包含两方的接头部和焊料的金属部分在腔体内被腔体的底表面和上表面夹持。因此,组件在模具内牢固地被支承,不会在树脂注入时移动。
本说明书公开的技术的详细内容和进一步的改良利用以下的“具体实施方式”来说明。
附图说明
图1是实施例的半导体装置2的立体图。
图2是半导体装置2的电路图。
图3是沿着图1的III-III线的剖面图。
图4是引线框42的立体图。
图5是包括半导体元件和金属板的组件10的立体图。
图6是组件10和模具50的剖面图(树脂注入前)。
图7是组件10和模具50的剖面图(树脂注入后)。
图8是树脂去除前的半导体装置2的立体图。
图9是说明树脂去除工序的图。
图10是说明第1变形例的制造方法的剖面图。
图11是第1变形例的制造方法的树脂去除前的半导体装置的立体图。
图12是说明第2变形例的制造方法的剖面图。
附图标记说明
2:半导体装置;3、5:晶体管元件(半导体元件);4、6:二极管元件(半导体元件);7a-7d:隔件;8a-8h:焊料层;9:封装体;10、10a:组件;12、15、22、25:金属板;16、23、116、123:接头部;42:引线框;50:模具;51:下模;52:上模;53:浇口;54:连接管;55:树脂供给器;60:腔体;61:底表面;62:上表面;63、64:凹陷;70:切削工具。
具体实施方式
参照附图,说明实施例的半导体装置2。图1示出半导体装置2的立体图。半导体装置2为4个半导体元件被树脂制的封装体9密封的器件。图2示出封装体9的内部的电路图。半导体装置2的电路包括两个晶体管TH、TL和两个二极管DH、DL。两个晶体管TH、TL和两个二极管DH、DL都属于功率半导体元件,主要用于电力变换。半导体装置2典型而言被用在逆变器中,该逆变器在电动汽车、混合动力车、燃料电池车等中对行驶用马达供给电力。
两个晶体管TH、TL被串联地连接。二极管DH与晶体管TH反并联地连接,二极管DL与晶体管TL反并联地连接。为了便于说明,将串联连接的两端的端子中的一方称为HIGH端子,将另一方称为LOW端子。另外,将串联连接的中点称为OUT端子。图1的P端子14相当于HIGH端子,图1的N端子34相当于LOW端子,图1的O端子24相当于OUT端子。另外,晶体管TH的栅极端子GH相当于图1的控制端子81a中的1根控制端子。晶体管TL的栅极端子GL相当于图1的控制端子81b中的1根控制端子。控制端子81a、81b的剩余的端子为用于监视半导体元件的状态的信号端子等。
如图1所示,金属板15、25在封装体9的一个侧面9b露出。金属板15的一个面在封装体9的侧面9b露出,另一个面在封装体9的内部与后述的第1晶体管元件3以及第1二极管元件4导通。金属板25的一个面在封装体9的一个侧面9b露出,另一个面在封装体9的内部与后述的第2晶体管元件5以及第2二极管元件6导通。在图1中被隐藏而无法看到,但在封装体9的另一个侧面9a也露出有两张金属板12、22。金属板12、15是为了使第1晶体管元件3以及第1二极管元件4的热散热而配备的。金属板22、25是为了使第2晶体管元件5以及第2二极管元件6的热散热而配备的。接下来说明包括金属板12、22在内的封装体9之中的构造。
为了便于说明,将图中的坐标系的Z轴正方向称为“上”,将Z轴负方向称为“下”。有时在以后的图中也使用“上”、“下”这样的表达。
图3是沿着图1的III-III线而截断半导体装置2而得的剖面图。第1晶体管元件3被一对金属板12、15夹持。虽然未在图3的剖面示出,但第1二极管元件4也被一对金属板12、15夹持。第1晶体管元件3为平板型,在两面分别配置有电极。在第1晶体管元件3的下表面配置有集电极电极3a,在上表面配置有发射极电极3b。另外,在第1晶体管元件3的上表面配置有栅极电极和其它信号电极。
第1晶体管元件3的集电极电极3a利用焊料层8a接合于金属板12。第1晶体管元件3的发射极电极3b利用焊料层8b接合于隔件7a的下表面。隔件7a是用铜制作出的,具有导电性。隔件7a的上表面利用焊料层8c接合于金属板15。虽然未在图1中示出,但如先前所述,第1二极管元件4也被夹持于一对金属板12、15之间。第1二极管元件4的阴极电极连接于金属板12,阳极电极连接于金属板15。在一对金属板12、15之间,第1晶体管元件3与第1二极管元件4反并联地连接。
在第2晶体管元件5的下表面配置有集电极电极5a,在上表面配置有发射极电极5b。另外,在第2晶体管元件5的上表面配置有栅极电极和其它信号电极。第2晶体管元件5的集电极电极5a利用焊料层8d接合于金属板22。第2晶体管元件5的发射极电极5b利用焊料层8e接合于隔件7b的下表面。隔件7b的上表面利用焊料层8f接合于金属板25。虽然未在图1中示出,但如先前所述,第2二极管元件6也夹持于一对金属板22、25之间。第2二极管元件6的阴极电极连接于金属板22,阳极电极连接于金属板25。在一对金属板22、25之间,第2晶体管元件5与第2二极管元件6反并联地连接。
接头部16从金属板15的边缘延伸,接头部23从金属板22的边缘延伸。接头部16与接头部23在封装体9之中利用焊料层8g被接合。接头部16与接头部23被接合,从而金属板15和金属板22导通。即,第1晶体管元件3与第2晶体管元件5串联地连接。第1晶体管元件3对应于图2的晶体管TH,第1二极管元件4相当于图2的二极管DH。第2晶体管元件5对应于图2的晶体管TL,第2二极管元件6相当于图2的二极管DL。金属板12对应于图2的HIGH端子,金属板25相当于图2的LOW端子,金属板15、22相当于图2的OUT端子。金属板12与图1的P端子14连续,金属板22与图1的O端子24连续,这将在后面叙述。金属板25与图1的N端子34接合。
半导体装置2包括两组一对金属板(金属板12、15、以及金属板22、25)。如先前所述,金属板15、25在封装体9的一个侧面9b露出,金属板12、22在另一个侧面9a露出。在对置的一对金属板12、15(一对金属板22、25)之间夹持有半导体元件3、4(半导体元件5、6)。在一对金属板12、15(一对金属板22、25)之间,半导体元件3、4(半导体元件5、6)被密封于封装体9。接下来,参照图4至图10,说明半导体装置2的制造方法。
(准备工序)在该工序中,准备夹持有半导体元件的一对金属板。图4是金属板12、22的立体图,该金属板12、22接合有第1晶体管元件3、第1二极管元件4、第2晶体管元件5、第2二极管元件6。金属板12、22、P端子14、O端子24、N端子34、控制端子81a、81b最初为连续的金属板。将该金属板称为引线框42。通过用冲压机器对1张金属板进行加工,能够得到引线框42。引线框42的浇道部(runner portions)42a、42b为之后被切除的部分。
准备引线框42,在金属板12之上接合有第1晶体管元件3和第1二极管元件4。如先前所述,第1晶体管元件3的下表面的集电极电极3a与金属板12接合。第1二极管元件4的下表面的阴极电极与金属板12接合。隔件7a接合于第1晶体管元件3的上表面(发射极电极3b),隔件7c接合于第1二极管元件4的上表面(阳极电极)。同样地,在金属板22之上接合有第2晶体管元件5与第2二极管元件6。第2晶体管元件5的下表面的集电极电极5a与金属板22接合。第2二极管元件6的下表面的阴极电极与金属板22接合。隔件7b接合于第2晶体管元件5的上表面(发射极电极5b),隔件7d接合于第2二极管元件6的上表面(阳极电极)。另外,多个控制端子81a分别利用键合线82a连接于第1晶体管元件3的上表面的信号电极(未图示)。多个控制端子81b分别利用键合线82b连接于第2晶体管元件5的上表面的信号电极(未图示)。
在隔件7a、7c之上接合有金属板15,在隔件7b、7d之上接合有金属板25(图5)。接头部23从金属板22的边缘延伸,接头部16从金属板15的边缘延伸。接头部16、23被配置成在从金属板22的法线方向(图中的Z方向)观察时重叠。如参照图3进行了说明那样,接头部16、23由焊料接合并导通。接头部26从金属板25的边缘延伸,接头部26与N端子34接合。这样,一对金属板12、15(金属板22、25)与晶体管元件3(晶体管元件5)接合的组件10完成。
(设置工序)接下来,将组件10设置于用于使封装体9成型的模具的腔体60。图6示出模具50和被设置于模具50的组件10的剖面图。图6中的剖面对应于图3中的剖面。模具50被配置成图中的坐标系的Z轴的正方向朝上。
模具50被分割为下模51和上模52。下模51被固定,上模52能够相对于下模51移动。此外,省略了关于上模52的移动机构的图示。模具50的内部空间相当于腔体60。在上模52与下模51的合模面设置有浇口53,该浇口53将熔融树脂引导到腔体60。树脂供给器55与浇口53由连接管54连结。
组件10被设置于模具50的腔体60。组件10被设置成金属板12、22与腔体60的底表面61相接。在腔体60的上表面62设置有两个凹陷63、64。凹陷63设置于与金属板15对置的范围。凹陷63的底表面63a比金属板15宽。换言之,在从金属板15的法线方向(Z方向)观察时,金属板15位于底表面63a的轮廓的内侧。凹陷64设置于与金属板25对置的范围。凹陷64的底表面64a比金属板25宽。换言之,在从金属板25的法线方向(Z方向)观察时,金属板25位于底表面64a的轮廓的内侧。此外,凹陷63、64设置于腔体60的上表面62,所以“凹陷的底表面”为比腔体60的上表面62更高的位置。
由于凹陷63而在金属板15的上方确保了空间65。由于凹陷64而在金属板25的上方确保了空间66。空间65、66也为腔体60的一部分。组件10以下侧的金属板12、22与腔体60的底表面61接触而在上侧的金属板15、25的上方确保空间65、66的方式被设置于腔体60。
(成型工序)熔融树脂从树脂供给器55供给到腔体60。向腔体60流入熔融树脂的浇口53被设置于比上侧的金属板15、25的高度低的位置。从浇口53供给的熔融树脂向腔体60的底表面61流入,该高度逐渐变高。熔融树脂如图6的箭头A所示流动而流入到凹陷63、64。腔体60的底表面61至上表面62的高度与腔体60的底表面61至上侧的金属板15、25的高度大致相等,凹陷63(凹陷64)的边缘与金属板15(金属板25)的边缘之间的流路窄。因此,熔融树脂从凹陷63、64的周围朝向中央汹涌地流入。
当高温的熔融树脂与金属板12、15、22、25相接时,金属板发生膨胀。由于在金属板15、25的上方确保有空间65、66,所以各金属板能够向上膨胀。被金属板12、15夹持的第1晶体管元件3和第1二极管元件4不会被压迫。被金属板22、25夹持的第2晶体管元件5和第2二极管元件6也不会被压迫。
图7示出将熔融树脂注入到腔体60之后的剖面图。树脂供给器55在熔融树脂覆盖金属板15、25、且在腔体60的上部残留有空间65a、66a的状态下停止熔融树脂的供给。此外,空间65a为树脂注入前的空间65的一部分,空间66a为树脂注入前的空间66的一部分。熔融树脂进入到凹陷63和凹陷64。在凹陷63的内部空间的上部残留空间65a,在凹陷64的内部空间的上部残留空间66a。进入到凹陷63的树脂部分91覆盖金属板15。进入到凹陷64的树脂部分92覆盖金属板25。
树脂供给器55在停止了熔融树脂的供给之后,将腔体60的内部的熔融树脂保持为恒定的压力。熔融树脂直接硬化,封装体9被成型。
(去除工序)从模具50取出密封了第1晶体管元件3、第1二极管元件4、第2晶体管元件5、第2二极管元件6的封装体9,去除覆盖金属板15、25的树脂部分91、92。图8是除掉树脂部分91、92之前的封装体9的立体图。金属板15被树脂部分91完全覆盖。金属板25被树脂部分92完全覆盖。
图9示意地表示除掉树脂部分91、92的工序。图9的剖面相当于图7中的封装体9的剖面。覆盖金属板15、25的树脂部分91、92由切削工具70切削、去除。通过切削,金属板15、25的表面与封装体9的侧面9b高精度地齐平。此外,下侧的金属板12、22与下模51相接,所以在封装体9的下表面,金属板12、22从封装体9露出。在保持金属板12、22与腔体60的底表面61相接的状态下使封装体9成型,所以封装体9的侧面9a与金属板12、22的表面齐平。
在去除了树脂部分91、92之后,按照图8的虚线CL去除引线框42的浇道部42a、42b。这样,图1所示的半导体装置2完成。
叙述在实施例中说明的制造方法的优点。在实施例的制造方法中,金属板15、25由树脂(树脂部分91、92)覆盖、且在该树脂(树脂部分91、92)之上使空间65a、66a残留地停止熔融树脂的注入。熔融树脂的上表面与空间相接,所以熔融树脂在腔体60之中具有高的流动性。熔融树脂有时包含气泡,但由于熔融树脂的流动性高,所以气泡移动而从排气孔(通气孔)排出。或者,气泡向树脂部分91、92的上方的空间65a、66a脱出。
在腔体60的上表面62在与金属板15(金属板25)对置的范围设置有凹陷63(凹陷64)。凹陷63(凹陷64)的边缘与金属板15(金属板25)的边缘之间窄,熔融树脂汹涌地在这些间隙流动。此时,熔融树脂之中的气泡被冲向凹陷63(凹陷64)。气泡与凹陷63、64之中的树脂部分91、92一起被去除,所以不会残留于封装体9。在上述制造方法中,气泡不易残留于封装体9。
在使封装体9成型时,在腔体60的上表面62设置凹陷63、64,使熔融树脂流入到其中,从而还能够得到减少之后去除的树脂的量这样的附加效果。有时为了提高传热性而将金属填料混合到树脂。金属填料磨耗切削工具70。通过减少要去除的树脂的量,能够使切削工具70的寿命延长。
(第1变形例)参照图10和图11,说明实施例的制造方法的第1变形例。图10对应于图7,图11对应于图8。熔融树脂具有流动性,但也具有粘性。如先前所述,将熔融树脂导向腔体60的浇口53设置于上模52与下模51的合模面。换言之,浇口53被设置于比上侧的金属板15、25低的位置。腔体60中的熔融树脂的高度逐渐变高,最后从其周围开始覆盖金属板15、25。在将熔融树脂注入到腔体60时,调整要注入的熔融树脂的量,以使在上侧的金属板15、25的中央残留露出部分15a、25a而树脂部分91、92覆盖该露出部分的周围。熔融树脂从金属板15、25的周围朝向金属板的中央流动,但如果熔融树脂的量少,则由于粘性而在到达金属板的中央之前,移动停止。覆盖上侧的金属板15的树脂部分91在中央形成孔91a,在该孔91a的内侧形成金属板15的露出部分15a。覆盖上侧的金属板25的树脂部分92在中央形成孔92a,在该孔92a的内侧形成金属板25的露出部分25a。
只要金属板15、25的边缘由树脂覆盖,就能够通过之后的切削使金属板15、25与封装体9齐平。通过以使上侧的金属板15、25的一部分露出的方式调整熔融树脂的量,能够进一步减少进行切削的树脂的量。
(第2变形例)参照图12,说明第2变形例。图12对应于图7。在第2变形例中,半导体元件和金属板的组件10a的形状与实施例的组件10不同。组件10a包括两组夹持有半导体元件的一对金属板(金属板12、15和金属板22、25)。一组的下侧的金属板22具备从其边缘延伸的接头部123,另一组的上侧的金属板15具备从边缘延伸的接头部116。在从金属板15的法线方向观察时,两个接头部116、123重叠。两个接头部116、123经由焊料层8h接合。接头部116的表面与金属板15的表面齐平,接头部123的表面与金属板22的表面齐平。因此,在腔体60内,上侧的接头部116与腔体60的上表面62相接。包含接头部116、123和焊料层8h的金属部分被腔体60的底表面61和上表面62夹持。因此,在腔体60的内部,组件10a牢固地被支承。在注入熔融树脂时,组件10a不会发生移动。此外,如从图8理解那样,组件10(组件10a)的P端子14、O端子24、N端子34、控制端子81a、81b被模具夹持。因此,即使接头部116、123不被腔体60的底表面61和上表面62夹持,组件10也被模具50牢固地支承。接头部116、123被腔体60的底表面61和上表面62夹持,从而组件10a更加牢固地被模具50支承。
叙述与在实施例中说明的技术有关的注意事项。实施例的半导体装置2在一个面具备两张金属板15、25。使封装体9成型的模具50在腔体60的上表面62设置有与金属板15、25分别对应的凹陷63、64。在腔体的上表面,既可以设置与多个金属板分别对置的多个凹陷,也可以设置与多个金属板对置的一个凹陷。
腔体60的底表面61至上表面62的高度最好与底表面61至上侧的金属板15、25的表面的高度大致相同。但是,上表面62也可以位于比金属板15、25靠上方的位置。
半导体装置2具备分别夹持半导体元件的两对的金属板。本说明书公开的技术也可以应用于仅具有夹持半导体元件的一对金属板的半导体装置的制造方法。
以上,详细地说明了本发明的具体例子,但这只是例示,并不限制权利要求书。在权利要求书所记载的技术中,包含对以上例示出的具体例子进行了各种变形、变更的例子。在本说明书或者附图中说明的技术要素单独地或者通过各种组合来发挥技术上的有用性,并不限定于在申请时权利要求所记载的组合。另外,在本说明书或者附图中例示出的技术能够同时达到多个目的,达到其中的一个目的本身就具有技术上的有用性。
Claims (3)
1.一种半导体装置的制造方法,在所述半导体装置中,一对金属板夹持半导体元件,所述半导体元件被树脂封装体密封,并且所述金属板在所述树脂封装体的两面露出,所述半导体装置的制造方法具备:
准备工序,准备所述一对金属板被接合于所述半导体元件的组件;
设置工序,是将所述组件设置于用于使所述树脂封装体成型的模具的腔体的工序,在该设置工序中,使一个所述金属板与所述腔体的底表面接触并在另一个所述金属板的上方设置空间来设置所述组件;
成型工序,以覆盖上侧的所述金属板的方式将熔融树脂注入到所述腔体,在所述腔体的上部残留所述空间的一部分地停止熔融树脂的注入,并使树脂硬化;以及
去除工序,去除覆盖所述金属板的树脂。
2.根据权利要求1所述的制造方法,其中,
在所述腔体的上表面的与所述金属板对置的范围形成有凹陷,
在所述成型工序中,残留所述凹陷的内部空间的一部分地停止所述熔融树脂的注入。
3.根据权利要求2所述的制造方法,其中,
所述组件包括两组夹持有所述半导体元件的一对所述金属板,
一组的下侧的所述金属板和另一组的上侧的所述金属板具备从边缘延伸的接头部,
在从所述金属板的法线方向观察所述组件时,双方的所述接头部重叠,并且双方的所述接头部经由焊料接合,
在所述腔体内,上侧的所述接头部与所述腔体的所述上表面相接。
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Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55127026A (en) * | 1979-03-24 | 1980-10-01 | Mitsubishi Electric Corp | Sealing unit for semiconductor device |
JPS55128835A (en) * | 1979-03-28 | 1980-10-06 | Hitachi Ltd | Molding method and mold used therefor |
US5367766A (en) * | 1990-08-01 | 1994-11-29 | Staktek Corporation | Ultra high density integrated circuit packages method |
CN1204144A (zh) * | 1997-06-27 | 1999-01-06 | 松下电子工业株式会社 | 树脂封装型半导体装置的制造方法 |
CN1815719A (zh) * | 2004-11-19 | 2006-08-09 | 株式会社电装 | 半导体器件及其制造方法和装置 |
JP2007073583A (ja) * | 2005-09-05 | 2007-03-22 | Denso Corp | 半導体装置の製造方法 |
CN103545265A (zh) * | 2012-07-13 | 2014-01-29 | 三菱电机株式会社 | 半导体装置及其制造方法 |
JP2016134591A (ja) * | 2015-01-22 | 2016-07-25 | 株式会社デンソー | 半導体装置の製造方法 |
CN106158839A (zh) * | 2015-05-11 | 2016-11-23 | 株式会社电装 | 半导体器件 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6541310B1 (en) * | 2000-07-24 | 2003-04-01 | Siliconware Precision Industries Co., Ltd. | Method of fabricating a thin and fine ball-grid array package with embedded heat spreader |
TW498516B (en) * | 2001-08-08 | 2002-08-11 | Siliconware Precision Industries Co Ltd | Manufacturing method for semiconductor package with heat sink |
TWI244707B (en) * | 2004-06-24 | 2005-12-01 | Siliconware Precision Industries Co Ltd | Method for fabricating semiconductor package |
TWI246757B (en) * | 2004-10-27 | 2006-01-01 | Siliconware Precision Industries Co Ltd | Semiconductor package with heat sink and fabrication method thereof |
TWI291752B (en) * | 2006-02-27 | 2007-12-21 | Siliconware Precision Industries Co Ltd | Semiconductor package with heat dissipating device and fabrication method thereof |
JP4935765B2 (ja) | 2008-06-13 | 2012-05-23 | 株式会社デンソー | 半導体装置の製造方法 |
KR102437774B1 (ko) * | 2015-11-17 | 2022-08-30 | 삼성전자주식회사 | 인쇄 회로 기판 |
KR102527409B1 (ko) * | 2016-12-19 | 2023-05-02 | 에스케이하이닉스 주식회사 | 칩들 사이에 열 전달 블록을 배치한 반도체 패키지 및 제조 방법 |
US10636765B2 (en) * | 2017-03-14 | 2020-04-28 | STATS ChipPAC Pte. Ltd. | System-in-package with double-sided molding |
-
2017
- 2017-07-19 JP JP2017140186A patent/JP6943051B2/ja active Active
-
2018
- 2018-07-17 US US16/037,694 patent/US10546760B2/en active Active
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Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55127026A (en) * | 1979-03-24 | 1980-10-01 | Mitsubishi Electric Corp | Sealing unit for semiconductor device |
JPS55128835A (en) * | 1979-03-28 | 1980-10-06 | Hitachi Ltd | Molding method and mold used therefor |
US5367766A (en) * | 1990-08-01 | 1994-11-29 | Staktek Corporation | Ultra high density integrated circuit packages method |
CN1204144A (zh) * | 1997-06-27 | 1999-01-06 | 松下电子工业株式会社 | 树脂封装型半导体装置的制造方法 |
CN1815719A (zh) * | 2004-11-19 | 2006-08-09 | 株式会社电装 | 半导体器件及其制造方法和装置 |
JP2007073583A (ja) * | 2005-09-05 | 2007-03-22 | Denso Corp | 半導体装置の製造方法 |
CN103545265A (zh) * | 2012-07-13 | 2014-01-29 | 三菱电机株式会社 | 半导体装置及其制造方法 |
JP2016134591A (ja) * | 2015-01-22 | 2016-07-25 | 株式会社デンソー | 半導体装置の製造方法 |
CN106158839A (zh) * | 2015-05-11 | 2016-11-23 | 株式会社电装 | 半导体器件 |
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