CN108933087B - 功率模块 - Google Patents
功率模块 Download PDFInfo
- Publication number
- CN108933087B CN108933087B CN201810516157.8A CN201810516157A CN108933087B CN 108933087 B CN108933087 B CN 108933087B CN 201810516157 A CN201810516157 A CN 201810516157A CN 108933087 B CN108933087 B CN 108933087B
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- chip component
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- power module
- chip
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- 229910000679 solder Inorganic materials 0.000 claims abstract description 61
- 125000006850 spacer group Chemical group 0.000 claims abstract description 56
- 239000004065 semiconductor Substances 0.000 claims abstract description 35
- 239000000463 material Substances 0.000 claims description 19
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 239000003990 capacitor Substances 0.000 description 8
- 230000008646 thermal stress Effects 0.000 description 8
- 230000035882 stress Effects 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 229910010293 ceramic material Inorganic materials 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 230000008569 process Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
- 230000001070 adhesive effect Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000002040 relaxant effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Abstract
本发明提供功率模块,其能够缓和向配置于配线图案之上的芯片部件的应力,扩大使用温度范围。该功率模块具备:电力用半导体装置;以及芯片部件,其是在与电力用半导体装置电连接的第1及第2电路图案之上,横跨该第1及第2电路图案而配置的,芯片部件配置为第1及第2电极分别位于第1及第2电路图案之上,第1、第2电极与第1、第2电路图案分别通过焊料层而接合,在芯片部件的下表面与第1、第2电路图案之间,分别在靠近第1及第2电极的位置彼此平行地设置2个间隔件,焊料层没有设置于平行的所述2个间隔件的内侧。
Description
技术领域
本发明涉及功率模块,特别涉及能够扩大使用温度范围的功率模块。
背景技术
在包含电力用半导体装置的功率模块安装的芯片部件暴露于由电力用半导体装置的发热导致的变化及环境温度的变化。由于电容器、电阻、二极管及热敏电阻等芯片部件中的例如电容器等由陶瓷构成,但功率模块内的配线图案为金属,因此部件之间的线性膨胀系数差异大。在现有的安装方法中,由于不控制芯片部件和配线图案之间的焊料厚度,因此焊料的厚度非常薄。因此,为了使功率模块的使用温度范围扩大,需要使用针对热应力的耐受力强但成本高的具有特殊的电极构造的芯片部件。
另外,在将芯片部件靠近地进行安装的情况下,在现有的安装方法中,需要使芯片部件间隔扩大或在芯片部件之间用阻隔(resist)材料设置壁部,以使相邻的芯片部件彼此的焊料不会接合。
另一方面,在例如专利文献1中公开了如下结构,即,通过在芯片部件的正下方设置间隔件部件,将芯片部件抬高,从而确保芯片部件和配线基板的距离。
专利文献1:日本特开2012-28513号公报
在专利文献1的结构中,成为间隔件埋于焊料中的构造,由于将间隔件放入焊料内部,因此需要扩大焊料区域。因此,焊料和芯片部件的接合面积变大,焊料和芯片部件过于牢固地接合,向芯片部件的应力变大。
想到如下情况:如果进行功率模块的使用温度范围的扩大,则由部件之间的线性膨胀系数差异导致的翘曲变大,向芯片部件的弯曲应力也变大。因此,需要使焊料和芯片部件的接合面积减小,但在专利文献1的结构中,存在构造上的极限。
发明内容
本发明就是为了解决上述问题而提出的,其目的在于提供一种功率模块,该功率模块能够缓和向配置于配线图案之上的芯片部件的应力,扩大使用温度范围。
本发明涉及的功率模块具备:电力用半导体装置;以及芯片部件,其是在与所述电力用半导体装置电连接的第1及第2电路图案之上,横跨该第1及第2电路图案而配置的,所述芯片部件配置为第1及第2电极分别位于所述第1及第2电路图案之上,所述第1、第2电极与所述第1、第2电路图案分别通过焊料层而接合,在所述芯片部件的下表面与所述第1、第2电路图案之间,分别在靠近所述第1及第2电极的位置彼此平行地设置2个间隔件,所述焊料层没有设置于平行的所述2个间隔件的内侧。
发明的效果
根据本发明涉及的功率模块,能够缓和向配置于配线图案之上的芯片部件的应力,扩大使用温度范围。
附图说明
图1是表示本发明涉及的实施方式的功率模块的结构的俯视图。
图2是表示本发明涉及的实施方式的功率模块的结构的剖视图。
图3是表示间隔件的变形例的剖视图。
图4是表示间隔件的变形例的剖视图。
图5是表示间隔件的变形例的剖视图。
图6是表示安装有多个芯片部件的结构的俯视图。
图7是表示安装有多个芯片部件的结构的剖视图。
图8是表示将多个芯片部件串联电连接后的结构的俯视图。
图9是表示将芯片部件与电力用半导体装置并联连接的结构的图。
标号的说明
10芯片部件,11电极,12焊料层,13间隔件,CT1、CT2电路图案,20电力用半导体装置。
具体实施方式
[实施方式]
图1是表示本发明涉及的实施方式的功率模块100的结构的俯视图。如图1所示,功率模块100具备:电力用半导体装置20;以及芯片部件10,其是在与电力用半导体装置20的主电极电连接的电路图案CT1及CT2之上,横跨该电路图案CT1及CT2而配置的。
电力用半导体装置20的上表面侧的主电极经由多个导线WR1通过导线键合而与电路图案CT2电连接,电力用半导体装置20的下表面侧的主电极与电路图案CT1经由焊料(未图示)电连接。另外,在电力用半导体装置20的上表面侧设置控制电极(未图示),该控制电极经由导线WR2通过导线键合而与未图示的控制电路等连接。此外,电路图案CT1及CT2配置于绝缘基板之上,但省略绝缘基板的图示。
通过利用焊料层12将在芯片部件10的两端面分别设置的电极11与电路图案CT1、CT2接合,从而使芯片部件10与电路图案CT1、CT2电连接。另外,在芯片部件10的下表面侧,以与芯片部件10的电极11平行的方式,分别在靠近2个电极11的位置彼此平行地设置有间隔件13。
在从上方观察的情况下,2根间隔件13设置为从芯片部件10的侧面露出到外侧,在芯片部件10的外侧,通过导线键合而在键合焊盘BD部分与电路图案CT1及CT2接合。
在图2表示出图1中的芯片部件10的A-A线的剖面结构。如图2所示,电路图案CT1及CT2配置于绝缘基板1之上,在芯片部件10的下表面与电路图案CT1、CT2之间设置有剖面形状为圆形的间隔件13。焊料层12设置为将芯片部件10的电极11的表面与电路图案CT1、CT2的上表面之间接合,在间隔件13的内侧(电极11的相反侧)不存在焊料层12。
这是因为,通过设置间隔件13,从而隔出了芯片部件10与电路图案CT1、CT2的间隔,因此在焊料材料熔融时由于表面张力而使焊料材料停留于电极11之下,焊料材料没有侵入至间隔件13的内侧。因此,焊料层12的配置区域受限,能够使焊料层12和芯片部件10的焊料接合面积比现有的小,能够防止焊料层12和芯片部件10过于牢固地接合,降低向芯片部件10的热应力。
此外,通过将间隔件13的剖面形状设为圆形,能够防止应力局部地集中于芯片部件10。
另外,由于通过设置间隔件13能够控制焊料层12的厚度,因此与没有控制焊料的厚度的现有技术相比,能够减轻向芯片部件10的热应力。此外,在使用铝(Al)导线作为间隔件13的情况下,其高度为20~500μm。这相当于通常使用的Al导线的直径。
另外,通过将间隔件13设定为从芯片部件10的侧面露出到外侧的长度,能够抑制由安装芯片部件10时的偏移导致的从间隔件13的脱落。
此外,通过使用导线作为间隔件13,从而能够利用导线的直径控制焊料层12的厚度,因此能够根据焊料材料的特性将芯片部件10的组装条件最优化。
另外,通过使用导线作为间隔件13,从而如图1所示,能够通过导线键合而与电路图案CT1及CT2接合,能够使用电力用半导体装置20的键合装置进行间隔件13的固定作业,因此能够抑制制造成本的增加。
使用Al导线作为间隔件13的情况下的功率模块100的组装顺序的概要如下。
在绝缘基板1之上的电路图案CT1及CT2的设置间隔件13的位置利用超声波键合将Al导线接合而将间隔件13固定。接着,将板状的焊料材料搭载于设置芯片部件10及电力用半导体装置20的位置,在其之上搭载芯片部件10及电力用半导体装置20。然后,通过回流焊工序将焊料材料熔融,通过焊料材料将芯片部件10、电力用半导体装置20与电路图案CT1、CT2接合。
此外,在焊料材料使用焊膏的情况下,优选在将焊料材料印刷于规定位置后,在设置间隔件13的位置利用超声波键合将Al导线接合。由此,能够避免由于Al导线而妨碍焊膏的印刷。
[变形例]
就以上说明的功率模块100而言,示出了使用Al导线作为间隔件13的例子,但并不限于此。例如,如图3所示,也可以使用剖面形状为三角形的间隔件131。另外,如图4所示,也可以使用剖面形状为四边形的间隔件132。另外,如图5所示,也可以使用剖面形状为椭圆形的间隔件133。
在该情况下,通过用与焊料材料之间的濡湿性比铜及金等低的Al等金属构成间隔件131、132及133,从而能够防止焊料材料蔓延至图案边缘,能够将焊料层12与电路图案CT1、CT2的焊料接合面积减小,能够防止焊料层12和芯片部件10过于牢固地接合,降低向芯片部件10的热应力。
另外,作为间隔件13、131、132及133的材质,并不限于Al,也可以使用与焊料材料之间的濡湿性比Al低的阻焊剂等树脂材料、陶瓷材料等材料。在使用阻焊剂等树脂材料的情况下,举出化学接合及由粘结剂实现的向电路图案的接合,在使用陶瓷材料的情况下,举出由钎焊实现的向电路图案的接合。另外,如果能够使焊料材料不流入至间隔件的内侧,则也可以预先将电路图案加工为局部凸出而作为间隔件。在该情况下,如间隔件131、132及133那样的剖面形状还存在容易加工的优点。
另外,就以上说明的功率模块100而言,如图1所示,示出了将电力用半导体装置20和芯片部件10搭载于共同的电路图案CT1及CT2之上的结构,但并不限于此。
[芯片部件的安装的其它例子]
就图1所示的功率模块100而言,示出了在电路图案CT1及CT2之上安装了1个芯片部件10的例子,但安装的芯片部件10并不限于1个,本发明在安装大于或等于2个的芯片部件10的情况下也有效。
图6是表示在电路图案CT1及CT2之上并联安装了2个芯片部件10的结构的俯视图。此外,在图6中为了方便起见仅表示出芯片部件10的队列。如图6所示,以横跨于电路图案CT1和CT2之上的方式将2个芯片部件10彼此平行地排列。
通过利用焊料层12将在2个芯片部件10各自的一个端面设置的电极11和电路图案CT1接合,利用焊料层12将在2个芯片部件10各自的另一个端面设置的电极11和电路图案CT2接合,从而在电路图案CT1及CT2之间将2个芯片部件10并联电连接。
在2个芯片部件10的下表面侧,分别在靠近一个及另一个电极11的位置设置有以与2个芯片部件10各自的一个电极11平行的方式延伸的间隔件130、以及以与2个芯片部件10各自的另一个电极11平行的方式延伸的间隔件130。
在从上方观察的情况下,2根间隔件130设置为从2个芯片部件10的队列的外侧侧面露出到外侧的长度,在芯片部件10的队列的外侧,通过导线键合而在键合焊盘BD部分与电路图案CT1及CT2接合。
在图7表示出图6中的芯片部件10的B-B线的剖面结构。如图7所示,芯片部件10的下表面与间隔件130的上表面接触,通过在2个芯片部件10的队列的两个外侧的键合焊盘BD部分与电路图案CT1及CT2接合而被固定。
如上所述,通过不在芯片部件之间设置键合焊盘,从而能够使芯片部件10的配置间隔变窄,可以提高芯片部件10的安装密度。
即,在并联安装大于或等于2个芯片部件的情况下,由于在现有技术中在各芯片部件处使焊料层形成均匀的厚度,因此需要在芯片部件之间配置阻焊剂。因此,芯片部件的配置间隔由阻焊剂的厚度限定,不能够设为比阻焊剂的厚度小。但是,在本发明中,在芯片部件10之间不需要配置任何材料,能够提高芯片部件10的安装密度。
此外,在图6中示出了2个芯片部件10在电路图案CT1及CT2之间并联电连接的例子,但如果改变电路图案的俯视形状,则也可以串联电连接。
即,如图8所示,在电路图案CT1为2个独立的电路图案CT11及CT12的情况下,以横跨于电路图案CT11及CT12之上的方式配置间隔件130,在电路图案CT2之上配置间隔件130。由于电路图案CT11之上的电极11通过焊料层12与电路图案CT11接合,电路图案CT12之上的电极11通过焊料层12与电路图案CT12接合,因此2个芯片部件10可以串联电连接。
在该情况下,通过使间隔件130由树脂材料、陶瓷材料等绝缘材料形成,由此在与焊料层12接触的情况下2个芯片部件10也不会短路。
[向宽带隙半导体装置的应用]
使用了碳化硅(SiC)半导体、氮化镓(GaN)等带隙比硅(Si)半导体宽的宽带隙半导体的宽带隙半导体装置相比于使用了Si半导体的Si半导体装置,耐压性优异,容许电流密度也高,另外,耐热性也高,因此也可以进行高温动作。
图9公开了向作为电力用半导体装置的MOS晶体管20并联连接有作为芯片部件的电容器10的模块的结构,电容器10作为用于抑制浪涌电压的缓冲电容器发挥作用。此外,在RC缓冲电路中电阻元件与电容器串联连接,但为了简化而省略了图示。
如图1所示,如电容器10那样构成保护电路的芯片部件是与电力用半导体装置20靠近地配置的。如果使用宽带隙半导体装置作为电力用半导体装置,则可以进行高温动作,因此对芯片部件10的热应力比使用Si半导体装置的情况大。
但是,就本发明涉及的实施方式的功率模块100而言,通过在芯片部件10之下设置间隔件13,从而能够将焊料层12和芯片部件10的焊料接合面积减小,能够防止焊料层12和芯片部件10过于牢固地接合,降低向芯片部件10的热应力。另外,由于通过设置间隔件13能够将焊料层12的厚度增厚,因此能够减轻向芯片部件10的热应力。因此,在使用宽带隙半导体装置进行高温动作的情况下,也能够降低由热应力导致芯片部件10产生故障的情况。
此外,在以上说明中,作为芯片部件10采用了面安装的电容器作为例子,但只要是电阻、二极管及热敏电阻等以面安装为前提的芯片部件,就能够应用本发明。
此外,本发明可以在其发明的范围内将实施方式适当变形、省略。
Claims (6)
1.一种功率模块,其具备:
电力用半导体装置;以及
芯片部件,其是在与所述电力用半导体装置电连接的第1及第2电路图案之上,横跨该第1及第2电路图案而配置的,
所述芯片部件配置为第1及第2电极分别位于所述第1及第2电路图案之上,所述第1、第2电极与所述第1、第2电路图案分别通过焊料层而接合,
在所述芯片部件的下表面与所述第1、第2电路图案之间,分别在靠近所述第1及第2电极的位置彼此平行地设置2个间隔件,
所述2个间隔件设置为在俯视时从所述芯片部件的侧面露出到外侧,所述2个间隔件在露出的部分分别与所述第1及第2电路图案接合,
所述焊料层没有设置于平行的所述2个间隔件的内侧。
2.根据权利要求1所述的功率模块,其中,
所述芯片部件具有以分别横跨所述第1及第2电路图案的方式配置,并以彼此平行的方式排列的多个芯片部件,
所述2个间隔件分别具有搭载所述多个芯片部件的长度,并且设置为在俯视时从所述多个芯片部件的队列的侧面露出到外侧。
3.根据权利要求1或2所述的功率模块,其中,
所述2个间隔件由导线构成,通过导线键合而与所述第1及第2电路图案接合。
4.根据权利要求1所述的功率模块,其中,
所述2个间隔件的剖面形状为圆形。
5.根据权利要求1所述的功率模块,其中,
所述2个间隔件由与构成所述焊料层的焊料材料之间的濡湿性较低的金属构成。
6.根据权利要求1所述的功率模块,其中,
所述电力用半导体装置由宽带隙半导体装置构成。
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US10117335B1 (en) | 2018-10-30 |
DE102018201872B4 (de) | 2023-12-28 |
JP2018200918A (ja) | 2018-12-20 |
DE102018201872A1 (de) | 2018-11-29 |
JP6858642B2 (ja) | 2021-04-14 |
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