CN108875250B - Method for improving uniformity of electroplated soft gold, electronic equipment and storage medium - Google Patents
Method for improving uniformity of electroplated soft gold, electronic equipment and storage medium Download PDFInfo
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- CN108875250B CN108875250B CN201810710232.4A CN201810710232A CN108875250B CN 108875250 B CN108875250 B CN 108875250B CN 201810710232 A CN201810710232 A CN 201810710232A CN 108875250 B CN108875250 B CN 108875250B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F30/00—Computer-aided design [CAD]
- G06F30/30—Circuit design
- G06F30/39—Circuit design at the physical level
Abstract
The invention discloses a method for improving the uniformity of electroplated soft gold, which comprises the following steps: modifying an original conductive lead exposure file of the IC packaging substrate, and deleting a part of conductive leads originally set to be required to be exposed; and developing the dry film on the area corresponding to the deleted conductive lead so as to etch the copper on the deleted conductive lead, and reserving the dry film on the area corresponding to the undeleted conductive lead so as to not etch the copper corresponding to the undeleted conductive lead. According to the invention, the thickness of nickel at four corners of the IC packaging substrate is obviously optimized by modifying the conductive network, the range of the thickness of nickel is reduced to 5.2 μm from 8.3 μm before improvement, and the uniformity is obviously optimized; the whole process does not add extra flow, and the cost of the gold salt is reduced.
Description
Technical Field
The present invention relates to an integrated circuit, and more particularly, to a method for improving uniformity of electroplated soft gold, an electronic device, and a storage medium.
Background
At present, a package substrate is used as a medium for interconnecting a chip and a PCB signal, and because the I/O number of the package substrate is large, the package substrate is bonded with the chip in a wire bonding mode. The electroplated soft gold has more excellent wire bonding matching property compared with other surface treatment modes, particularly alloy wire and copper wire bonding. Therefore, the CSP, SIP, FMC and other types of products mostly adopt electroplated soft gold as a surface treatment mode. Because the package substrate has the characteristics of small size, fine finger pitch and the like, the uniformity of nickel and gold of the electroplated soft gold is inevitable to become a great obstacle for restricting the yield of finished products. The soft gold electroplating process comprises the following steps: pretreatment, nickel electroplating, flash plating of thin gold and gold electroplating, wherein the uniformity of the thickness of the nickel electroplating is difficult to control.
However, the conventional electroplating method has the following defects:
(1) The electroplated soft gold product has small plated area, fine finger pitch, dense image distribution, obvious edge effect of electroplated nickel, too thick thickness of nickel around the plated plate, optimization of electroplated soft gold uniformity in the industry, particularly optimization of electroplated nickel uniformity, is mainly divided by adjusting and increasing an accompanying plating area through a conventional baffle, but the plated area ratio of two surfaces of the product is too large, the nickel thickness uniformity of the product is difficult to meet, the uniformity improvement effect of the increased accompanying plating area is obvious, but too much gold salt consumption can be increased in the subsequent gold plating process, and the cost is greatly improved; when the area ratio of the A surface to the B surface of the product is more than 5, the traditional adjusting method is difficult to meet the requirement of 5-15 mu m of nickel thickness or other specs.
Disclosure of Invention
In order to overcome the disadvantages of the prior art, one of the objects of the present invention is to provide an improved method for plating soft gold uniformity, which can achieve an improvement in nickel thickness uniformity.
It is another object of the present invention to provide an electronic device that can achieve an improvement in the uniformity of the nickel thickness.
It is a further object of the present invention to provide a storage medium that can achieve improved uniformity of nickel thickness.
One of the purposes of the invention is realized by adopting the following technical scheme:
a method for improving uniformity of electroplated soft gold is applied to an IC packaging substrate and comprises the following steps:
and a lead wire modification step: modifying an original conductive lead exposure file of the IC packaging substrate, and deleting a part of conductive leads originally set to be required to be exposed;
a lead reducing step: and developing the dry film on the area corresponding to the deleted conductive lead so as to etch the copper on the deleted conductive lead, and reserving the dry film on the area corresponding to the undeleted conductive lead so as to not etch the copper corresponding to the undeleted conductive lead.
Further, "the part of the conductive leads originally set to be required to be exposed is deleted" specifically that the conductive leads occupying half of the total number of the conductive leads originally set to be required to be exposed are deleted.
Further, in the lead modification step, the original conductive lead exposure file corresponding to the nickel thick area is modified through CAM software.
Further, after the step of reducing the lead wires is executed, the method further comprises the following steps:
and (3) film stripping: removing all dry films of the IC packaging substrate;
resistance welding step: the IC package substrate was coated with green oil and exposed to light and developed.
The second purpose of the invention is realized by adopting the following technical scheme:
an electronic device comprising a memory, a processor, and a computer program stored on the memory and running on the processor, the processor implementing the following steps when executing the computer program:
and a lead wire modification step: modifying an original conductive lead exposure file of the IC packaging substrate, and deleting a part of conductive leads originally set to be required to be exposed;
a lead reducing step: and developing the dry film on the area corresponding to the deleted conductive lead so as to etch the copper on the deleted conductive lead, and reserving the dry film on the area corresponding to the undeleted conductive lead so as to not etch the copper corresponding to the undeleted conductive lead.
Further, in the lead modification step, "delete a part of the conductive leads originally set to be required to be exposed" is specifically to delete one half of the conductive leads originally set to be required to be exposed.
Further, in the lead modification step, the original conductive lead exposure file corresponding to the nickel thick area is modified through CAM software.
Further, after the step of reducing the lead wire is executed, the method further comprises the following steps:
a step of film stripping: removing all dry films of the IC packaging substrate;
and (3) resistance welding: the IC package substrate was coated with green oil and exposed to light and developed.
The third purpose of the invention is realized by adopting the following technical scheme:
a storage medium having stored thereon a computer program which, when executed by a processor, carries out the improvement method according to any one of the objects of the invention.
Compared with the prior art, the invention has the beneficial effects that:
(1) According to the invention, the thickness of nickel at four corners of the IC packaging substrate is obviously optimized by modifying the conductive network, the range of the thickness of nickel is reduced to 5.2 μm from 8.3 μm before improvement, and the uniformity is obviously optimized;
(2) The whole process does not add extra flow, and the cost of the gold salt is reduced.
Drawings
FIG. 1 is a flow chart of a method for improving the uniformity of electroplated soft gold according to the present invention.
Detailed Description
The present invention will be further described with reference to the accompanying drawings and the detailed description, and it should be noted that any combination of the embodiments or technical features described below can be used to form a new embodiment without conflict.
As shown in fig. 1, the present invention provides a method for improving uniformity of electroplated soft gold of an IC package substrate, which specifically comprises the following steps:
s1: modifying an original conductive lead exposure file of the IC packaging substrate, and deleting a part of conductive leads originally set to be required to be exposed;
in the step, the worker informs the CAM software of the nickel thick area, modifies the original exposure file of the conductive leads in the nickel thick area through the CAM software, and reduces the number of the conductive leads by deleting the circuits originally set to be exposed.
Specifically, the number of conductive leads which originally set to be one half of the total number of conductive leads to be exposed is deleted, for example, four plating leads which are originally supplied to the area at the same time are reduced to 2.
S2: and developing the dry film on the area corresponding to the deleted conductive lead so as to etch the copper on the deleted conductive lead, and reserving the dry film on the area corresponding to the undeleted conductive lead so as to not etch the copper corresponding to the undeleted conductive lead.
The step comprises developing and time, the unexposed dry film is developed, the exposed dry film is left, and the IC packaging substrate is normally developed in the developing process without any change. And then the copper which is not covered by the dry film is etched, the copper which is covered by the dry film is not etched, and in the etching process, the product is normally etched without any other changes.
S3: removing all dry films of the IC packaging substrate; the conductive leads eventually exhibit a reduced number of nickel thick regions after the dry film is removed.
S4: the IC package substrate was coated with green oil and exposed to light and developed.
The nickel thickness area reduces the current in the area because of the reduction of the number of the conductive leads, thereby reducing the nickel thickness and realizing the improvement of the uniformity of the nickel thickness.
In another aspect, the present invention further provides an electronic device, including a memory, a processor, and a computer program stored in the memory and running on the processor, wherein the processor executes the computer program to implement the following steps:
and a lead wire modification step: modifying an original conductive lead exposure file of the IC packaging substrate, and deleting a part of conductive leads originally set to be required to be exposed;
a lead reducing step: and developing the dry film on the area corresponding to the deleted conductive lead so as to etch the copper on the deleted conductive lead, and reserving the dry film on the area corresponding to the undeleted conductive lead so as to not etch the copper corresponding to the undeleted conductive lead.
In the lead modification step, "part of the conductive leads originally set to be required to be exposed is deleted" specifically to delete one half of the conductive leads originally set to be required to be exposed. In the lead modification step, the original conductive lead exposure file corresponding to the nickel thick area is modified through CAM software. After the step of reducing the lead wire is executed, the method also comprises the following steps:
and (3) film stripping: removing all dry films of the IC packaging substrate;
resistance welding step: the IC package substrate was coated with green oil and exposed to light and developed.
The invention also provides a computer storage medium on which a computer program is stored which, when being executed by a processor, carries out the improvement method according to the invention.
The above embodiments are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited thereby, and any insubstantial changes and substitutions made by those skilled in the art based on the present invention are within the protection scope of the present invention.
Claims (9)
1. A method for improving uniformity of electroplated soft gold is applied to an IC packaging substrate and is characterized by comprising the following steps:
and a lead wire modification step: modifying an original conductive lead exposure file of the IC packaging substrate, and deleting a part of conductive leads originally set to be required to be exposed;
a lead reducing step: and developing the dry film on the area corresponding to the deleted conductive lead so as to etch the copper on the deleted conductive lead, and reserving the dry film on the area corresponding to the undeleted conductive lead so as to not etch the copper corresponding to the undeleted conductive lead.
2. The improvement method according to claim 1, wherein in the lead modification step, "deleting a part of the conductive leads originally set to be exposed" is specifically deleting one-half of the total number of conductive leads originally set to be exposed.
3. The improvement method according to claim 1, wherein in the wire modification step, the original conductive wire exposure file corresponding to the nickel thick region is modified by CAM software.
4. The improvement method of claim 1, wherein after performing the lead reduction step, further comprising the steps of:
and (3) film stripping: removing all dry films of the IC packaging substrate;
resistance welding step: the IC package substrate was coated with green oil and exposed to light and developed.
5. An electronic device comprising a memory, a processor, and a computer program stored on the memory and running on the processor, wherein the processor implements the following steps when executing the computer program:
and a lead wire modification step: modifying an original conductive lead exposure file of the IC packaging substrate, and deleting a part of conductive leads originally set to be required to be exposed;
a lead reducing step: and developing the dry film on the area corresponding to the deleted conductive lead so as to etch the copper on the deleted conductive lead, and reserving the dry film on the area corresponding to the undeleted conductive lead so as to not etch the copper corresponding to the undeleted conductive lead.
6. The electronic device according to claim 5, wherein in the lead modification step, "the part of the conductive leads originally set to be exposed is deleted" is specifically the conductive leads that account for one-half of the total number of the conductive leads originally set to be exposed.
7. The electronic device according to claim 5, wherein in the wire modification step, an original conductive wire exposure file corresponding to the nickel thick region is modified by CAM software.
8. The electronic device of claim 5, further comprising, after performing the lead reduction step, the steps of:
a step of film stripping: removing all dry films of the IC packaging substrate;
resistance welding step: the IC package substrate was coated with green oil and exposed to light and developed.
9. A storage medium on which a computer program is stored, which computer program, when being executed by a processor, carries out the improvement method according to any one of claims 1-4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810710232.4A CN108875250B (en) | 2018-07-02 | 2018-07-02 | Method for improving uniformity of electroplated soft gold, electronic equipment and storage medium |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810710232.4A CN108875250B (en) | 2018-07-02 | 2018-07-02 | Method for improving uniformity of electroplated soft gold, electronic equipment and storage medium |
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| CN108875250A CN108875250A (en) | 2018-11-23 |
| CN108875250B true CN108875250B (en) | 2023-03-24 |
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Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1567552A (en) * | 2003-06-30 | 2005-01-19 | 美龙翔微电子科技（深圳）有限公司 | Method for handling electroplating lead layout of IC packaging base plate and electroplating lead structure |
| JP2005089820A (en) * | 2003-09-17 | 2005-04-07 | Sanyo Electric Co Ltd | Etching method, and method for manufacturing circuit device by using it |
| JP2005215989A (en) * | 2004-01-29 | 2005-08-11 | Sharp Corp | Design method for printed circuit board, plated lead evaluation program for realizing this design method, evaluation device with computer-readable recording medium recording this plated lead evaluation program, and printed circuit board designed by use of this design method, plated lead evaluation program or evaluation device |
| CN102421255A (en) * | 2011-08-08 | 2012-04-18 | 高德（无锡）电子有限公司 | Processing method of electroplated lead applied to LED printed circuit board |
| US8627243B1 (en) * | 2012-10-12 | 2014-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7853904B2 (en) * | 2002-06-07 | 2010-12-14 | Cadence Design Systems, Inc. | Method and system for handling process related variations for integrated circuits based upon reflections |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1567552A (en) * | 2003-06-30 | 2005-01-19 | 美龙翔微电子科技（深圳）有限公司 | Method for handling electroplating lead layout of IC packaging base plate and electroplating lead structure |
| JP2005089820A (en) * | 2003-09-17 | 2005-04-07 | Sanyo Electric Co Ltd | Etching method, and method for manufacturing circuit device by using it |
| JP2005215989A (en) * | 2004-01-29 | 2005-08-11 | Sharp Corp | Design method for printed circuit board, plated lead evaluation program for realizing this design method, evaluation device with computer-readable recording medium recording this plated lead evaluation program, and printed circuit board designed by use of this design method, plated lead evaluation program or evaluation device |
| CN102421255A (en) * | 2011-08-08 | 2012-04-18 | 高德（无锡）电子有限公司 | Processing method of electroplated lead applied to LED printed circuit board |
| US8627243B1 (en) * | 2012-10-12 | 2014-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing |
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| CN108875250A (en) | 2018-11-23 |
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