CN108470732B - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN108470732B
CN108470732B CN201810150243.1A CN201810150243A CN108470732B CN 108470732 B CN108470732 B CN 108470732B CN 201810150243 A CN201810150243 A CN 201810150243A CN 108470732 B CN108470732 B CN 108470732B
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sensing
diode
semiconductor substrate
anode
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CN108470732A (zh
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妹尾贤
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Denso Corp
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Denso Corp
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Abstract

本发明提供半导体装置，抑制感测二极管的恢复电流。半导体装置具有：半导体基板；上部主电极，配置在所述半导体基板的上部；感测阳极电极，配置在所述半导体基板的上部；电阻层，配置在所述半导体基板的上部且具有比所述感测阳极电极高的电阻率；及下部主电极，配置在所述半导体基板的下部。所述半导体基板具有开关元件和感测二极管。所述开关元件连接在所述上部主电极与所述下部主电极之间。所述感测二极管具有经由所述电阻层而与所述感测阳极电极连接的p型的第一阳极区和与所述下部主电极连接的n型的第一阴极区。

Description

半导体装置
技术领域
本说明书公开的技术涉及半导体装置。
背景技术
专利文献1公开了一种在共用的半导体基板上设有开关元件和保护二极管的半导体装置。保护二极管的阴极电极与开关元件的一方的端子连接。保护二极管的阳极电极与外部电路连接。保护二极管的阳极电极的电位根据开关元件的所述一方的端子的电位而变化。在专利文献1的技术中，根据保护二极管的阳极电极的电位来判定与开关元件并联连接的续流二极管是否处于接通。外部电路在续流二极管处于关断时允许开关元件的接通。
在先技术文献
专利文献
专利文献1：日本特开2016-149715号公报
发明内容
发明要解决的课题
当如专利文献1的保护二极管那样将二极管的阴极电极与开关元件的一方的端子连接时，二极管的阳极电极的电位根据该端子的电位而变化。这种二极管即使利用专利文献1的使用方法(即，续流二极管的接通的判定)以外的方法，也能够用于基于开关元件的端子的电位来判定开关元件的动作状态。以下，将这种二极管称为感测二极管。
在将感测二极管和开关元件设于单个半导体基板的情况下，可以在半导体基板的上表面设置上部主电极和感测阳极电极，在半导体基板的下表面设置下部主电极。感测二极管的p型的阳极层与感测阳极电极连接，感测二极管的n型的阴极层与下部主电极连接。开关元件连接在上部主电极与下部主电极之间。即，在下部主电极处，开关元件与感测二极管连接。即，下部主电极是开关元件的一方的端子，并且也是感测二极管的阴极电极。由于上部主电极和感测阳极电极都配置在半导体基板的上部，因此在上部主电极与感测阳极电极之间存在寄生电容。
图6示出该半导体装置的电路图。在图6中示出了开关元件100、感测二极管110、上部主电极120、下部主电极130、感测阳极电极140及寄生电容150。需要说明的是，在图6中，示出了IGBT作为开关元件100，但开关元件100也可以是MOSFET、双极型晶体管等其他开关元件。如图6所示，开关元件100连接在上部主电极120与下部主电极130之间。感测二极管110的阴极层与下部主电极130连接，感测二极管110的阳极层与感测阳极电极140连接。在感测阳极电极140与上部主电极120之间存在寄生电容150。
在图6的半导体装置中，当上部主电极120的电位比下部主电极130的电位高时，通过经由寄生电容150的电容耦合，感测阳极电极140的电位升高，向感测二极管110施加正向电压。因此，沿着正向在感测二极管110中流动电流。此时，从感测阳极电极140向半导体基板注入空穴。然后，当上部主电极120的电位下降至比下部主电极130的电位低的电位时，感测阳极电极140的电位下降，向感测二极管110施加的电压从正向电压切换成反向电压。于是，存在于半导体基板内的空穴朝向感测阳极电极140流动，在感测二极管110中流动反向电流。该反向电流通常被称为恢复电流。当在感测二极管110中流动高的恢复电流时，会向感测二极管110施加高的负荷。
因此，在本说明书中，提供一种抑制感测二极管的恢复电流的技术。
用于解决课题的方案
本说明书公开的半导体装置具有：半导体基板；上部主电极，配置在所述半导体基板的上部；感测阳极电极，配置在所述半导体基板的上部；电阻层，配置在所述半导体基板的上部，并且具有比所述感测阳极电极高的电阻率；及下部主电极，配置在所述半导体基板的下部。所述半导体基板具有开关元件和感测二极管。所述开关元件连接在所述上部主电极与所述下部主电极之间。所述感测二极管具有经由所述电阻层与所述感测阳极电极连接的p型的第一阳极区和与所述下部主电极连接的n型的第一阴极区。
在该半导体装置中，感测二极管的第一阳极区经由具有高电阻率的电阻层与上部主电极连接。因此，在向感测二极管施加了正向电压时，在感测二极管中流动的电流小。因此，在向感测二极管施加了正向电压时，从感测阳极电极向半导体基板注入的空穴少。当之后向感测二极管施加的电压切换为反向电压时，半导体基板中的空穴向感测阳极电极排出。因此，在感测二极管中流动恢复电流。由于在正向电压施加时从感测阳极电极向半导体基板注入的空穴少，因此在反向电压施加时从半导体基板向感测阳极电极排出的空穴也少。因此，在感测二极管中流动的恢复电流小。这样，根据该半导体装置，能够抑制感测二极管的恢复电流。
附图说明
图1是实施方式的半导体装置的俯视图。
图2是图1的II-II线处的半导体装置的剖视图。
图3是图1的III-III线处的半导体装置的剖视图。
图4是实施方式的半导体装置的电路图。
图5是变形例的半导体装置的与图2对应的剖视图。
图6是具有感测二极管110的半导体装置的电路图。
具体实施方式
图1～3所示的实施方式的半导体装置10具有半导体基板12。半导体基板12为硅制的基板。如图1所示，半导体基板12具有元件区18和感测区70。元件区18的面积远大于感测区70的面积。感测区70配置在与元件区18相邻的位置。在元件区18内设置有IGBT和续流二极管(将在后文详述)。而且，在感测区70内设置有感测二极管。需要说明的是，在以下的说明中，将半导体基板12的厚度方向称为z方向，将与半导体基板12的上表面平行的一个方向(与z方向正交的一个方向)称为x方向，将与z方向及x方向正交的方向称为y方向。
如图2所示，感测区70内的半导体基板12的上表面由层间绝缘膜36覆盖。在层间绝缘膜36的上部配置有感测阳极电极50、电阻层52及配线层54。
电阻层52由掺杂有杂质的多晶硅构成。电阻层52具有比感测阳极电极50及配线层54高的电阻率。电阻层52配置在层间绝缘膜36上。
感测阳极电极50由Al(铝)或AlSi(铝与硅的合金)构成。感测阳极电极50配置在电阻层52上。感测阳极电极50的上表面是焊盘(bonding pad)。感测阳极电极50覆盖电阻层52的中央部的上表面。因此，电阻层52的中央部位于感测阳极电极50(即，焊盘)的下部，而电阻层52的外周部配置在感测阳极电极50(即，焊盘)的外侧。即，电阻层52具有位于焊盘的下部的中央部和延伸至焊盘的外侧的外周部。
配线层54由Al或AlSi构成。配线层54配置在层间绝缘膜36上。如图1所示，配线层54以包围感测阳极电极50的方式呈环状延伸。在配线层54与感测阳极电极50之间设有间隔。如图2所示，配线层54的一部分配置在电阻层52的外周部的上部。在配线层54的下部的层间绝缘膜36设有接触孔37a、37b。配线层54在接触孔37a内与电阻层52相接。配线层54在接触孔37b内与半导体基板12的上表面相接。
由电阻层52和配线层54构成了将感测阳极电极50与半导体基板12(更详细而言是后述的阳极区60)连接的电流路径。如上所述，电阻层52的电阻率比感测阳极电极50的电阻率及配线层54的电阻率高。因此，在从焊盘到半导体基板12的电流路径上，电阻层52的电阻比感测阳极电极50的电阻及配线层54的电阻高。如图1所示，在感测阳极电极50的上表面(即，焊盘)上连接有金属线17的端部。虽然未图示，但金属线17的另一端与外部电路连接。
如图1～3所示，在元件区18的上部配置有上部主电极14。上部主电极14由Al或AlSi构成。上部主电极14在元件区18内与半导体基板12的上表面相接。上部主电极14从配线层54分离。
如图2、3所示，在半导体基板12的下表面配置有下部主电极16。下部主电极16与半导体基板12的下表面的大致整个区域相接。
如图2所示，在感测区70内配置有阳极区60、漂移区27、阴极区62及下部p型区64。
阳极区60是p型区。阳极区60配置在向半导体基板12的上表面露出的范围。阳极区60配置在配线层54的下部，沿着配线层54呈环状延伸。阳极区60与接触孔37b内的配线层54相接。阳极区60经由配线层54与电阻层52的外周部(即，未由感测阳极电极50覆盖的部分)连接。阳极区60经由配线层54及电阻层52与感测阳极电极50连接。阳极区60未配置在感测阳极电极50(即，焊盘)的下部。
漂移区27是n型区。漂移区27配置在阳极区60之下。而且，漂移区27在感测阳极电极50的下部分布至向半导体基板12的上表面露出的范围。电阻层52的电阻率比未产生电导调制现象时的漂移区27的电阻率高。
阴极区62是n型杂质浓度比漂移区27高的n型区。阴极区62在阳极区60的下部配置于漂移区27之下。阴极区62配置在向半导体基板12的下表面露出的范围。阴极区62与下部主电极16相接。
下部p型区64是p型区。下部p型区64在感测阳极电极50的下部配置于漂移区27之下。下部p型区64与下部主电极16相接。
在感测区70内通过阳极区60、漂移区27及阴极区62而设置有感测二极管。
如图3所示，元件区18具有设置有IGBT的IGBT范围20和设置有续流二极管的二极管范围40。IGBT范围20与二极管范围40彼此相邻。IGBT范围20与二极管范围40以在x方向上交替反复的方式配置在元件区18内。
在元件区18内的半导体基板12的上表面设有多个沟槽38。在半导体基板12的上表面上，多个沟槽38沿着y方向平行地延伸。在图3所示的截面中，各沟槽38从半导体基板12的上表面沿着z方向延伸。在IGBT范围20和二极管范围40分别设有多个沟槽38。各沟槽38的内表面由栅极绝缘膜32覆盖。在各沟槽38内配置有栅电极34。各栅电极34通过栅极绝缘膜32而从半导体基板12绝缘。各栅电极34的上表面由层间绝缘膜36覆盖。各栅电极34通过层间绝缘膜36而从上部主电极14绝缘。IGBT范围内的各栅电极34与未图示的栅极配线连接。二极管范围40内的各栅电极34可以与栅极配线连接，也可以是与上部主电极14等连接的虚设电极。
在由2个沟槽38夹着的各范围配置有发射区22和p型区24。在IGBT范围20内及二极管范围40内配置有发射区22和p型区24。发射区22是n型区。发射区22配置在向半导体基板12的上表面露出的范围。发射区22与上部主电极14相接。发射区22在沟槽38的上端部处与栅极绝缘膜32相接。p型区24具有高浓度区24a和低浓度区24b。高浓度区24a具有比低浓度区24b高的p型杂质浓度。高浓度区24a配置在向半导体基板12的上表面露出的范围。高浓度区24a与上部主电极14相接。低浓度区24b配置在高浓度区24a和发射区22之下。低浓度区24b在发射区22之下与栅极绝缘膜32相接。IGBT范围20内的p型区24作为IGBT的体区发挥功能。而且，二极管范围40内的p型区24作为续流二极管的阳极区发挥功能。需要说明的是，虽然在图3中在二极管范围40内配置有发射区22，但也可以在二极管范围40内不配置发射区22。
在IGBT范围20内及二极管范围40内的p型区24之下配置有漂移区27。即，漂移区27跨感测区70、IGBT范围20及二极管范围40而分布。漂移区27在p型区24之下与栅极绝缘膜32相接。漂移区27通过p型区24而从发射区22分离。
在IGBT范围20内的漂移区27之下配置有集电区30。集电区30是p型区。集电区30配置在向半导体基板12的下表面露出的范围。集电区30与下部主电极16相接。集电区30通过漂移区27而从p型区24分离。
在二极管范围40内的漂移区27之下配置有阴极区44。阴极区44是n型杂质浓度比漂移区27高的n型区。阴极区44配置在向半导体基板12的下表面露出的范围。阴极区44与下部主电极16相接。
在IGBT范围20内，由发射区22、p型区24(即，体区)、漂移区27、集电区30、栅电极34及栅绝缘膜32等构成了IGBT。在作为IGBT进行动作的情况下，上部主电极14作为发射极发挥功能，下部主电极16作为集电极发挥功能。
在二极管范围40内，由p型区24(即，阳极区)、漂移区27、阴极区44等构成了续流二极管。在作为续流二极管发挥功能的情况下，上部主电极14作为阳极电极发挥功能，下部主电极16作为阴极电极发挥功能。
图4示出半导体装置10的内部电路。在图4中，IGBT82表示设置在IGBT范围20内的IGBT，续流二极管84表示设置在二极管范围40内的续流二极管，感测二极管80表示设置在感测区70内的感测二极管。IGBT82的集电极与下部主电极16连接，IGBT82的发射极与上部主电极14连接。续流二极管84的阳极与上部主电极14连接，续流二极管84的阴极与下部主电极16连接。即，续流二极管84反向地并联连接于IGBT82。感测二极管80的阴极与下部主电极16连接。而且，感测二极管80的阳极与感测阳极电极50连接。感测阳极电极50经由金属线17(参照图1)等与外部电路90连接。外部电路90根据感测阳极电极50的电位来控制IGBT82的栅电极的电位。感测阳极电极50的电位根据下部主电极16的电位而变化。而且，下部主电极16的电位根据IGBT82及续流二极管84的动作状态等而变化。因此，外部电路90通过检测感测阳极电极50的电位，能够良好地控制IGBT82。而且，如图1、2所示，感测阳极电极50和配线层54配置在上部主电极14的附近。因此，在感测阳极电极50与上部主电极14之间存在比较大的寄生电容。在图4中，将该寄生电容表示为电容86。
上部主电极14与下部主电极16之间的电压根据IGBT82和续流二极管84的动作状态、连接于上部主电极14和下部主电极16的电路的动作状态而变化。当上部主电极14的电位上升为比下部主电极16的电位高的电位时，在续流二极管84中流动正向电流。而且，当上部主电极14的电位上升为比下部主电极16的电位高的电位时，通过经由寄生电容86的电容耦合，感测阳极电极50的电位上升，感测阳极电极50的电位变得比下部主电极16的电位高。因此，在感测二极管80中流动正向电流。此时，从阳极区60向漂移区27注入空穴。然后，当上部主电极14的电位下降至比下部主电极16的电位低的电位时，向续流二极管84施加的电压从正向电压切换为反向电压，在续流二极管84中流动恢复电流。而且，当上部主电极14的电位下降至比下部主电极16的电位低的电位时，通过经由寄生电容86的电容耦合，感测阳极电极50的电位下降，感测阳极电极50的电位变得比下部主电极16的电位低。因此，向感测二极管80施加的电压从正向电压切换为反向电压。因此，在感测二极管80中流动恢复电流。当高的恢复电流在感测二极管80中流动时，会向感测二极管80施加高的负荷。
相对于此，在本实施方式的半导体装置10中，感测阳极电极50经由具有高电阻率的电阻层52与阳极区60连接。因此，在施加了正向电压时，难以在感测二极管80中流动电流。即，感测二极管80的正向电压下降大。因此，当向感测二极管80施加正向电压时，从阳极区60向漂移区27注入的空穴少。然后，当向感测二极管80施加反向电压时，存在于漂移区27内的空穴向感测阳极电极50排出，由此在感测二极管80中流动恢复电流。由于在正向电压施加时向漂移区27注入的空穴少，因此在反向电压施加时从漂移区27排出的空穴也少。因此，在本实施方式的半导体装置10中，难以在感测二极管80中流动恢复电流。因此，向感测二极管80施加的负载减轻，感测二极管80的可靠性提高。
另外，在本实施方式的半导体装置10中，电阻层52的电阻率大于漂移区27的电阻率。因此，通过电阻层52能够有效地增大感测二极管80的正向电压下降。由此，能够更有效地抑制感测二极管80的恢复电流。
另外，在上述的实施方式中，在感测阳极电极50(即，焊盘)的下部未配置阳极区60。因此，引线键合时的冲击难以向阳极区60施加。由此，能够抑制在阳极区60产生缺陷等。因此，能够抑制感测二极管80的漏电流等。而且，在感测阳极电极50(即，焊盘)的下部配置有由多晶硅构成的电阻层52。通过这样在焊盘之下配置多晶硅层，能够在引线键合时通过多晶硅层来保护半导体基板12。由此，能够在引线键合时减轻对半导体基板12的损伤。
另外，在上述的实施方式的半导体装置10的制造工序中，可以以使电阻层52埋入层间绝缘膜36的方式形成电阻层52和层间绝缘膜36，接下来形成接触孔37a、37b等接触孔，然后形成感测阳极电极50、配线层54及上部主电极14。接触孔通过对层间绝缘膜36进行蚀刻而形成。此时，在存在电阻层52的部位，蚀刻因电阻层52而停止，在不存在电阻层52的部位，蚀刻因半导体基板12而停止。因此，能够同时形成与电阻层52相连的接触孔(例如，接触孔37a)和与半导体基板12相连的接触孔(例如，接触孔37b)。因此，之后能够同时形成感测阳极电极50、配线层54及上部主电极14。实施方式的半导体装置10能够以与以往的半导体装置相同程度的效率来制造。
需要说明的是，在上述的实施方式中，电阻层52经由配线层54与阳极区60连接。然而，也可以如图5所示，电阻层52与配线层54直接相接。在这种情况下，优选由多晶硅构成电阻层52。在图5所示的结构中，当由多晶硅构成电阻层52时，在反向电压施加时从阳极区60向电阻层52流入空穴。多晶硅中的载流子寿命短。因此，当空穴在电阻层52内流动时，大量空穴因再结合而消失。由此，能够进一步降低恢复电流。
另外，在上述的实施方式中，在元件区18内设置有IGBT，但也可以取代IGBT而在元件区18内设置MOSFET等其他开关元件。
另外，在上述的实施方式中，感测阳极电极50的整个上表面为焊盘，但也可以是感测阳极电极50的上表面的一部分为焊盘。
另外，在上述的实施方式中，配线层54包围感测阳极电极50的周围。然而，只要在感测阳极电极50与阳极区60之间的电流路径上存在电阻层52即可，感测阳极电极50、电阻层52及配线层54的配置可以适当变更。而且，如上所述，配线层54也可以不存在。
对上述的实施方式的构成要素与权利要求的构成要素的关系进行说明。实施方式的阳极区60是权利要求的第一阳极区的一例。实施方式的阴极区62是权利要求的第一阴极区的一例。实施方式的二极管范围40内的p型区24是权利要求的第二阳极区的一例。实施方式的阴极区44是权利要求的第二阴极区的一例。
以下列举本说明书公开的技术要素。需要说明的是，以下的各技术要素分别独立而有用。
在本说明书公开的一例的半导体装置中，感测阳极电极可以具有供金属线进行键合的焊盘。而且，电阻层可以具有在焊盘的下部与感测阳极电极连接的第一部分和从第一部分延伸至焊盘的外侧的第二部分。而且，第一阳极区可以未配置在焊盘的下部，且经由第二部分与感测阳极电极连接。
根据该结构，引线键合时的冲击难以向第一阳极区施加，能够抑制在第一阳极区产生缺陷。
在电阻层配置于焊盘的下部的结构中，电阻层可以由多晶硅构成。
通过将耐冲击的多晶硅配置在焊盘之下，能够抑制由引线键合时的冲击引起的不良情况。
本说明书公开的一例的半导体装置可以还具有配线层，该配线层配置在半导体基板的上部，具有比电阻层低的电阻率，且与第一阳极区相接。这种情况下，第一阳极区可以经由配线层与电阻层连接。
另外，在本说明书公开的另一例的半导体装置中，第一阳极区可以与电阻层相接。这种情况下，电阻层可以由多晶硅构成。
多晶硅中的载流子寿命短。在该结构中，在向感测二极管施加了反向电压时从半导体基板向感测阳极电极排出的空穴会通过由多晶硅构成的电阻层。因此，在电阻层中空穴容易因再结合而消失。因此，能够进一步抑制恢复电流。
另外，在本说明书公开的一例的结构中，半导体基板可以具有n型的漂移区，该漂移区配置在第一阳极区与第一阴极区之间，且n型杂质浓度比第一阴极区低。而且，电阻层的电阻率可以比漂移区的电阻率高。
根据该结构，能够进一步抑制感测二极管的恢复电流。
另外，在本说明书公开的一例的结构中，半导体基板可以还具有续流二极管。续流二极管可以具有与上部主电极连接的p型的第二阳极区和与下部主电极连接的n型的第二阴极区。
以上，虽然详细地说明了实施方式，但这些只不过是例示，不对权利要求书进行限定。权利要求书所记载的技术包括对以上例示的具体例进行了各种变形、变更后的技术。本说明书或附图中说明的技术要素以单独或各种组合的方式发挥技术有用性，不限定于申请时权利要求记载的组合。而且，本说明书或附图中例示的技术是同时实现多个目的的技术，实现其中一个目的本身就具有技术有用性。
标号说明
10：半导体装置
12：半导体基板
14：上部主电极
16：下部主电极
18：元件区
20：IGBT范围
40：二极管范围
50：感测阳极电极
52：电阻层
54：配线层
60：阳极区
62：阴极区
70：感测区
80：感测二极管
82：IGBT
84：续流二极管
86：寄生电容

Claims (5)

1.一种半导体装置，其中，具有：
半导体基板；
上部主电极，配置在所述半导体基板的上部；
感测阳极电极，配置在所述半导体基板的上部；
电阻层，配置在所述半导体基板的上部，具有比所述感测阳极电极高的电阻率；及
下部主电极，配置在所述半导体基板的下部，
所述半导体基板具有开关元件和感测二极管，
所述开关元件连接在所述上部主电极与所述下部主电极之间，
所述感测二极管具有经由所述电阻层与所述感测阳极电极连接的p型的第一阳极区和与所述下部主电极连接的n型的第一阴极区，
所述第一阳极区与所述电阻层相接，
所述电阻层由多晶硅构成。
2.根据权利要求1所述的半导体装置，
所述感测阳极电极具有供金属线进行键合的焊盘，
所述电阻层具有在所述焊盘的下部与所述感测阳极电极连接的第一部分和从所述第一部分延伸至所述焊盘的外侧的第二部分，
所述第一阳极区未配置在所述焊盘的下部，且所述第一阳极区经由所述第二部分与所述感测阳极电极连接。
3.根据权利要求2所述的半导体装置，
所述电阻层由多晶硅构成。
4.根据权利要求1～3中任一项所述的半导体装置，
所述半导体基板具有n型的漂移区，该漂移区配置在所述第一阳极区与所述第一阴极区之间，且n型杂质浓度比所述第一阴极区低，
所述电阻层的电阻率比所述漂移区的电阻率高。
5.根据权利要求1～3中任一项所述的半导体装置，
所述半导体基板还具有续流二极管，
所述续流二极管具有与所述上部主电极连接的p型的第二阳极区和与所述下部主电极连接的n型的第二阴极区。
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