CN108321213A - The preparation method and its structure of SiC power diode devices - Google Patents
The preparation method and its structure of SiC power diode devices Download PDFInfo
- Publication number
- CN108321213A CN108321213A CN201711397850.XA CN201711397850A CN108321213A CN 108321213 A CN108321213 A CN 108321213A CN 201711397850 A CN201711397850 A CN 201711397850A CN 108321213 A CN108321213 A CN 108321213A
- Authority
- CN
- China
- Prior art keywords
- layer
- sic
- epitaxial layer
- sic epitaxial
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 19
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 58
- 229910021389 graphene Inorganic materials 0.000 claims abstract description 52
- 239000000758 substrate Substances 0.000 claims abstract description 50
- 229910000906 Bronze Inorganic materials 0.000 claims abstract description 34
- 239000010974 bronze Substances 0.000 claims abstract description 34
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 claims abstract description 34
- 230000004888 barrier function Effects 0.000 claims abstract description 28
- 230000026267 regulation of growth Effects 0.000 claims abstract description 10
- 239000002184 metal Substances 0.000 claims description 86
- 229910052751 metal Inorganic materials 0.000 claims description 86
- 238000000034 method Methods 0.000 claims description 57
- 229910052681 coesite Inorganic materials 0.000 claims description 38
- 229910052906 cristobalite Inorganic materials 0.000 claims description 38
- 239000000377 silicon dioxide Substances 0.000 claims description 38
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 38
- 229910052682 stishovite Inorganic materials 0.000 claims description 38
- 229910052905 tridymite Inorganic materials 0.000 claims description 38
- 238000000137 annealing Methods 0.000 claims description 26
- 238000005229 chemical vapour deposition Methods 0.000 claims description 21
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 20
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 14
- 238000004026 adhesive bonding Methods 0.000 claims description 12
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 12
- 239000001301 oxygen Substances 0.000 claims description 12
- 229910052760 oxygen Inorganic materials 0.000 claims description 12
- 239000012298 atmosphere Substances 0.000 claims description 9
- 229920002120 photoresistant polymer Polymers 0.000 claims description 9
- 239000000126 substance Substances 0.000 claims description 9
- 229910052799 carbon Inorganic materials 0.000 claims description 8
- 238000004544 sputter deposition Methods 0.000 claims description 7
- 238000005566 electron beam evaporation Methods 0.000 claims description 6
- 238000001259 photo etching Methods 0.000 claims description 6
- 238000001039 wet etching Methods 0.000 claims description 6
- 239000012300 argon atmosphere Substances 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims description 2
- 238000004347 surface barrier Methods 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 13
- 230000000694 effects Effects 0.000 abstract description 7
- 238000005265 energy consumption Methods 0.000 abstract description 5
- 229910010271 silicon carbide Inorganic materials 0.000 description 184
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 184
- 238000002513 implantation Methods 0.000 description 30
- 150000002500 ions Chemical class 0.000 description 23
- 239000010949 copper Substances 0.000 description 20
- 125000006850 spacer group Chemical group 0.000 description 13
- 239000010931 gold Substances 0.000 description 11
- 239000002131 composite material Substances 0.000 description 10
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 9
- 238000004140 cleaning Methods 0.000 description 9
- 229910052802 copper Inorganic materials 0.000 description 9
- IJGRMHOSHXDMSA-UHFFFAOYSA-N nitrogen Substances N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 9
- CSCPPACGZOOCGX-UHFFFAOYSA-N Acetone Chemical compound CC(C)=O CSCPPACGZOOCGX-UHFFFAOYSA-N 0.000 description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 6
- ATUOYWHBWRKTHZ-UHFFFAOYSA-N Propane Chemical compound CCC ATUOYWHBWRKTHZ-UHFFFAOYSA-N 0.000 description 6
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 6
- 238000000151 deposition Methods 0.000 description 6
- 230000008021 deposition Effects 0.000 description 6
- 229910052757 nitrogen Inorganic materials 0.000 description 6
- 229910000077 silane Inorganic materials 0.000 description 6
- 239000000956 alloy Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 5
- 239000007789 gas Substances 0.000 description 5
- 238000002955 isolation Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 230000017525 heat dissipation Effects 0.000 description 4
- -1 Nitrogen ion Chemical class 0.000 description 3
- 229910052786 argon Inorganic materials 0.000 description 3
- 230000008901 benefit Effects 0.000 description 3
- 238000003763 carbonization Methods 0.000 description 3
- 239000012159 carrier gas Substances 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 238000001035 drying Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000003344 environmental pollutant Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000002347 injection Methods 0.000 description 3
- 239000007924 injection Substances 0.000 description 3
- 239000007788 liquid Substances 0.000 description 3
- 239000007769 metal material Substances 0.000 description 3
- 231100000719 pollutant Toxicity 0.000 description 3
- 239000001294 propane Substances 0.000 description 3
- 239000012495 reaction gas Substances 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000010301 surface-oxidation reaction Methods 0.000 description 3
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 125000004432 carbon atom Chemical group C* 0.000 description 2
- VNNRSPGTAMTISX-UHFFFAOYSA-N chromium nickel Chemical compound [Cr].[Ni] VNNRSPGTAMTISX-UHFFFAOYSA-N 0.000 description 2
- 230000007812 deficiency Effects 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910001120 nichrome Inorganic materials 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 235000013399 edible fruits Nutrition 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/47—Schottky barrier electrodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
The present invention relates to a kind of preparation method and its structure of SiC power diode devices, which includes：SiC epitaxial layer is grown on SiC substrate layer, P is formed in the SiC epitaxial layer+Region is forming the P+The SiC epitaxial layer surface growth TiC alloy-layers in region form Schottky contacts, one bronze medal graphene layer of growth regulation forms the anode electrode of device on the TiC alloy-layers, device cathode electrode is formed at the SiC substrate layer back side, to complete the preparation of the SiC power diode devices.The present invention's is changed using contact adjusting barrier height between TiC materials and SiC, and then reduces the height of Schottky barrier, reduces the cut-in voltage of SiC power diode devices, is achieved the effect that reduce leakage current and energy consumption, is increased backward voltage.
Description
Technical field
The present invention relates to microelectronics technologies, a kind of preparation method more particularly to SiC power diode devices and
Its structure.
Background technology
Third generation semi-conducting material SiC (silicon carbide) materials are due to broad-band gap, high critical breakdown electric field, highly thermally conductive
The features such as rate, high carrier saturation drift velocity, has huge in high temperature, high frequency, high-power, photoelectron and radioresistance etc.
Potentiality, many countries have put into a large amount of fund and have been conducted extensive research to SiC in succession, and grow skill in SiC crystal
Art, Primary Component technique, photoelectric device exploitation, SiC IC manufacturings etc. achieve breakthroughs, be military electronic systems with
The raising of weaponry performance and the electronic equipment of anti-adverse environment provide new device.
Schottky (Schottky) barrier diode is one to be worked using contact berrier between metal and semiconductor
Kind majority carrier device.Schottky diode compared to PN diodes have simpler structure, in manufacturing process also compared with
To be simple, therefore cost is relatively low, and the electric resistance transition memory of Schottky diode gating has centainly compared to PN diodes
Advantage, and Schottky diode has in electric current and also good performance on the corresponding time.
But since the energy gap of SiC is wider, it is difficult to obtain low schottky barrier height value, lead to SiC and metal
When contact, schottky barrier height is excessively high, influences the cut-in voltage of semiconductor power device, causes energy consumption excessive.
Invention content
Therefore, to solve technological deficiency and deficiency of the existing technology, the present invention proposes a kind of SiC power diodes device
The preparation method and its structure of part.
Specifically, a kind of preparation method for SiC power diode devices that one embodiment of the invention proposes, including：
SiC epitaxial layer is grown on SiC substrate layer；
P is formed in the SiC epitaxial layer+Region；
Forming the P+The SiC epitaxial layer surface growth TiC alloy-layers in region form Schottky contacts；
One bronze medal graphene layer of growth regulation forms the anode electrode of device on the TiC alloy-layers；
Device cathode electrode is formed at the SiC substrate layer back side, to complete the system of the SiC power diode devices
It is standby.
In one embodiment of the invention, P is formed in the SiC epitaxial layer+Before region, further include：
Ion implanting barrier layer is made in the SiC epitaxial layer upper surface.
In one embodiment of the invention, ion implanting barrier layer is made in the SiC epitaxial layer upper surface, including：
Photoetching is carried out in the SiC epitaxial layer upper surface, after development, makees barrier layer using photoresist, and etches to be formed pair
Fiducial mark is remembered；
The alignment mark is subjected to alignment, forms graphics field；
By electron beam evaporation at upper making Ni/Au layers of the SiC epitaxial layer with the graphics field, institute is removed
It states Ni/Au layers and forms the ion implanting barrier layer.
In one embodiment of the invention, P is formed in the SiC epitaxial layer+Region, including：
Al ion implantings are carried out to the SiC epitaxial layer；
Carbon film protection is formed in the SiC epitaxial layer upper surface；
At a temperature of 1700 DEG C~1750 DEG C, ion-activated annealing, annealing time 20min, shape are carried out in argon atmosphere
At the P+Region.
In one embodiment of the invention, P is formed in the SiC epitaxial layer+After region, further include：
Using chemical vapor deposition method one layer of SiO is deposited in 104 upper surface of the SiC epitaxial layer2Spacer medium；
At a temperature of 800 DEG C, make the SiO in oxygen atmosphere2Spacer medium anneals 60 minutes and forms the SiO2Isolation
Dielectric layer.
In one embodiment of the invention, the P is being formed+The SiC epitaxial layer surface in region grows TiC alloys
Layer forms Schottky contacts, including：
To the SiO2Spacer medium layer carries out gluing, development, and Schottky contacts window is formed by chemical wet etching；
The TiC alloy-layers are deposited in the SiC epitaxial layer using chemical vapor deposition method；
It at a temperature of 800 DEG C~900 DEG C, anneals 3 minutes in nitrogen atmosphere, forms Schottky contacts.
In one embodiment of the invention, one bronze medal graphene layer of growth regulation forms device on the TiC alloy-layers
Anode electrode, including：
The first Cu metal layers are sputtered on the TiC alloy-layers using magnetron sputtering technique；
Using chemical vapor deposition method, graphene layer is deposited on the first Cu metal layers；
Using magnetron sputtering technique the 2nd Cu metal layers are sputtered in the graphene layer；
So that device is annealed at a temperature of 500 DEG C 30 minutes, prepares the anode electricity that the first bronze medal graphene layer forms device
Pole.
In one embodiment of the invention, before the cathode electrode that the SiC substrate layer back side forms device, packet
It includes：
At the SiC substrate layer back side, growth the first metal layer forms Ohmic contact.In one embodiment of the invention,
After at the SiC substrate layer back side, growth the first metal layer forms Ohmic contact, including：
Using magnetron sputtering technique in the first metal layer lower surface splash-proofing sputtering metal Ag；
Annealing prepares the cathode electrode that second metal layer forms device in nitrogen atmosphere.
In one embodiment of the invention, a kind of structure of SiC power diode devices, including：Stacked gradually
Two metal layers, the first metal layer, SiC substrate layer, SiC epitaxial layer, SiO2Spacer medium layer, TiC alloy-layers, the first bronze medal graphene
Layer, wherein the regions P+ are provided in the SiC epitaxial layer, the SiC power diode devices are by any one of claim 1~9
The method prepares to be formed.
The embodiment of the present invention has following advantage：
1, contact adjusting barrier height changes between utilization TiC materials and SiC of the invention, and then reduces Schottky barrier
Height, reduce the cut-in voltage of SiC power diode devices, reach the effect for reducing leakage current and energy consumption, increasing backward voltage
Fruit.
2, the present invention can improve SiC epitaxial growth temperatures using TiC materials as Schottky contact metal material, and
SiC power diode devices can be made to be applied under the high temperature conditions.
3, the present invention improves the high temperature resistance and conduction of SiC device using copper graphene composite material as anode
Performance improves the heat dissipation performance of SiC power diode devices.
4, the present invention is due in deposition SiO2Before spacer medium, under O ion atmospheres, surface of SiC is oxidized to SiO2Every
From medium, SiC and SiO can be effectively formed2Interface, and C elemental oxygen formation gas is discharged, thoroughly solve high gentle and kind oxidation
Interfacial state caused by C atom complex is high in layer, the low problem of carrier mobility.
5, the present invention is due to final SiO2Spacer medium is that chemical vapor deposition and annealing are formed, and is ensureing SiO2Medium
Under the premise of layer quality, SiC and SiO is thoroughly solved2Interface forms the problem of C complex compounds.
Through the following detailed description with reference to the accompanying drawings, other aspects of the invention and feature become apparent.But it should know
Road, which is only the purpose design explained, not as the restriction of the scope of the present invention, this is because it should refer to
Appended claims.It should also be noted that unless otherwise noted, it is not necessary to which scale attached drawing, they only try hard to concept
Ground illustrates structure and flow described herein.
Description of the drawings
Below in conjunction with attached drawing, the specific implementation mode of the present invention is described in detail.
Fig. 1 is a kind of preparation method flow chart of SiC power diode devices provided in an embodiment of the present invention；
Fig. 2 a~Fig. 2 i are a kind of preparation process flow signal of SiC power diode devices provided in an embodiment of the present invention
Figure；
Fig. 3 is a kind of structural schematic diagram of SiC power diode devices provided in an embodiment of the present invention；
Fig. 4 is the structural schematic diagram of another kind SiC power diode devices provided in an embodiment of the present invention.
Specific implementation mode
In order to make the foregoing objectives, features and advantages of the present invention clearer and more comprehensible, below in conjunction with the accompanying drawings to the present invention
Specific implementation mode be described in detail.
Embodiment one
Fig. 1 is referred to, Fig. 1 is a kind of preparation method flow of SiC power diode devices provided in an embodiment of the present invention
Figure.The preparation method includes the following steps：
Step a, SiC epitaxial layer is grown on SiC substrate layer；
Step b, P is formed in the SiC epitaxial layer+Region；
Step c, the P is being formed+The SiC epitaxial layer surface growth TiC alloy-layers in region form Schottky contacts；
Step d, on the TiC alloy-layers, one bronze medal graphene layer 109 of growth regulation forms the anode electrode of device；
Step e, the cathode electrode that device is formed at the SiC substrate layer back side, to complete the SiC power diodes device
The preparation of part.
Wherein, further include before step b：
Step b1, ion implanting barrier layer is made in SiC epitaxial layer upper surface.
Wherein, step b1 includes：
Step b11, after SiC epitaxial layer upper surface carries out photoetching, development, make barrier layer using photoresist, and etch shape
At alignment mark；
Step b12, alignment mark is subjected to alignment, forms graphics field；
Step b13, by electron beam evaporation the SiC epitaxial layer with the graphics field upper making Ni/Au
Layer removes described Ni/Au layers and forms the ion implanting barrier layer.
Wherein, step b includes：
Step b2, Al ion implantings are carried out to SiC epitaxial layer；
Step b3, carbon film protection is formed in SiC epitaxial layer upper surface；
Step b4, at a temperature of 1700 DEG C~1750 DEG C, ion-activated annealing is carried out in argon atmosphere, annealing time is
20min forms P+Region.
Wherein, further include after step b：
Step b5, using chemical vapor deposition method one layer of SiO is deposited in SiC epitaxial layer upper surface2Spacer medium；
Step b6, at a temperature of 800 DEG C, make SiO in oxygen atmosphere2Spacer medium anneals 60 minutes and forms SiO2Isolation
Dielectric layer.
Wherein, step c includes：
Step c1, to SiO2Spacer medium layer carries out gluing, development, and Schottky contacts window is formed by chemical wet etching；
Step c2, the Schottky contacts window deposition TiC alloys using chemical vapor deposition method in SiC epitaxial layer
Layer；
Step c3, at a temperature of 800 DEG C~900 DEG C, it anneals 3 minutes in nitrogen atmosphere, forms Schottky contacts.
Wherein, step d includes：
Step d1, the first Cu metal layers are sputtered on the TiC alloy-layers using magnetron sputtering technique；
Step d2, using chemical vapor deposition method, graphene layer is deposited on the first Cu metal layers；
Step d3, the 2nd Cu metal layers are sputtered in graphene layer using magnetron sputtering technique；
Step d4, so that device is annealed at a temperature of 500 DEG C 30 minutes, prepare the first bronze medal graphene layer and form device
Anode electrode.
Wherein, further include before step e：
Step e1, at the SiC substrate layer back side, growth the first metal layer forms Ohmic contact.Wherein, step e includes：
Step e2, using magnetron sputtering technique in the first metal layer lower surface splash-proofing sputtering metal Ag；
Step e3, in nitrogen atmosphere, annealing prepares the cathode electrode that second metal layer forms device.
Preferably, the first bronze medal graphene layer is copper graphene composite material.
Preferably, the structure of the SiC power diode devices includes：The second metal layer that stacks gradually, the first metal layer,
SiC substrate layer, SiC epitaxial layer, SiO2Spacer medium layer, TiC alloy-layers, the first bronze medal graphene layer, wherein in SiC epitaxial layer
It is provided with the regions P+.
The advantageous effect of the present embodiment is specially：
1, the present embodiment is by one layer of TiC alloy material of SiC epitaxial layer Surface Creation, forming Schottky contacts, passing through
Schottky contacts between SiC epitaxial layer and TiC alloy-layers reduce schottky barrier height, can reduce by two pole of SiC power
The cut-in voltage of tube device, to achieve the effect that reduce leakage current and reduce energy consumption, increase backward voltage.
2, the present embodiment can not only improve the life of SiC extensions using TiC alloy materials as Schottky contact metal material
Long temperature, and SiC power diode devices can be made to be applied under the high temperature conditions.
3, the present embodiment improves the resistance to height of SiC power diode devices using copper graphene composite material as anode
Warm nature energy and electric conductivity improve the heat dissipation performance of SiC power diode devices.
Embodiment two
It is a kind of SiC power diode devices provided in an embodiment of the present invention to refer to Fig. 2 a~Fig. 2 h, Fig. 2 a~Fig. 2 h
Preparation process flow schematic diagram.On the basis of the above embodiments, the present embodiment will be in more detail to the technique of the present invention
Flow is introduced.The preparation method includes：
S1, substrate are chosen
It is 5 × 10 to choose doping concentration18cm-3N+Type SiC substrate layer 103 is original material.
S11, to N+Type SiC substrate layer 103 is cleaned using RCA (wet chemical cleans method) cleaning standard, with removal
Sample surfaces are organic and inorganic chemistry pollutant.
S2, the epitaxial growth SiC epitaxial layer 104 on SiC substrate layer 103
S21, as shown in Figure 2 a, using chemical vapor deposition method, epitaxial growth thickness is 8 above SiC substrate layer 103
μm, Nitrogen ion doping concentration is 1 × 1015cm-3N-Type SiC epitaxial layer 104, process conditions are：Epitaxial growth temperature is
1570 DEG C, pressure 100mbar, reaction gas uses silane and propane, carrier gas that pure hydrogen, impurity source is used to use liquid
Nitrogen.
S3, ion implanting barrier layer 105 is grown in SiC epitaxial layer 104
S31, it after doing RCA standard cleanings to SiC epitaxial layer 104, after carrying out gluing photoetching, development, is hindered using photoresist
Barrier forms alignment mark after etching 5min using RE, and alignment mark depth is 0.4 μm；
S32, alignment is carried out to the alignment mark of formation, forms graphics field；
S33, as shown in Figure 2 b, by electron beam evaporation the SiC epitaxial layer 104 with graphics field upper surface makeNi/Au layers, wherein the thickness of Ni isThe thickness of Au isThen impregnate do in acetone it is super
Sonicated, stripping metal form ion implanting barrier layer 105.
S4, P is formed in SiC epitaxial layer 104+Region 106
S41, as shown in Figure 2 c, under 450 DEG C of environment temperature to SiC epitaxial layer 104 carry out five Al ion implantings, note
It is 0.4 μm to enter depth, and Implantation Energy is respectively 30keV, 120keV, 300keV, 420keV and 550keV, and Implantation Energy is
When 30keV, implantation dosage is 2.8 × 1012cm-2；When Implantation Energy is 120keV, implantation dosage is 6.5 × 1012cm-2；Injection
When energy is 300keV, implantation dosage is 1.05 × 1013cm-2；Implantation Energy be 420keV when, implantation dosage be 1.3 ×
1013cm-2；When Implantation Energy is 550keV, implantation dosage is 1.45 × 1013cm-2, form the P for being spaced discrete arrangement+Region
106；
S42,104 surface of SiC epitaxial layer is cleaned using RCA cleanings standard, is dried at a temperature of 1000 DEG C
20min carries out gluing three times on 104 surface of SiC epitaxial layer after drying, and heats 90min at 400 DEG C, after photoresist carbonization
It is converted to unformed C films and forms carbon film protection；
S43, ion-activated annealing is carried out in 1700 DEG C~1750 DEG C argon atmospheres, annealing time 20min forms P+
Region 106.
S5, SiO is grown in SiC epitaxial layer 1042Spacer medium layer 107
S51, it device is integrally put into chemical vapor deposition stove is heated to 300 DEG C, oxygen is passed through 60 seconds, in O ion-gas
Under atmosphere, by 104 surface oxidation of SiC epitaxial layer at 1-2nmSiO2Spacer medium, then it is passed through silane, deposit the SiO of 100nm2Isolation
Medium.
S52, as shown in Figure 2 d, in oxygen atmosphere by SiC samples, 800 DEG C anneal 60 minutes, formed SiO2Spacer medium
Layer 107.
S6, the Schottky contacts window growth TiC alloy-layers 108 in SiC epitaxial layer 104
S61, to SiO2Spacer medium layer 107 carries out gluing, development, carries out chemical wet etching again later, forms schottky junctions
Touch window；
S62, as shown in Figure 2 e, using chemical vapor deposition method in Schottky contacts window deposition TiC alloy-layers 108；
Annealing 3 minutes in S63, nitrogen atmosphere at a temperature of 850 ± 50 DEG C makes SiC epitaxial layer 104 and TiC alloy-layers
108 form Schottky contacts.
S7, in SiO2One bronze medal graphene layer 109 of growth regulation on spacer medium layer 107 and TiC alloy-layers 108
S71, as shown in figure 2f, using magnetron sputtering technique in SiO2It is splashed on spacer medium layer 107 and TiC alloy-layers 108
Copper graphene composite material to be penetrated, the first bronze medal graphene layer 109 is formed, wherein the thickness of the first bronze medal graphene layer 109 is 1 μm, and
For anode.
S8, the first metal layer (i.e. Ni metal layers 102) is grown in the lower surface of SiC substrate layer 103
S81, Ni metal layers 102 are sputtered in the lower surface of SiC substrate layer 103 using magnetron sputtering technique；
S82, as shown in Figure 2 g, annealing makes SiC substrate layer 103 and Ni metal layers 102 form Europe in nitrogen atmosphere
Nurse contacts, and Ni metal layers 102 are cathode.
S9, second metal layer (i.e. Ag metal layers 101) is grown in the lower surface of Ni metal layers 102
S91, as shown in fig. 2h, using magnetron sputtering technique Ni metal layers 102 lower surface splash-proofing sputtering metal Ag；
Annealing forms Ag metal layers 101 in S92, nitrogen atmosphere at a temperature of 900 DEG C, and Ag metal layers 101 are the moon
Pole.
The advantageous effect of the present embodiment：
1, the present embodiment is due in deposition SiO2Before spacer medium, under O ion atmospheres, surface of SiC is oxidized to SiO2
Spacer medium can effectively form SiC and SiO2Interface, and C elemental oxygen formation gas is discharged, thoroughly solve high gentle and kind oxygen
It is high to change interfacial state caused by C atom complex in layer, the low problem of carrier mobility.
2, the present embodiment is due to final SiO2Spacer medium is that chemical vapor deposition and annealing are formed, and is ensureing SiO2It is situated between
Under the premise of matter layer quality, SiC and SiO is thoroughly solved2Interface forms the problem of C complex compounds.
Embodiment three
Referring again to Fig. 2 a~Fig. 2 h.On the basis of the above embodiments, the present embodiment will be in more detail to this hair
Bright another technological process is introduced.The preparation method includes：
S1, substrate are chosen
It is 5 × 10 to choose doping concentration18cm-3N+Type SiC substrate layer 103 is original material.
S11, to N+Type SiC substrate layer 103 is cleaned using RCA (wet chemical cleans method) cleaning standard, with removal
Sample surfaces are organic and inorganic chemistry pollutant.
S2, the epitaxial growth SiC epitaxial layer 104 on SiC substrate layer 103
S21, as shown in Figure 2 a, using chemical vapor deposition method, epitaxial growth thickness is 8 above SiC substrate layer 103
μm, Nitrogen ion doping concentration is 1 × 1015cm-3N-Type SiC epitaxial layer 104, process conditions are：Epitaxial growth temperature is
1570 DEG C, pressure 100mbar, reaction gas uses silane and propane, carrier gas that pure hydrogen, impurity source is used to use liquid
Nitrogen.
S3, ion implanting barrier layer 105 is grown in SiC epitaxial layer 104
S31, it after doing RCA standard cleanings to SiC epitaxial layer 104, after carrying out gluing photoetching, development, is hindered using photoresist
Barrier forms alignment mark after etching 5min using RE, and alignment mark depth is 0.4 μm；
S32, alignment is carried out to the alignment mark of formation, forms graphics field；
S33, as shown in Figure 2 b, by electron beam evaporation the SiC epitaxial layer 104 with graphics field upper surface makeNi/Au layers, wherein the thickness of Ni isThe thickness of Au isThen impregnate do in acetone it is super
Sonicated, stripping metal form ion implanting barrier layer 105.
S4, P is formed in SiC epitaxial layer 104+Region 106
S41, as shown in Figure 2 c, under 450 DEG C of environment temperature to SiC epitaxial layer 104 carry out five Al ion implantings, note
It is 0.4 μm to enter depth, and Implantation Energy is respectively 30keV, 120keV, 300keV, 420keV and 550keV, and Implantation Energy is
When 30keV, implantation dosage is 2.8 × 1012cm-2；When Implantation Energy is 120keV, implantation dosage is 6.5 × 1012cm-2；Injection
When energy is 300keV, implantation dosage is 1.05 × 1013cm-2；Implantation Energy be 420keV when, implantation dosage be 1.3 ×
1013cm-2；When Implantation Energy is 550keV, implantation dosage is 1.45 × 1013cm-2, form the P for being spaced discrete arrangement+Region
106；
S42,104 surface of SiC epitaxial layer is cleaned using RCA cleanings standard, is dried at a temperature of 1000 DEG C
20min carries out gluing three times on 104 surface of SiC epitaxial layer after drying, and heats 90min at 400 DEG C, after photoresist carbonization
It is converted to unformed C films and forms carbon film protection, C film thicknesses are 0.4 μm；
S43, ion-activated annealing is carried out in 1700 DEG C~1750 DEG C argon atmospheres, annealing time 20min forms P+
Region 106.
S5, SiO is grown in SiC epitaxial layer 1042Spacer medium layer 107
S51, it device is integrally put into chemical vapor deposition stove is heated to 300 DEG C, oxygen is passed through 60 seconds, in O ion-gas
Under atmosphere, by 104 surface oxidation of SiC epitaxial layer at 1-2nmSiO2Spacer medium, then it is passed through silane, deposit the SiO of 100nm2Isolation
Medium；
S52, as shown in Figure 2 d, in oxygen atmosphere by SiC samples, 800 DEG C anneal 60 minutes, formed SiO2Spacer medium
Layer 107.
S6, the Schottky contacts window growth TiC alloy-layers 108 in SiC epitaxial layer 104
S61, to SiO2Spacer medium layer 107 carries out gluing, development, carries out chemical wet etching again later, forms schottky junctions
Touch window；
S62, as shown in Figure 2 e, using chemical vapor deposition method in Schottky contacts window deposition TiC alloy-layers 108；
Annealing 3 minutes in S63, nitrogen atmosphere at a temperature of 850 ± 50 DEG C makes SiC epitaxial layer 104 and TiC alloy-layers
108 form Schottky contacts.
S7, in SiO2One bronze medal graphene layer 109 of growth regulation on spacer medium layer 107 and TiC alloy-layers 108
S71, using magnetron sputtering technique in SiO2The first Cu metals are sputtered on spacer medium layer 107 and TiC alloy-layers 108
Layer；
S72, using chemical vapor deposition method, grow graphene layer on the first Cu metal layers；
S73, the 2nd Cu metal layers are sputtered in graphene layer using magnetron sputtering technique；
S74, as shown in figure 2f makes the first Cu metal layers, graphene layer and the annealing of the 2nd Cu metal layers at a temperature of 500 DEG C
30 minutes, form the first bronze medal graphene layer 109.
S8, the first metal layer (i.e. Ni metal layers 102) is grown in the lower surface of SiC substrate layer 103
S81, Ni metal layers 102 are sputtered in the lower surface of SiC substrate layer 103 using magnetron sputtering technique；
S82, as shown in Figure 2 g, in nitrogen atmosphere at a temperature of 900 DEG C annealing make SiC substrate layer 103 and Ni gold
Belong to layer 102 and form Ohmic contact, Ni metal layers 102 are cathode.
S9, second metal layer (i.e. Ag metal layers 101) is grown in the lower surface of Ni metal layers 102
S91, as shown in fig. 2h, using magnetron sputtering technique Ni metal layers 102 lower surface splash-proofing sputtering metal Ag；
Annealing forms Ag metal layers 101 in S92, nitrogen atmosphere at a temperature of 900 DEG C, and Ag metal layers 101 are the moon
Pole.
Example IV
Referring again to Fig. 2 a~Fig. 2 g and 2i.On the basis of the above embodiments, the present embodiment will be right in more detail
Another technological process of the present invention is introduced.The preparation method includes：
S1, substrate are chosen
It is 5 × 10 to choose doping concentration18cm-3N+Type SiC substrate layer 103 is original material.
S11, to N+Type SiC substrate layer 103 is cleaned using RCA (wet chemical cleans method) cleaning standard, with removal
Sample surfaces are organic and inorganic chemistry pollutant.
S2, the epitaxial growth SiC epitaxial layer 104 on SiC substrate layer 103
S21, as shown in Figure 2 a, using chemical vapor deposition method, in 103 upper surface epitaxial growth thickness of SiC substrate layer
It it is 8 μm, Nitrogen ion doping concentration is 1 × 1015cm-3N-Type SiC epitaxial layer 104, process conditions are：Epitaxial growth temperature is
1570 DEG C, pressure 100mbar, reaction gas uses silane and propane, carrier gas that pure hydrogen, impurity source is used to use liquid
Nitrogen.S3, ion implanting barrier layer 105 is grown in SiC epitaxial layer 104
S31, it after doing RCA standard cleanings to SiC epitaxial layer 104, after carrying out gluing photoetching, development, is hindered using photoresist
Barrier forms alignment mark after etching 5min using RE, and alignment mark depth is 0.4 μm；
S32, alignment is carried out to the alignment mark of formation, forms graphics field；
S33, as shown in Figure 2 b, by electron beam evaporation the SiC epitaxial layer 104 with graphics field upper surface makeNi/Au layers, wherein the thickness of Ni isThe thickness of Au isThen impregnate do in acetone it is super
Sonicated, stripping metal form ion implanting barrier layer 105.
S4, P is formed in SiC epitaxial layer 104+Region 106
S41, as shown in Figure 2 c, under 450 DEG C of environment temperature to SiC epitaxial layer 104 carry out five Al ion implantings, note
It is 0.4 μm to enter depth, and Implantation Energy is respectively 30keV, 120keV, 300keV, 420keV and 550keV, and Implantation Energy is
When 30keV, implantation dosage is 2.8 × 1012cm-2；When Implantation Energy is 120keV, implantation dosage is 6.5 × 1012cm-2；Injection
When energy is 300keV, implantation dosage is 1.05 × 1013cm-2；Implantation Energy be 420keV when, implantation dosage be 1.3 ×
1013cm-2；When Implantation Energy is 550keV, implantation dosage is 1.45 × 1013cm-2, form the P for being spaced discrete arrangement+Region
106；
S42,104 surface of SiC epitaxial layer is cleaned using RCA cleanings standard, is dried at a temperature of 1000 DEG C
20min carries out gluing three times on 104 surface of SiC epitaxial layer after drying, and heats 90min at 400 DEG C, after photoresist carbonization
It is converted to unformed C films and forms carbon film protection, C film thicknesses are 0.4 μm；
S43, ion-activated annealing is carried out in 1700 DEG C~1750 DEG C argon atmospheres, annealing time 20min forms P+
Region 106.
S5, SiO is grown in SiC epitaxial layer 1042Spacer medium layer 107
S51, it device is integrally put into chemical vapor deposition stove is heated to 300 DEG C, oxygen is passed through 60 seconds, in O ion-gas
Under atmosphere, by 104 surface oxidation of SiC epitaxial layer at 1-2nmSiO2Spacer medium, then it is passed through silane, deposit the SiO of 100nm2Isolation
Medium.
S52, as shown in Figure 2 d, in oxygen atmosphere by SiC samples, 800 DEG C anneal 60 minutes, formed SiO2Spacer medium
Layer 107.
S6, the Schottky contacts window growth TiC alloy-layers 108 in SiC epitaxial layer 104
S61, to SiO2Spacer medium layer 107 carries out gluing, development, carries out chemical wet etching again later, forms schottky junctions
Touch window；
S62, as shown in Figure 2 e, using chemical vapor deposition method in Schottky contacts window deposition TiC alloy-layers 108；
Annealing 3 minutes in S63, nitrogen atmosphere at a temperature of 850 ± 50 DEG C makes SiC epitaxial layer 104 and TiC alloy-layers
108 form Schottky contacts.
S7, in SiO2One bronze medal graphene layer 109 of growth regulation on spacer medium layer 107 and TiC alloy-layers 108
S71, as shown in figure 2f, using magnetron sputtering technique in SiO2It is splashed on spacer medium layer 107 and TiC alloy-layers 108
Copper graphene composite material to be penetrated, the first bronze medal graphene layer 109 is formed, wherein the thickness of the first bronze medal graphene layer 109 is 1 μm, and
For anode.
Optionally, using magnetron sputtering technique in SiO2Splash-proofing sputtering metal on spacer medium layer 107 and NiCr alloy-layers 108
Al forms Al metal layers, as anode.
S8, the first metal layer (i.e. Ni metal layers 102) is grown in the lower surface of SiC substrate layer 103
S81, Ni metal layers 102 are sputtered in the lower surface of SiC substrate layer 103 using magnetron sputtering technique；
S82, as shown in Figure 2 g, in nitrogen atmosphere at a temperature of 900 DEG C annealing make SiC substrate layer 103 and Ni gold
Belong to layer 102 and form Ohmic contact, Ni metal layers 102 are cathode.
S9, the two bronze medal graphene layer of lower surface growth regulation in Ni metal layers 102
S91, as shown in fig. 2i, it is compound in the lower surface of Ni metal layers 102 sputtering copper graphene using magnetron sputtering technique
Material forms the second bronze medal graphene layer, and the second bronze medal graphene layer is cathode.
Embodiment five
Referring again to Fig. 3, Fig. 3 is a kind of structural representation of SiC power diode devices provided in an embodiment of the present invention
Figure.The present embodiment provides a kind of structure of SiC power diode devices, the structure, including：
Second metal layer (i.e. Ag metal layers 101)；
Wherein, Ag metal layers 101 are cathode, and thickness is 1 μm.
The first metal layer (i.e. Ni metal layers 102) is located at 101 upper surface of Ag metal layers；
Wherein, Ni metal layers 102 are cathode, and thickness is 1 μm.
SiC substrate layer 103 is located at the upper surface of Ni metal layers 102；
Wherein, SiC substrate layer 103 is 5 × 10 by doping concentration18cm-3N+Type SiC material is constituted, and thickness is 360 μm,
SiC substrate layer 103 and Ni metal layers 102 form Ohmic contact.
SiC epitaxial layer 104 is located at 103 upper surface of SiC substrate layer；
Wherein, SiC epitaxial layer 104 is 1 × 10 by doping concentration15cm-3N-Type SiC material is constituted, and thickness is 8 μm.
P+Region 106 is located in SiC epitaxial layer 104；
Wherein, P+The doping concentration in region 106 is 3 × 1018cm-3, depth is 0.4 μm, P+Region 106 is located at SiC extensions
104 inside of layer is in the discrete arrangement in interval.
SiO2Spacer medium layer 107 is located at 104 upper surface of SiC epitaxial layer；
Wherein, SiO2The thickness of spacer medium layer 107 is 100nm.
TiC alloy-layers 108 are located at 104 upper surface of SiC epitaxial layer；
Wherein, SiC epitaxial layer 104 and TiC alloy-layers 108 form Schottky contacts.
First bronze medal graphene layer 109 is located at SiO2108 upper surface of spacer medium layer 107 and TiC alloy-layers；
Wherein, the first bronze medal graphene layer 109 is composite material, and the thickness of the first bronze medal graphene layer 109 is 1 μm, and is sun
Pole.
The advantageous effect of the present embodiment：
1, the present embodiment is by one layer of TiC alloy material of SiC epitaxial layer Surface Creation, forming Schottky contacts, passing through
Schottky contacts between SiC epitaxial layer and TiC alloy-layers reduce schottky barrier height, can reduce by two pole of SiC power
The cut-in voltage of tube device, to achieve the effect that reduce leakage current and reduce energy consumption, increase backward voltage.
2, the present embodiment can improve SiC epitaxial growth temperatures using TiC materials as Schottky contact metal material,
And SiC power diode devices can be made to be applied under the high temperature conditions.
3, the present embodiment improves the resistance to height of SiC power diode devices using copper graphene composite material as anode
Warm nature energy and electric conductivity improve the heat dissipation performance of SiC power diode devices.
Embodiment six
Fig. 4 is referred to, Fig. 4 is the structural schematic diagram of another kind SiC power diode devices provided in an embodiment of the present invention.
The present embodiment provides the structure of another SiC power diode devices, the structure, including：
Second bronze medal graphene layer 110；
Wherein, the second bronze medal graphene layer 110 is copper graphene composite material, and the second bronze medal graphene layer 110 is cathode.
The first metal layer (i.e. Ni metal layers 102) is located at 110 upper surface of the second bronze medal graphene layer；
Wherein, Ni metal layers 102 are cathode, and thickness is 1 μm.
SiC substrate layer 103 is located at the upper surface of Ni metal layers 102；
Wherein, SiC substrate layer 103 is 5 × 10 by doping concentration18cm-3N+Type SiC material is constituted, and thickness is 360 μm,
SiC substrate layer 103 and Ni metal layers 102 form Ohmic contact.
SiC epitaxial layer 104 is located at 103 upper surface of SiC substrate layer；
Wherein, SiC epitaxial layer 104 is 1 × 10 by doping concentration15cm-3N-Type SiC material is constituted, and thickness is 8 μm.
P+Region 106 is located in SiC epitaxial layer 104；
Wherein, P+The doping concentration in region 106 is 3 × 1018cm-3, depth is 0.4 μm, P+Region 106 is located at SiC extensions
104 inside of layer is in the discrete arrangement in interval.
SiO2Spacer medium layer 107 is located at 104 upper surface of SiC epitaxial layer；
Wherein, SiO2The thickness of spacer medium layer 107 is 100nm.
TiC alloy-layers 108 are located at 104 upper surface of SiC epitaxial layer；
Wherein, SiC epitaxial layer 104 and TiC alloy-layers 108 form Schottky contacts.
First bronze medal graphene layer 109 is located at SiO2108 upper surface of spacer medium layer 107 and TiC alloy-layers；
Wherein, the first bronze medal graphene layer 109 is composite material, and the thickness of the first bronze medal graphene layer 109 is 1 μm, and is sun
Pole.
Optionally, Al metal layers are located at SiO2Spacer medium layer and NiCr alloy-layers upper surface, and Al metal layers are anode.
The present embodiment prepares the anode and cathode of SiC power diode devices, Neng Gougai using copper graphene composite material
The high temperature resistance and electric conductivity of kind SiC device, improve the heat dissipation performance of SiC power diode devices.
In conclusion specific case used herein is to a kind of SiC power diodes device provided in an embodiment of the present invention
The preparation method of part and its principle and embodiment of structure are expounded, and the explanation of above example is only intended to help to manage
Solve the method and its core concept of the present invention；Meanwhile for those of ordinary skill in the art, according to the thought of the present invention,
There will be changes in specific implementation mode and application range, in conclusion the content of the present specification should not be construed as to this hair
Bright limitation, protection scope of the present invention should be subject to the attached claims.
Claims (10)
1. a kind of preparation method of SiC power diode devices, which is characterized in that including：
SiC epitaxial layer is grown on SiC substrate layer；
P is formed in the SiC epitaxial layer+Region；
Forming the P+The SiC epitaxial layer surface growth TiC alloy-layers in region form Schottky contacts；
One bronze medal graphene layer of growth regulation forms the anode electrode of device on the TiC alloy-layers；
The cathode electrode of device is formed at the SiC substrate layer back side, to complete the preparation of the SiC power diode devices.
2. according to the method described in claim 1, it is characterized in that, forming P in the SiC epitaxial layer+Before region, also wrap
It includes：
Ion implanting barrier layer is made in the SiC epitaxial layer upper surface.
3. according to the method described in claim 2, it is characterized in that, making ion implanting resistance in the SiC epitaxial layer upper surface
Barrier, including：
After the SiC epitaxial layer upper surface carries out photoetching, development, make barrier layer using photoresist, and etch and to be formed to fiducial mark
Note；
The alignment mark is subjected to alignment, forms graphics field；
By electron beam evaporation at upper making Ni/Au layers of the SiC epitaxial layer with the graphics field, described in stripping
Ni/Au layers form the ion implanting barrier layer.
4. according to the method described in claim 1, it is characterized in that, forming P in the SiC epitaxial layer+Region, including：
Al ion implantings are carried out to the SiC epitaxial layer；
Carbon film protection is formed in the SiC epitaxial layer upper surface；
At a temperature of 1700 DEG C~1750 DEG C, ion-activated annealing is carried out in argon atmosphere, annealing time 20min forms institute
State P+Region.
5. according to the method described in claim 1, it is characterized in that, forming P in the SiC epitaxial layer+After region, also wrap
It includes：
Using chemical vapor deposition method one layer of SiO is deposited in the SiC epitaxial layer upper surface2Spacer medium；
At a temperature of 800 DEG C, make the SiO in oxygen atmosphere2Spacer medium anneals 60 minutes and forms SiO2Spacer medium layer.
6. according to the method described in claim 1, it is characterized in that, forming the P+It gives birth on the SiC epitaxial layer surface in region
Long TiC alloy-layers form Schottky contacts, including：
To the SiO2Spacer medium layer carries out gluing, development, and Schottky contacts window is formed by chemical wet etching；
The TiC alloy-layers are deposited in the SiC epitaxial layer using chemical vapor deposition method；
It at a temperature of 800 DEG C~900 DEG C, anneals 3 minutes in nitrogen atmosphere, forms Schottky contacts.
7. according to the method described in claim 1, it is characterized in that, on the TiC alloy-layers one bronze medal graphene layer of growth regulation
The anode electrode of device is formed, including：
The first Cu metal layers are sputtered on the TiC alloy-layers using magnetron sputtering technique；
Using chemical vapor deposition method, graphene layer is deposited on the first Cu metal layers；
Using magnetron sputtering technique the 2nd Cu metal layers are sputtered in the graphene layer；
So that device is annealed at a temperature of 500 DEG C 30 minutes, prepares the anode electrode that the first bronze medal graphene layer forms device.
8. according to the method described in claim 1, it is characterized in that, forming the cathode electricity of device at the SiC substrate layer back side
Before pole, including：
At the SiC substrate layer back side, growth the first metal layer forms Ohmic contact.
9. according to the method described in claim 8, it is characterized in that, growing the first metal layer shape at the SiC substrate layer back side
After Ohmic contact, including：
Using magnetron sputtering technique under the first metal layer splash-proofing sputtering metal Ag；
Annealing prepares the cathode electrode that second metal layer forms device in nitrogen atmosphere.
10. a kind of structure of SiC power diode devices, which is characterized in that including：The second metal layer that stacks gradually, first
Metal layer, SiC substrate layer, SiC epitaxial layer, SiO2Spacer medium layer, TiC alloy-layers, the first bronze medal graphene layer, wherein described
The regions P+ are provided in SiC epitaxial layer, the SiC power diode devices are by claim 1~9 any one of them method system
It is standby to be formed.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711397850.XA CN108321213A (en) | 2017-12-21 | 2017-12-21 | The preparation method and its structure of SiC power diode devices |
| PCT/CN2018/111392 WO2019119958A1 (en) | 2017-12-21 | 2018-10-23 | Preparation method for sic power diode device and structure of sic power diode device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711397850.XA CN108321213A (en) | 2017-12-21 | 2017-12-21 | The preparation method and its structure of SiC power diode devices |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108321213A true CN108321213A (en) | 2018-07-24 |
Family
ID=62893173
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201711397850.XA Pending CN108321213A (en) | 2017-12-21 | 2017-12-21 | The preparation method and its structure of SiC power diode devices |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN108321213A (en) |
| WO (1) | WO2019119958A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449085A (en) * | 2018-09-12 | 2019-03-08 | 秦皇岛京河科学技术研究院有限公司 | A kind of 4H-SiC Schottky diode and preparation method thereof that Surge handling capability is enhanced |
| CN112164726A (en) * | 2020-09-15 | 2021-01-01 | 五邑大学 | Schottky barrier diode and preparation method thereof |
| CN113555497A (en) * | 2021-06-09 | 2021-10-26 | 浙江芯国半导体有限公司 | High-mobility SiC-based graphene device and preparation method thereof |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112117336B (en) * | 2020-09-22 | 2022-04-12 | 厦门大学 | 4H-SiC ultraviolet photoelectric detector array with back-illuminated structure and preparation |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110037139A1 (en) * | 2008-03-21 | 2011-02-17 | Microsemi Corporation | Schottky barrier diode (sbd) and its off-shoot merged pn/schottky diode or junction barrier schottky (jbs) diode |
| CN102881841A (en) * | 2012-10-16 | 2013-01-16 | 北京大学 | Semiconductor photoelectric device using copper/graphene composite electrode as anode |
| CN104335328A (en) * | 2012-03-30 | 2015-02-04 | 富士电机株式会社 | Silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device manufactured by same |
| CN105977289A (en) * | 2015-03-10 | 2016-09-28 | Abb 技术有限公司 | Power semiconductor rectifier with controllable on-state voltage |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5492752A (en) * | 1992-12-07 | 1996-02-20 | Oregon Graduate Institute Of Science And Technology | Substrates for the growth of 3C-silicon carbide |
| JP2002016017A (en) * | 2000-06-27 | 2002-01-18 | Nissan Motor Co Ltd | Silicon carbide semiconductor device and method of manufacturing the same |
| JP5966556B2 (en) * | 2012-04-18 | 2016-08-10 | 富士電機株式会社 | Manufacturing method of semiconductor device |
| CN103956354A (en) * | 2014-05-09 | 2014-07-30 | 浙江大学 | Interconnecting wire with graphene serving as metallization layer and diffusion barrier layer and manufacturing method of interconnecting wire |
-
2017
- 2017-12-21 CN CN201711397850.XA patent/CN108321213A/en active Pending
-
2018
- 2018-10-23 WO PCT/CN2018/111392 patent/WO2019119958A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20110037139A1 (en) * | 2008-03-21 | 2011-02-17 | Microsemi Corporation | Schottky barrier diode (sbd) and its off-shoot merged pn/schottky diode or junction barrier schottky (jbs) diode |
| CN104335328A (en) * | 2012-03-30 | 2015-02-04 | 富士电机株式会社 | Silicon carbide semiconductor device manufacturing method and silicon carbide semiconductor device manufactured by same |
| CN102881841A (en) * | 2012-10-16 | 2013-01-16 | 北京大学 | Semiconductor photoelectric device using copper/graphene composite electrode as anode |
| CN105977289A (en) * | 2015-03-10 | 2016-09-28 | Abb 技术有限公司 | Power semiconductor rectifier with controllable on-state voltage |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109449085A (en) * | 2018-09-12 | 2019-03-08 | 秦皇岛京河科学技术研究院有限公司 | A kind of 4H-SiC Schottky diode and preparation method thereof that Surge handling capability is enhanced |
| CN112164726A (en) * | 2020-09-15 | 2021-01-01 | 五邑大学 | Schottky barrier diode and preparation method thereof |
| CN113555497A (en) * | 2021-06-09 | 2021-10-26 | 浙江芯国半导体有限公司 | High-mobility SiC-based graphene device and preparation method thereof |
| CN113555497B (en) * | 2021-06-09 | 2023-12-29 | 浙江芯科半导体有限公司 | SiC-based graphene device with high mobility and preparation method thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2019119958A1 (en) | 2019-06-27 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108321213A (en) | The preparation method and its structure of SiC power diode devices | |
| CN100557815C (en) | InAlN/GaN heterojunction enhancement type high electron mobility transistor structure and manufacture method | |
| CN1979888A (en) | Silicon carbide semiconductor device and method for producing the same | |
| CN103928532B (en) | A kind of carborundum groove MOS junction barrier schottky diode and preparation method thereof | |
| CN110379857B (en) | Switching device containing p-type gallium oxide thin layer and preparation method thereof | |
| KR101984697B1 (en) | The manufacturing for graphene structure, graphene structure and the device comprising the same | |
| CN108321212A (en) | The preparation method and its structure of SiC Schottky diode | |
| CN108346688B (en) | SiC trench junction barrier Schottky diode with CSL transport layer and manufacturing method thereof | |
| CN107170671A (en) | A kind of GaN power devices and its manufacture method based on ion implanting | |
| CN110350035A (en) | SiC MOSFET power device and preparation method thereof | |
| CN102938413A (en) | Algan/gan heterojunction enhanced device and manufacturing method thereof | |
| JP2012160485A (en) | Semiconductor device and manufacturing method of the same | |
| CN107785250B (en) | Silicon carbide-based Schottky contact manufacturing method and Schottky diode manufacturing method | |
| CN107369720A (en) | A kind of p-type diamond height barrier Schottky diode and preparation method thereof | |
| CN103681256B (en) | A kind of silicon carbide MOSFET device and preparation method thereof | |
| CN103928524B (en) | Carborundum UMOSFET devices and preparation method with N-type drift layer table top | |
| CN103928345B (en) | Ion implanting forms the UMOSFET preparation method of N-type heavy doping drift layer table top | |
| CN107919390A (en) | Based on WO3The diamond field effect transistor and production method of gate medium | |
| JP2019534553A (en) | Method for manufacturing insulating layer on silicon carbide and semiconductor device | |
| CN109686667A (en) | A kind of SiC base MOS device and its preparation method and application | |
| CN206907738U (en) | A kind of GaN power devices based on ion implanting | |
| CN107919395A (en) | Based on CaF2The zero grid source spacing diamond field effect transistor and production method of gate medium | |
| CN107425051A (en) | A kind of semiconductor devices and preparation method thereof | |
| CN109285894A (en) | A kind of diamond Quito channel potential barrier regulates and controls field effect transistor and preparation method thereof | |
| CN104979195B (en) | The preparation method of SiC Base HEMT device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB03 | Change of inventor or designer information | ||
| CB03 | Change of inventor or designer information |
Inventor after: Hou Tongxiao Inventor after: Shao Jinwen Inventor after: Jia Renxu Inventor after: Yuan Lei Inventor after: Tang Xiaoyan Inventor before: Jia Renxu Inventor before: Shao Jinwen Inventor before: Hou Tongxiao Inventor before: Yuan Lei Inventor before: Tang Xiaoyan |
|
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20180724 |