CN108258027A - 一种超级结功率晶体管及其制备方法 - Google Patents

一种超级结功率晶体管及其制备方法 Download PDF

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CN108258027A
CN108258027A CN201611236171.XA CN201611236171A CN108258027A CN 108258027 A CN108258027 A CN 108258027A CN 201611236171 A CN201611236171 A CN 201611236171A CN 108258027 A CN108258027 A CN 108258027A
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epitaxial layer
substrate epitaxial
power transistor
super junction
junction power
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刘磊
刘伟
袁愿林
龚轶
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Suzhou Dongwei Semiconductor Co Ltd
Suzhou Oriental Semiconductor Co Ltd
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Suzhou Dongwei Semiconductor Co Ltd
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Priority to CN201611236171.XA priority Critical patent/CN108258027A/zh
Priority to KR1020187033584A priority patent/KR20180135035A/ko
Priority to US16/304,827 priority patent/US20190280119A1/en
Priority to JP2018563060A priority patent/JP2019517738A/ja
Priority to DE112017001821.8T priority patent/DE112017001821T5/de
Priority to PCT/CN2017/118965 priority patent/WO2018121600A1/zh
Publication of CN108258027A publication Critical patent/CN108258027A/zh
Pending legal-status Critical Current

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Abstract

本发明提供了一种超级结功率晶体管及其制备方法，设置双层衬底外延层结构，并在第一衬底外延层内形成超级结结构，在第二衬底外延层内形成复合栅极结构，解决了现有技术中超级结功率晶体管无法同时改善击穿电压和降低其导通电阻的技术问题。本发明提供的超级结功率晶体管，包括第一掺杂类型的第一衬底外延层和设置于所述第一衬底外延层之上的第一掺杂类型的第二衬底外延层，所述第一衬底外延层内形成有第一掺杂类型的漏区和多个第二掺杂类型的柱状外延掺杂区，所述第二衬底外延层内设有多个沟槽，在所述沟槽中形成有复合栅极结构，相邻所述沟槽之间的第二衬底外延层内设有第二掺杂类型的体区，所述体区内设有第一掺杂类型的源区。

Description

一种超级结功率晶体管及其制备方法
技术领域
本发明属于半导体功率器件技术领域，特别是涉及一种超级结功率晶体管及其制备方法。
背景技术
超级结功率晶体管是在衬底外延层内形成多个柱状外延掺杂区，柱状外延掺杂区与衬底外延层具有相反的掺杂类型，在柱状外延掺杂区与衬底外延层之间载流子容易互相耗尽从而提高超级结功率晶体管的击穿电压。现有技术中，超级结功率器件的制备方法通常是先在衬底外延层内形成若干凹槽，然后进行衬底外延层材料生长从而在凹槽内形成柱状外延掺杂区，然后在柱状外延掺杂区的顶部形成体区，并在体区内形成源区。现有技术的技术缺陷是如果保持超级结功率晶体管的导通电阻不变，其击穿电压就无法持续提高，而如果通过提高衬底外延层的厚度来改善击穿电压，其导通电阻就会变大。
发明内容
有鉴于此，本发明实施例提供了一种超级结功率晶体管及其制备方法，设置双层衬底外延层结构，并在第一衬底外延层内形成超级结结构，在第二衬底外延层内形成复合栅极结构，解决了现有技术中超级结功率晶体管无法同时改善击穿电压和降低其导通电阻的技术问题。
本发明一实施例提供的一种超级结功率晶体管，包括第一掺杂类型的第一衬底外延层和设置于所述第一衬底外延层之上的第一掺杂类型的第二衬底外延层，所述第一衬底外延层内形成有第一掺杂类型的漏区和多个第二掺杂类型的柱状外延掺杂区，所述第二衬底外延层内设有多个沟槽，在所述沟槽中形成有复合栅极结构，相邻所述沟槽之间的第二衬底外延层内设有第二掺杂类型的体区，所述体区内设有第一掺杂类型的源区。
其中，所述第二衬底外延层内的复合栅极结构数量大于所述第一衬底外延层内的柱状外延掺杂区数量。
其中，所述复合栅极结构依次设于所述柱状外延掺杂区之上和所述相邻的柱状外延掺杂区之间的第一衬底外延层之上。
其中，所述第二衬底外延层的掺杂浓度大于所述第一衬底外延层的掺杂浓度。
其中，所述沟槽包括同方向的上部沟槽和开口位于所述上部沟槽底部的下部沟槽，所述复合栅极结构包括栅极、栅氧化层、分栅和场氧化层，所述栅氧化层设置于所述上部沟槽的内表面，所述栅极设置于所述上部沟槽的相对侧壁上并覆盖所述栅氧化层，所述场氧化层设置于所述栅极的相对表面和所述下部沟槽的内表面，所述分栅设置于所述场氧化层所围成的容纳空间中。
其中，所述上部沟槽的宽度大于所述下部沟槽的宽度。
其中，所述分栅通过导电层与所述源区连接。
其中，所述第一掺杂类型为P型掺杂，所述第二掺杂类型为N型掺杂；或者所述第一掺杂类型为N型掺杂，所述第二掺杂类型为P型掺杂。
本发明一实施例提供的一种超级结功率晶体管的制备方法，包括：
在第一衬底外延层内形成多个柱状外延掺杂区；
在所述第一衬底外延层之上形成第二衬底外延层；
在所述第二衬底外延层之上形成硬掩膜层，对所述硬掩膜层进行刻蚀形成硬掩膜层的开口；
对所述第二衬底外延层进行刻蚀，在所述第二衬底外延层内形成多个第一沟槽；
在所述第一沟槽的内表面形成栅氧化层；
在所述第一沟槽的相对侧壁上形成栅极；
刻蚀掉暴露出的栅氧化层，并对所述第二衬底外延层进行刻蚀形成第二沟槽；
覆盖所述第二沟槽的内表面和所述栅极的相对表面形成场氧化层，并在所述场氧化层所围成的容纳空间中形成分栅；
在所述第二衬底外延层内形成体区，并在所述体区内形成源区；
在所述第一衬底外延层的底部形成漏区。
其中，在形成所述第一沟槽时，通过增加横向的刻蚀使得所形成的第一沟槽的宽度大于所述硬掩膜层的开口的宽度。
其中，所述第二衬底外延层内的第一沟槽的数量大于所述第一衬底外延层内的柱状外延掺杂区数量。
其中，所述第二衬底外延层与所述第一衬底外延层的掺杂类型相同，且所述第二衬底外延层的掺杂浓度大于所述第一衬底外延层的掺杂浓度。
本发明实施例提供的超级结功率晶体管及其制备方法，采用双层衬底外延层结构，其中，在第一衬底外延层内形成柱状外延掺杂区，在第二衬底外延层内可形成比柱状外延掺杂区数量更多的复合栅极结构，从而可以形成更多的电流沟道，降低了超级结功率晶体管的导通电阻；同时，使第二衬底外延层的浓度大于第一衬底外延层的掺杂浓度，从而能够提高超级结功率晶体管的击穿电压。另外，通过在第二衬底外延层内挖沟槽结构并自对准地实现栅极和分栅，减小了栅极和漏极之间的重叠面积，从而大大降低了栅极和漏极之间的电容，加快了超级结功率晶体管的开关速度。
附图说明
图1所示为本发明一实施例提供的一种超级结功率晶体管的剖视结构示意图。
图2所示为本发明一实施例提供的一种超级结功率晶体管的制备方法的流程示意图。
图3所示为本发明另一实施例提供的一种超级结功率晶体管的制备方法的流程示意图。
图4所示为本发明一实施例提供的一种超级结功率晶体管的制备方法中步骤10所示的结构示意图。
图5所示为本发明一实施例提供的一种超级结功率晶体管的制备方法中步骤2001所示的结构示意图。
图6所示为本发明一实施例提供的一种超级结功率晶体管的制备方法中步骤2002所示的结构示意图。
图7所示为本发明一实施例提供的一种超级结功率晶体管的制备方法中步骤2003所示的结构示意图。
图8所示为本发明一实施例提供的一种超级结功率晶体管的制备方法中步骤2004所示的结构示意图。
图9所示为本发明一实施例提供的一种超级结功率晶体管的制备方法中步骤30所示的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
应当理解，本发明所使用的诸如“具有”、“包含”以及“包括”术语并不配出一个或多个其它元件或其组合的存在或添加。同时，为清楚地说明本发明的具体实施方式，说明书附图中所列示意图，放大了本发明所述的层和区域的厚度，且所列图形大小并不代表实际尺寸；说明书附图是示意性的，不应限定本发明的范围。说明书中所列实施例不应仅限于说明书附图中所示区域的特定形状，而是包括所得到的形状如制备引起的偏差等，如刻蚀得到的曲线通常具有弯曲或圆润的特点，在本发明实施例中均以矩形表示。
本领域的技术人员应该理解，超级结功率晶体管包括元胞区和终端区，其中，元胞区用于获得低导通电阻，终端区用于提高元胞区中最边缘的元胞的耐压。终端区是超级结功率晶体管中的通用结构，根据不同产品的要求有不同的设计结构，在本发明实施列中不再展示和描述超级结功率晶体管的终端区的具体结构。本发明实施例中所述的超级结功率晶体管结构指的是超级结功率晶体管中元胞区的结构。
图1所示为本发明一实施例提供的一种超级结功率晶体管的剖视结构示意图。如图1所示，该超级结功率晶体管包括第一掺杂类型的第一衬底外延层200和第一掺杂类型的第二衬底外延层201，其中，由该第一衬底外延层200的顶部向第一衬底外延层200内设置有与第一衬底外延层200的杂质形成电荷平衡的多个第二掺杂类型的柱状外延掺杂区202。
对于第一衬底外延层200的材质，优选为硅，但不局限于为硅。
本发明中所述第一掺杂类型和第二掺杂类型为相反的掺杂类型，即若第一掺杂类型为N型掺杂，则第二掺杂类型为P型掺杂；若第一掺杂类型为P型掺杂，则第二掺杂类型为N型掺杂。
对于第一衬底外延层200内柱状外延掺杂区202的数量，虽然在本实施例中仅示出两个，但其数量多少可根据具体产品设计要求确定，本发明对此不做具体限定。
如图1所示，第二衬底外延层201设置于第一衬底外延层200之上，由该第二衬底外延层201的顶部向第二衬底外延层201内开设有若干个沟槽，该沟槽中形成有复合栅极结构，该复合栅极结构具体包括栅极204、栅氧化层203、分栅206和场氧化层205。在本发明一实施例中，所述沟槽包括同方向的上部沟槽和开口位于上部沟槽底部的下部沟槽，其中，栅氧化层203设置于上部沟槽的内表面，栅极204设置于上部沟槽的相对侧壁上并覆盖栅氧化层203,场氧化层205设置于栅极204的相对表面和下部沟槽的内表面上，分栅206设置于场氧化层205所围成的容纳空间中。
优选地，分栅206的上表面低于栅极204的上表面。
为优化器件的栅极结构和制备工艺，上部沟槽的宽度可以大于下部沟槽的宽度。
对于第二衬底外延层201的材质，优选为与第一衬底外延层200的材质一致，当然，也可以不一致，本发明对此不作具体限定。在本发明一实施例中，第二衬底外延层201的掺杂浓度大于第一衬底外延层200的掺杂浓度，这样可以提高器件的击穿电压。
对于第二衬底外延层201内的复合栅极结构，在本发明一较优的实施例中，其数量大于第一衬底外延层200内柱状外延掺杂区202的数量，这样可以增加器件的电流沟道数量，降低器件的导通电阻。对于复合栅极结构的位置，其可设置于第二衬底外延层201内柱状外延掺杂区202之上和相邻柱状外延掺杂区202之间的第一衬底外延层200之上。
如图1所示，第二衬底外延层201内还设置有第二掺杂类型的体区207，该体区207设置于相邻的复合栅极结构之间，体区207内设置有第一掺杂类型的源区208。在本发明一实施例中，如图1所示，体区207的底部与上部沟槽的底部处于同一平面上，即该平面之上同时存在栅氧化层203、栅极204、场氧化层205以及分栅206；而下部沟槽低于该平面，该平面之下同时存在场氧化层205和分栅206而没有栅氧化层203及栅极204。
在本发明一实施例中，如图1所示，第一衬底外延层200的底部设置有第一掺杂类型的漏区210。
在超级结功率晶体管中，还包括起到电性隔离作用的绝缘介质层(未在图中标示)，该绝缘介质层内部设有接触孔，接触孔中填充有金属层形成欧姆接触。此为现有技术中的通用结构，在本发明实施列中不再进行示意和详细描述。
优选的，在本发明一实施例中，分栅206与源区208通过金属层(即导电层)连接。
本发明实施例提供的超级结功率晶体管采用双层衬底外延层结构，其中，在第一衬底外延层内形成柱状外延掺杂区，在第二衬底外延层内可形成比柱状外延掺杂区数量更多的复合栅极结构，从而可以形成更多的电流沟道，降低了超级结功率晶体管的导通电阻；同时，将第二衬底外延层的浓度设置为大于第一衬底外延层的掺杂浓度，从而能够提高超级结功率晶体管的击穿电压。另外，通过在第二衬底外延层内挖沟槽结构并自对准地实现栅极和分栅，减小了栅极和漏极之间的重叠面积，从而大大降低了栅极和漏极之间的电容，加快了超级结功率晶体管的开关速度。
本发明实施例还提供了一种超级结功率晶体管的制备方法。如图2所示，该方法包括以下步骤：
步骤10：如图4所示，由第一衬底外延层200内的顶部向第一衬底外延层200内形成多个柱状外延掺杂区202。
其具体工艺步骤包括：在第一衬底外延层200的表面形成硬掩膜层，该硬掩膜层通常为ONO结构，包括依次叠加于第一衬底外延层200表面的第一氧化层、第二氮化层以及第三氧化层；然后通过光刻工艺定义出柱状外延掺杂区202所在凹槽的位置，并将凹槽位置处的硬掩膜层去除，以刻蚀后剩余的硬掩膜层为掩膜对第一衬底外延层200进行刻蚀，从而在第一衬底外延层200内形成若干个凹槽；最后在凹槽内进行衬底外延层材料的生长，并进行平坦化处理从而形成柱状外延掺杂区202。
在本发明一实施例中，第一衬底外延层200的掺杂类型为第一掺杂类型，柱状外延掺杂区202的掺杂类型为第二掺杂类型。其中，第一掺杂类型与第二掺杂类型为相反的掺杂类型，优选的，该第一掺杂类型为N型，第二掺杂类型为P型。
步骤20：在第一衬底外延层200之上形成第二衬底外延层201，由第二衬底外延层201的顶部向第二衬底外延层201内形成多个沟槽，并在该沟槽中形成复合栅极结构。对于该步骤20，如图3所示，具体包括如下步骤：
步骤2001：如图5所示，在第一衬底外延层200之上形成第二衬底外延层201，并由第二衬底外延层201的顶部向第二衬底外延层201内进行刻蚀形成多个第一沟槽。
其中，第二衬底外延层201的掺杂类型为与第一衬底外延层200相同的第一掺杂类型。优选地，第二衬底外延层201的掺杂浓度大于第一衬底外延层200的掺杂浓度，从而提高了超级结功率晶体管的击穿电压。
在一实施例中，形成上述第一沟槽的具体工艺步骤包括：在第二衬底外延层201之上形成硬掩膜层300，然后对硬掩膜层300进行刻蚀，在硬掩膜层300内形成硬掩膜层300的开口，最后以硬掩膜层300为掩膜对第二衬底外延层201进行刻蚀从而形成若干第一沟槽。在本发明一较优的实施例中，采用等离子体刻蚀和湿法刻蚀相结合的方法或者采用垂直的等离子体刻蚀和倾斜的等离子体刻蚀相结合的方法，通过增加横向的刻蚀使得该第一沟槽的宽度大于硬掩膜层300的开口的宽度。
优选地，通过对光刻掩膜版进行控制，使得形成在第二衬底外延层201内的第一沟槽的数量大于形成在第一衬底外延层200内柱状外延掺杂区202的数量，从而增加后续所形成的复合栅极结构数量，能够增加器件的电流沟道数量，降低器件的导通电阻。
步骤2002：如图6所示，进行氧化，在第一沟槽的内表面形成栅氧化层203，然后淀积第一导电薄膜并回刻，在第一沟槽的相对侧壁上形成栅极204。
步骤2003：如图7所示，以硬掩膜层300为掩膜，刻蚀掉第一沟槽内两侧栅极204间暴露出的栅氧化层203，同时，继续对下方的第二衬底外延层201进行刻蚀，以形成位于第一沟槽之下的第二沟槽。
在本发明一实施例中，第一沟槽(即上部沟槽)的宽度大于第二沟槽(即下部沟槽)的宽度。
步骤2004：如图8所示，淀积一层绝缘薄膜，形成场氧化层205以覆盖第二沟槽的内表面和栅极204的相对表面，然后淀积第二导电薄膜并回刻，在场氧化层205所围成的容纳空间中形成分栅206，之后对场氧化层205和硬掩膜层300进行刻蚀。
步骤30：如图9所示，在第二衬底外延层201内相邻的第一沟槽间进行离子注入以形成体区207，并通过光刻工艺定义源区208的位置，然后在该体区207内进行与体区207相反掺杂类型的离子注入以形成源区208。
在本发明一实施例中，该源区208的掺杂类型为与第一衬底外延层200和第二衬底外延层201相同的第一掺杂类型，体区207的掺杂类型则为第二掺杂类型。优选地，该体区207的底部与第一沟槽的底部处于同一水平面上。
最后，覆盖所形成的结构淀积绝缘介质层，该绝缘介质层的材质优选的为硅玻璃、硼磷硅玻璃或磷硅玻璃，之后通过光刻工艺定义接触孔的位置，然后刻蚀所述绝缘介质层形成接触孔，然后进行第二掺杂类型的离子注入并淀积金属层形成欧姆接触，然后刻蚀所述金属层以形成源电极和栅电极，同时使得分栅206与栅电极204通过金属层连接；之后，在第一衬底外延层200内形成第一掺杂类型的漏区，并淀积金属层形成漏电极。以上工艺均为业界所熟知的，本发明实施列中不再详细描述。
本发明实施例提供的超级结功率晶体管的制备方法，制备双层衬底外延层结构，可通过在第二衬底外延层内形成比第一衬底外延层内柱状外延掺杂区数量更多的复合栅极结构，从而形成更多的电流沟道，降低了超级结功率晶体管的导通电阻；同时，通过将第二衬底外延层的掺杂浓度设置成大于第一衬底外延层的掺杂浓度，提高了超级结功率晶体管的击穿电压。另外，通过在第二衬底外延层内挖沟槽结构并自对准地实现栅极和分栅，减小了栅极和漏极之间的重叠面积，从而大大降低了栅极和漏极之间的电容，加快了超级结功率晶体管的开关速度。
以上具体实施方式及实施例是对本发明提出的一种超结功率器件及其制备方法技术思想的具体支持，不能以此限定本发明的保护范围，凡是按照本发明提出的技术思想，在本技术方案基础上所做的任何等同变化或等效的改动，均仍属于本发明技术方案保护的范围。
尽管本发明的实施方案已公开如上，但其并不仅仅限于说明书和实施方式中所列运用，它完全可以被适用于各种适合本发明的领域，对于熟悉本领域的人员而言，可容易地实现另外的修改，因此在不背离权利要求及等同范围所限定的一般概念下，本发明并不限于特定的细节和这里示出与描述的图例。

Claims (13)

1.一种超级结功率晶体管，其特征在于，包括第一掺杂类型的第一衬底外延层和设置于所述第一衬底外延层之上的第一掺杂类型的第二衬底外延层，所述第一衬底外延层内形成有第一掺杂类型的漏区和多个第二掺杂类型的柱状外延掺杂区，所述第二衬底外延层内设有多个沟槽，在所述沟槽中形成有复合栅极结构，相邻所述沟槽之间的第二衬底外延层内设有第二掺杂类型的体区，所述体区内设有第一掺杂类型的源区。
2.如权利要求1所述的超级结功率晶体管，其特征在于，所述第二衬底外延层内的复合栅极结构数量大于所述第一衬底外延层内的柱状外延掺杂区数量。
3.如权利要求2所述的超级结功率晶体管，其特征在于，所述复合栅极结构依次设于所述柱状外延掺杂区之上和所述相邻的柱状外延掺杂区之间的第一衬底外延层之上。
4.如权利要求1所述的超级结功率晶体管，其特征在于，所述第二衬底外延层的掺杂浓度大于所述第一衬底外延层的掺杂浓度。
5.如权利要求1所述的超级结功率晶体管，其特征在于，所述沟槽包括同方向的上部沟槽和开口位于所述上部沟槽底部的下部沟槽，所述复合栅极结构包括栅极、栅氧化层、分栅和场氧化层，所述栅氧化层设置于所述上部沟槽的内表面，所述栅极设置于所述上部沟槽的相对侧壁上并覆盖所述栅氧化层，所述场氧化层设置于所述栅极的相对表面和所述下部沟槽的内表面，所述分栅设置于所述场氧化层所围成的容纳空间中。
6.如权利要求5所述的超级结功率晶体管，其特征在于，所述上部沟槽的宽度大于所述下部沟槽的宽度。
7.如权利要求5所述的超级结功率晶体管，其特征在于，所述分栅通过导电层与所述源区连接。
8.如权利要求1所述的超级结功率晶体管，其特征在于，所述第一掺杂类型为P型掺杂，所述第二掺杂类型为N型掺杂。
9.如权利要求1所述的超级结功率晶体管，其特征在于，所述第一掺杂类型为N型掺杂，所述第二掺杂类型为P型掺杂。
10.一种超级结功率晶体管的制备方法，其特征在于，包括：
在第一衬底外延层内形成多个柱状外延掺杂区；
在所述第一衬底外延层之上形成第二衬底外延层；
在所述第二衬底外延层之上形成硬掩膜层，对所述硬掩膜层进行刻蚀形成硬掩膜层的开口；
对所述第二衬底外延层进行刻蚀，在所述第二衬底外延层内形成多个第一沟槽；
在所述第一沟槽的内表面形成栅氧化层；
在所述第一沟槽的相对侧壁上形成栅极；
刻蚀掉暴露出的栅氧化层，并对所述第二衬底外延层进行刻蚀形成第二沟槽；
覆盖所述第二沟槽的内表面和所述栅极的相对表面形成场氧化层，并在所述场氧化层所围成的容纳空间中形成分栅；
在所述第二衬底外延层内形成体区，并在所述体区内形成源区；
在所述第一衬底外延层的底部形成漏区。
11.如权利要求10所述的一种超级结功率晶体管的制备方法，其特征在于，在形成所述第一沟槽时，通过增加横向的刻蚀使得所形成的第一沟槽的宽度大于所述硬掩膜层的开口的宽度。
12.如权利要求10所述的一种超级结功率晶体管的制备方法，其特征在于，所述第二衬底外延层内的第一沟槽的数量大于所述第一衬底外延层内的柱状外延掺杂区数量。
13.如权利要求10所述的一种超级结功率晶体管的制备方法，其特征在于，所述第二衬底外延层与所述第一衬底外延层的掺杂类型相同，且所述第二衬底外延层的掺杂浓度大于所述第一衬底外延层的掺杂浓度。
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