CN108009065B

CN108009065B - Method and apparatus for monitoring AXI bus

Info

Publication number: CN108009065B
Application number: CN201610932607.2A
Authority: CN
Inventors: 罗浩; 石义军; 王文楠
Original assignee: Shenzhen ZTE Microelectronics Technology Co Ltd
Current assignee: Shenzhen ZTE Microelectronics Technology Co Ltd
Priority date: 2016-10-31
Filing date: 2016-10-31
Publication date: 2020-02-07
Anticipated expiration: 2036-10-31
Also published as: WO2018076650A1; CN108009065A

Abstract

The invention discloses a method for monitoring an AXI bus, which is applied to a device for monitoring the AXI bus, wherein in the device for monitoring the AXI bus, a monitoring main module is connected with a monitoring slave module in series through a serial protocol interface line to form a closed loop consisting of the monitoring main module and the monitoring slave module, and the method comprises the following steps: the monitoring main module receives a serial protocol command sent by a chip to be detected; converting the serial protocol command into a custom serial bit frame command; sending a self-defined serial bit frame command to a monitoring slave module; the monitoring slave module converts the self-defined serial bit frame command into a general parallel data read-write interface command; monitoring an AXI bus of a chip to be detected according to a general parallel data read-write interface command to obtain state information of the AXI bus; sending the state information of the AXI bus to a monitoring main module; and the monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus. The invention also discloses a device for monitoring the AXI bus.

Description

Method and apparatus for monitoring AXI bus

Technical Field

The present invention relates to an advanced extensible Interface (AXI) bus technology of a System on a Chip (SoC), and more particularly, to a method and an apparatus for monitoring an AXI bus.

Background

Once the chip is produced, the chip is a black box from the outside, the observation and debugging means are very limited, and unlike software, the chip can be debugged by modifying a program at any time or by setting a plurality of breakpoints step by step; for the FPGA, some useful waveforms can be captured in real time through waveform capturing software to observe the working state in the FPGA, and the waveforms to be captured are also realized through programming; at present, a chip usually adopts an SoC system, and an AXI bus is used for data transmission, wherein the AXI bus is an on-chip bus with high performance, high bandwidth and low delay.

Fig. 1 is a schematic structural diagram of an AXI bus interconnection in a typical SoC system, in the typical SoC system shown in fig. 1, 3 masters (master modules) and 4 slave modules are hung on the AXI bus; for example, the following scenario may occur in an application: master0 wants to initiate a write access to slave2, and then master2 reads the data that was previously updated into slave2 away, but after master2 reads the data back, it finds the data that is not expected; in the SoC system adopting the AXI bus, the fault may be that the AXI bus is hung up, the response is wrong or other reasons, so the field is protected as much as possible in the process of positioning the problem; however, there is no effective method for monitoring the AXI bus, and once a problem occurs in an SoC chip with a large function, the difficulty of locating the problem is large.

Disclosure of Invention

In view of this, embodiments of the present invention are expected to provide a method and an apparatus for monitoring an AXI bus, so as to determine a state of each monitoring point, locate a monitoring point with a problem, reduce a problem range, greatly reduce difficulty in problem location, and increase debugging efficiency in a number of stages.

In order to achieve the purpose, the technical scheme of the invention is realized as follows:

the invention provides a method for monitoring an advanced extensible interface (AXI) bus, which is applied to a device for monitoring the AXI bus, wherein a monitoring master module is connected with a monitoring slave module in series through a serial protocol interface line to form a closed loop consisting of the monitoring master module and the monitoring slave module, and the method comprises the following steps:

the monitoring main module receives a serial protocol command sent by a chip to be detected; converting the serial protocol command into a custom serial bit frame command; sending the custom serial bit frame command to the monitoring slave module;

the monitoring master module receives the state information of the AXI bus sent by the monitoring slave module; the state information of the AXI bus is obtained by converting the self-defined serial bit frame command into a universal parallel data read-write interface command through the monitoring slave module and monitoring the AXI bus of the chip to be detected according to the universal parallel data read-write interface command;

and the monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus.

In the foregoing solution, the custom serial bit frame command includes: the system comprises a starting position, the monitoring master module identification number ID, a read-write indication, the monitoring slave module identification number ID, an offset address and an ending position.

In the above scheme, the converting the self-defined serial bit frame command into a general parallel data read/write interface command by the monitoring slave module, and monitoring the AXI bus of the chip to be detected according to the general parallel data read/write interface command includes:

the monitoring slave module completes the configuration of read-write control information according to the general parallel data read-write interface command, realizes the multiplexing of read-write channel signals of the AXI bus, completes the collection and verification of the signals of the AXI bus, and completes the state monitoring and the setting, starting, recording and clearing of the grabbing of the AXI bus.

In the foregoing solution, the read/write control information includes: the read-write control information of the aw, w, b, ar and r five data channels and the read-write control information of the addr, data and resp three types.

In the above-mentioned scheme, the first step of the method,

if the number of the monitoring master modules is one and the number of the monitoring slave modules is two or more, the monitoring slave modules are connected in series through the serial protocol interface line to form a monitoring slave module queue with an opening, and the monitoring master modules and the monitoring slave module queue with the opening form a closed loop through the serial protocol interface line;

if the number of the monitoring master modules is two or more than two and the number of the monitoring slave modules is one, the monitoring master modules are connected in series through the serial protocol interface line to form a monitoring master module queue with an opening, and the monitoring master module queue with the opening and the monitoring slave modules are connected in series through the serial protocol interface line to form a closed loop;

if the number of the monitoring master modules is two or more than two, and the number of the monitoring slave modules is two or more than two, the monitoring master modules are connected in series through the serial protocol interface line to form a monitoring master module queue with an opening, the monitoring slave modules are connected in series through the serial protocol interface line to form a monitoring slave module queue with an opening, and the monitoring master module queue with an opening and the monitoring slave module queue with an opening are connected in series through the serial protocol interface line to form a closed loop.

The present invention also provides an apparatus for monitoring an advanced extensible interface AXI bus, the apparatus comprising: the monitoring master module and the monitoring slave module; the monitoring master module is connected with the monitoring slave module in series through a serial protocol interface line to form a closed loop formed by the monitoring master module and the monitoring slave module;

the monitoring master module is used for receiving a serial protocol command sent by a chip to be detected, converting the serial protocol command into a self-defined serial bit frame command and sending the self-defined serial bit frame command to the monitoring slave module;

the monitoring slave module is used for converting the self-defined serial bit frame command into a universal parallel data read-write interface command, monitoring an AXI bus of the chip to be detected according to the universal parallel data read-write interface command to obtain state information of the AXI bus, and sending the state information of the AXI bus to the monitoring master module;

the monitoring main module is further configured to determine the state of the AXI bus of the chip to be detected according to the state information of the AXI bus.

In the foregoing solution, the monitoring slave module includes:

the conversion unit is used for converting the self-defined serial bit frame command into a general parallel data read-write interface command;

a monitoring unit, wherein the monitoring unit comprises:

the configuration subunit is used for completing the configuration of the read-write control information according to the general parallel data read-write interface command;

a multiplexing subunit, configured to implement multiplexing of read-write channel signals of the AXI bus;

a collection and check subunit, configured to complete collection and check of signals of the AXI bus;

a processing subunit, configured to complete setting, starting, recording, and clearing of the state monitoring and capturing of the AXI bus.

In the above-mentioned scheme, the first step of the method,

According to the method and the device for monitoring the AXI bus, the serial protocol command sent by the chip to be detected is received by the monitoring main module, the serial protocol command is converted into the self-defined serial bit frame command, and the self-defined serial bit frame command is sent to the monitoring slave module; the monitoring master module receives the state information of the AXI bus sent by the monitoring slave module; the state information of the AXI bus is obtained by converting a self-defined serial bit frame command into a universal parallel data read-write interface command through a monitoring slave module and monitoring the AXI bus of a chip to be detected according to the universal parallel data read-write interface command; the monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus; the problem locating method and the device have the advantages that the state of each monitoring point is determined, the monitoring point with the problem is located, the problem range can be reduced, once the monitoring point is located within a small range, the problem locating difficulty is greatly reduced, and debugging efficiency can be increased in a level-to-level mode.

Drawings

FIG. 1 is a schematic diagram of an AXI bus interconnect in a typical SoC system;

FIG. 2a is a flowchart of a first embodiment of a method for monitoring an AXI bus according to the present invention;

FIG. 2b is a block diagram of a first embodiment of a method for monitoring an AXI bus according to the present invention;

FIG. 3a is a flowchart of a second embodiment of a method for monitoring an AXI bus according to the present invention;

FIG. 3b is a diagram of a first block diagram of a second method embodiment of monitoring an AXI bus according to the present invention;

FIG. 3c is a block diagram of a second embodiment of a method for monitoring an AXI bus according to the present invention;

fig. 4 is a structural diagram of a custom serial bit frame command of a second embodiment of the method for monitoring an AXI bus according to the present invention;

FIG. 5 is a block diagram of a monitoring slave according to a second embodiment of the method for monitoring an AXI bus of the present invention;

fig. 6 is a working state diagram of a monitoring unit in a monitoring slave module according to a second embodiment of the method for monitoring an AXI bus of the present invention;

fig. 7 is a flow chart of a configuration of a single trigger for sampling ar channel data and setting addr as a matching item by a monitoring unit in a monitoring slave module according to a second embodiment of the method for monitoring an AXI bus of the present invention;

fig. 8 is a flow chart of a configuration of multiple triggers of sampling w channel data and setting data as a matching entry by a monitoring unit in a monitoring slave module according to a second embodiment of the method for monitoring an AXI bus of the present invention;

fig. 9 is a flow chart of a configuration of multiple triggers of sampling w channel response and setting resp as a matching item by a monitoring unit in a monitoring slave module according to a second embodiment of the method for monitoring an AXI bus of the present invention;

fig. 10 is a schematic structural diagram of an apparatus for monitoring an AXI bus according to an embodiment of the present invention.

Detailed Description

The main idea of the invention is as follows: aiming at the characteristics of the SoC system, namely, all the devices connected to the SoC system, no matter the master or the slave, are communicated with each other through the same interface protocol; therefore, the reading and writing process of the data is divided into a plurality of stages, a monitoring point is set for each stage, the range of problems is reduced, and once the problem is positioned in a small range, the difficulty of problem positioning is greatly reduced.

For example, for the AXI bus interconnect scenario of fig. 1, the process of read and write operations may be divided into 2 phases: a write operation of master0, a read operation of master 2; further, the write operation of master0 can be divided into master0 to AXI bus, AXI bus to slave 2; further, the read operation of master2 can be divided into master2 to AXI bus, AXI bus to slave 2; if the 4 stages are corresponded, each stage is provided with a monitoring point, the problem-outputting range is further reduced, and once the problem is positioned within a small range, the problem positioning difficulty is greatly reduced.

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

Fig. 2a is a flowchart of a first embodiment of a method for monitoring an AXI bus according to the present invention, fig. 2b is a structural diagram of a first embodiment of a method for monitoring an AXI bus according to the present invention, and as shown in fig. 2b, the method for monitoring an AXI bus according to the present invention is applied to an apparatus for monitoring an AXI bus, in the apparatus for monitoring an AXI bus, a monitoring master module (mon _ master) is connected in series with a monitoring slave module (mon _ slave) through a serial protocol interface line to form a closed loop consisting of the monitoring master module (mon _ master) and the monitoring slave module (mon _ slave); here, the number of the monitoring master (mon _ master) and the monitoring slave (mon _ slave) in the device for monitoring the AXI bus may be set according to actual requirements, and is not limited herein, but the following conditions need to be satisfied.

If the number of the monitoring master modules (mon _ master) is one and the number of the monitoring slave modules (mon _ slave) is two or more, the monitoring slave modules (mon _ slave) are connected in series through a serial protocol interface line to form a monitoring slave module queue with an opening, and the monitoring master modules and the monitoring slave module queue with the opening form a closed loop through the serial protocol interface line;

if the number of the monitoring master modules (mon _ master) is two or more and the number of the monitoring slave modules (mon _ slave) is one, the monitoring master modules (mon _ master) are connected in series through the serial protocol interface line to form a monitoring master module (mon _ master) queue with an opening, and the monitoring master module queue (mon _ master) with the opening and the monitoring slave modules (mon _ slave) are connected in series through the serial protocol interface line to form a closed loop;

if the number of the monitoring master modules (mon _ master) is two or more, and the number of the monitoring slave modules (mon _ slave) is two or more, the monitoring master modules (mon _ master) are connected in series through the serial protocol interface line to form a monitoring master module (mon _ master) queue with an opening, the monitoring slave modules (mon _ slave) are connected in series through the serial protocol interface line to form a monitoring slave module (mon _ slave) queue with an opening, and the monitoring master module queue with an opening and the monitoring slave module (mon _ slave) queue with an opening are connected in series through the serial protocol interface line to form a closed loop.

The line may be self-defined, or may adopt a currently standardized protocol, such as Universal Asynchronous Receiver/Transmitter (UART) protocol, for example, the reason for adopting the line is 3 points: firstly, the monitoring is used, the protocol is simple, and an interface which is too complex is easy to make mistakes; secondly, the demand of monitoring flow is low, and a low-speed protocol can be sufficiently used; and thirdly, the number of the interface signal lines is small, because the monitoring nodes are distributed in the whole chip, if the number of the interface signal lines is too large, the whole monitoring interface penetrates through the whole chip, and the difficulty of rear-end wiring is increased.

Since the function of each monitoring master module (mon _ master) and the function of each monitoring slave module (mon _ slave) are the same, in the present embodiment, one monitoring master module (mon _ master) and one monitoring slave module (mon _ slave) are used for illustration.

As shown in fig. 2a, the method for monitoring an AXI bus according to an embodiment of the present invention includes the following steps:

step 101, the monitoring master module receives a serial protocol command sent by a chip to be detected, converts the serial protocol command into a custom serial bit frame command, and sends the custom serial bit frame command to the monitoring slave module.

The monitoring main module (mon _ master) is connected with the chip to be detected through a simple serial protocol interface line and receives a serial protocol command sent by the chip to be detected; secondly, the serial protocol command is converted into a self-defined serial bit frame command, namely, the conversion from an external debugging interface of the chip to be detected to an internal self-defined serial line interface is realized; thereafter, a custom serial bit frame command is sent to the monitoring slave (mon _ slave).

102, the monitoring master module receiving the status information of the AXI bus sent by the monitoring slave module; the state information of the AXI bus is obtained by converting the self-defined serial bit frame command into a general parallel data read-write interface command through the monitoring slave module and monitoring the AXI bus of the chip to be detected according to the general parallel data read-write interface command.

The monitoring master module (mon _ master) receives the state information of the AXI bus sent by the monitoring slave module (mon _ slave), wherein the state information of the AXI bus is obtained by converting a self-defined serial bit frame command into a universal parallel data read-write interface command through the monitoring slave module and monitoring the AXI bus of the chip to be detected according to the universal parallel data read-write interface command.

Specific explanations may be: the monitoring slave module (mon _ slave) firstly converts a self-defined serial bit frame command received by a serial protocol interface line into a general parallel data read-write interface command; then, monitoring an AXI bus of a chip to be detected according to the general parallel data read-write interface command to obtain state information of the AXI bus; after that, the state information of the AXI bus is transmitted to the monitoring master (mon _ master).

And 103, the monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus.

The monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus; the state of each monitoring point is determined, the monitoring point with the problem is positioned, the problem range can be reduced, once the monitoring point is positioned within a small range, the difficulty of problem positioning is greatly reduced, and the debugging efficiency can be increased in a level-to-level manner.

According to the method for monitoring the AXI bus, the serial protocol command sent by the chip to be detected is received through the monitoring main module, the serial protocol command is converted into the self-defined serial bit frame command, and the self-defined serial bit frame command is sent to the monitoring slave module; the monitoring master module receives the state information of the AXI bus sent by the monitoring slave module; the state information of the AXI bus is obtained by converting a self-defined serial bit frame command into a universal parallel data read-write interface command through a monitoring slave module and monitoring the AXI bus of a chip to be detected according to the universal parallel data read-write interface command; the monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus; the problem locating method and the device have the advantages that the state of each monitoring point is determined, the monitoring point with the problem is located, the problem range can be reduced, once the monitoring point is located within a small range, the problem locating difficulty is greatly reduced, and debugging efficiency can be increased in a level-to-level mode.

To further illustrate the object of the present invention, the above embodiments are further illustrated.

Fig. 3a is a flowchart of a second method embodiment of monitoring an AXI bus according to the present invention, fig. 3b is a first structural diagram of the second method embodiment of monitoring an AXI bus according to the present invention, and as shown in fig. 3b, the method for monitoring an AXI bus according to the present invention is applied to an apparatus for monitoring an AXI bus, in which a monitoring master module (mon _ master) is serially connected to a monitoring slave module (mon _ slave) queue formed by a plurality of monitoring slave modules (mon _ slave) through a custom serial interface line to form a closed loop formed by the monitoring master module (mon _ master) and the plurality of monitoring slave modules (mon _ slave).

As shown in fig. 3a, the method comprises the steps of:

step 201, the monitoring main module receives a serial protocol command sent by a chip to be detected.

The monitoring main module (mon _ master) can be connected to the pin of the chip to be detected by a simple serial protocol interface line to receive the serial protocol command (WRITE/READ) sent by the input/output port (I/O port) of the chip to be detected.

Preferably, in the embodiment of the present invention, the monitoring master module (mon _ master) may be implemented by two; fig. 3c is a second structural diagram of a method for monitoring an AXI bus according to a second embodiment of the present invention, as shown in fig. 3c, a first monitoring master module (mon _ master0) and a second monitoring master module (mon _ master1) are serially connected through a serial protocol interface line to form a monitoring master module (mon _ master) queue having an opening, monitoring slave modules (mon _ slave) are serially connected through a serial protocol interface line to form a monitoring slave module (mon _ slave) queue having an opening, and the monitoring master module queue having an opening and the monitoring slave module (mon _ slave) queue having an opening are serially connected through a serial protocol interface line to form a closed loop.

In addition, the first monitoring main module (mon _ master0) is connected with the chip to be detected by adopting a simple serial protocol interface line, and the second monitoring main module (mon _ master1) is connected with the CPU system by adopting a simple serial protocol interface line; the two functions are the same, and both convert the received command into an internal serial format command, and the difference is that one receives the serial protocol command of the chip to be detected, and the other receives the command of a Central Processing Unit (CPU) system.

The second monitoring master module (mon _ master1) is connected to the CPU system through a serial protocol interface line, and the operation of bus monitoring can be initiated by means of the CPU under the condition that the CPU system is normal; the structure has the advantages that the convenience is realized, one CPU debugger can complete the whole debugging, a debugger does not need to switch back and forth between the AXI bus monitoring interface and the CPU debugging interface, and the CPU debugging system can be used for carrying out auxiliary printing or small program compiling to extract and analyze monitored data.

The debugging in the mode does not depend on any internal CPU system, and even if the CPU does not work normally or the CPU is hung up for some reason, the external debugging and problem positioning are not influenced, and the stability is ensured.

Step 202, the monitoring master module converts the serial protocol command into a custom serial bit frame command.

The monitoring master module (mon _ master) stores the serial protocol command in the internal buffer, converts the serial protocol command into a custom serial bit frame command according to the serial bit protocol, and the custom serial bit frame command is specifically described below.

Fig. 4 is a structural diagram of a custom serial bit frame command of a second embodiment of the method for monitoring an AXI bus according to the present invention, as shown in fig. 4, the structural length of the entire custom serial bit frame command is 32; the system comprises a starting position, an Identification (ID) of a monitoring main module, a read-write instruction, an ID of a monitoring slave module, an offset address and an ending position; wherein the content of the first and second substances,

start _ bit (1): the 1bit starting bit represents the starting position of the frame structure, the serial bit line is at a high level under the idle condition, and the first low level represents the starting position;

MID (1): a 1-bit master ID indicating which master is sent from, and the 1bit supports 2 mon _ masters at most (the bit width of the MID field in the frame structure is changed, the supportable maximum value of the mon _ master number is changed, and if only one mon _ master is used, the field can be deleted);

wr/rd (1): 1bit read-write indication, 1 write, 0 read;

SID (5): a 5bit slave ID, which is decoded from one of the mon _ slave nodes, where the number of mon _ slave is selected according to practical application, and may support at most 32 mon _ slave (changing the bit width of the node address field in the frame structure, and the maximum supportable value of the number of mon _ slave also changes);

offset _ addr (8): an 8-bit offset address, one of the offset addresses of the selected mon _ slave node is decoded, the number of the offset addresses is selected according to practical application, and 256 mon _ slave nodes can be supported at most (the bit width of an offset address field in a frame structure is changed, and the maximum supportable value of the number of offset address registers is changed);

data (16): the data field of the serial bit line frame structure can be customized according to practical application;

stop _ bit (1): the 1-bit end bit represents the end position of the frame structure, the stop bit is high level, the next bit of the end bit starts, and the serial bit line enters an idle state.

Step 203, the monitoring master module sends the custom serial bit frame command to the monitoring slave module.

The monitoring master module (mon master) transmits the custom serial bit frame command to the monitoring slave module (mon slave) through the serial bit line.

And step 204, the monitoring slave module converts the self-defined serial bit frame command into a general parallel data read-write interface command.

Fig. 5 is a structural diagram of a monitoring slave according to a second embodiment of the method for monitoring an AXI bus of the present invention, and as shown in fig. 5, the monitoring slave (mon _ slave) includes a conversion unit (s2p _ bridge) and a monitoring unit (anti); the conversion unit (s2p _ bridge) in the monitoring slave module (mon _ slave) converts the custom serial bit frame command into a general parallel data read/write interface command and sends the command to the monitoring unit (ami) in the monitoring slave module (mon _ slave), where the general parallel data read/write interface command may be a read/write control signal interface command, may be an address line and data line interface command, may be a Static Random Access Memory (SRAM) interface command, and may also be another interface command similar to the SRAM interface command.

It should be noted here that, if there are two or more monitoring slave modules (mon _ slave), each monitoring slave module (mon _ slave) will transmit the custom serial bit frame command to the next node as it is while receiving the custom serial bit frame command, each monitoring slave module (mon _ slave) is provided with a unique SID, when performing serial-to-parallel conversion, the conversion unit (s2p _ bridge) will match the received SID with the SID assigned to itself, and the matched custom serial bit frame command will be stored in the node and sent to the monitoring unit (amti) in the monitoring slave module (mon _ slave) for use.

It should be noted here that, because the functions of the monitoring slave modules (mon _ slave) are the same, the monitoring slave modules (mon _ slave) may be time-division multiplexed; therefore, in the embodiment of the present invention, only the specific composition and the specific functions of the monitoring unit (anti) in one monitoring slave module (monslave) are described.

Step 205, the monitoring slave module monitors the AXI bus of the chip to be detected according to the general parallel data read-write interface command to obtain the state information of the AXI bus.

The monitoring unit (anti) in the monitoring slave module (mon _ slave) completes the configuration of read-write control information according to a general parallel data read-write interface command, realizes the multiplexing of read-write channel signals of the AXI bus, completes the collection and verification of the signals of the AXI bus, and completes the state monitoring and the capture setting, starting, recording and clearing of the AXI bus.

Specifically, fig. 6 is a working state diagram of a monitoring unit in a monitoring slave module according to a second embodiment of the method for monitoring an AXI bus of the present invention, and as shown in fig. 6, a configuration subunit (anti _ cfg) in the monitoring unit (anti) is configured to complete configuration of read/write control information according to a general parallel data read/write interface command; a multiplexing subunit (anti _ imux) in the monitoring unit (anti) is used for multiplexing read-write channel signals of the AXI bus; a collection and check subunit (anti _ check) in the monitoring unit (anti) for completing the collection and check of signals of the AXI bus; and the processing unit (anti _ sample) in the monitoring unit (anti) is used for finishing the state monitoring of the AXI bus and the setting, starting, recording and clearing of grabbing.

For example, the monitoring unit (anti) configures and reads an internal register through an SRAM interface, and completes the state monitoring and data capture of the AXI bus.

Wherein, the read-write control information comprises: the read-write control information of the aw, w, b, ar and r five data channels and the read-write control information of the addr, data and resp three types.

Different matching switches can be set for each category, address channels have addr, id, len, size and burst information, an independent matching switch match _ en is set for each item of addr, id, len, size and burst information in the design, and the matching switches can be independently turned on and off or can be turned on and off in any combination.

For example, when an addr item matching switch is turned on, addr information is used as a matching item, an expected value must be set for the addr item before sampling, once the expected value appears on an address channel, capturing is successful, the state of successful capturing is recorded, and meanwhile, a monitoring unit (anti) stores id, len, size and burst information corresponding to the address channel; other combinations of matching switch openings may be analogized in turn.

The data channel has data, id and wstrb information, an independent matching switch match _ en is set for each item of information of the data, the id and the wstrb in design, the matching switches can be independently opened and closed, and can also be opened and closed in any combination, and the working mode is similar to that of the address channel.

The response channel has resp and id information, an independent matching switch match _ en is set for each item of information of resp and id in the design, the matching switches can be independently opened and closed, and can also be opened and closed in any combination, and the working mode is similar to that of the address channel.

The order of the combination of the address, data and response channels may also be set, with the address channel matching supporting a pre-trigger data channel, the data channel matching supporting a pre-trigger address channel, and the response channel matching supporting a pre-trigger address or data channel.

Single trigger and multiple triggers can be supported, wherein the single trigger records the result of the first matching, and the multiple triggers record the latest matching result.

Taking sampling aw channel data, setting addr as a matching item, taking single triggering as an example, sampling w channel data, setting data as a matching item, taking multi-triggering as an example, sampling w channel response, setting resp as a matching item, and taking multi-triggering as an example, respectively giving a configuration flow of a relevant register.

Fig. 7 is a configuration flowchart of a single trigger for monitoring a monitoring unit in a slave module to sample ar channel data and set addr as a matching item according to a second embodiment of the method for monitoring an AXI bus in the present invention, as shown in fig. 7 (the configuration and reading of each register in the following flow needs a monitoring master module to initiate a corresponding command to implement), where the flow includes:

step 301, configuring axi _ dbg _ en switch (8' h00) to be 1.

The axi dbg en switch is turned on and off by default in order to save power consumption.

Step 302, configure axi _ rchn _ sta _ en switch (8' h01) to 1.

And opening an axi _ rchn _ sta _ en switch, and multiplexing hardware resources by the read-write channel (sampling write channel data, and opening the axi _ wchn _ sta _ en switch).

Step 303, configure a _ single _ trig _ en (8' h34) to be 1.

And opening a single trigger switch (supporting two modes of single trigger and multiple trigger).

Step 304, configure data _ trig _ off (8' h20) to 0.

Turn off data _ trig _ off (support data register multiplexing for addr storage).

Step 305, configure id _ match _ adr _ sel (8'h20) to 2' b 00.

The id _ match _ addr _ sel is configured to select the addr channel (the id register is used for the addr, data and resp channel multiplexing).

Step 306, configure a _ time _ catch _ en (8' h34) to 1.

Opening the grab time enables the switch.

Step 307, turn on addr _ match _ en switch (8' h 20).

The addr match enable switch is opened.

And step 308, configuring a sampling matching value addr _ value (8'h21, 8' h 22).

And writing a value to be matched in the addr register.

Step 309, configure the sample matching mask value addr _ mask (8'h23, 8' h 24).

And writing a corresponding addr _ mask value according to the addr to be matched (supporting addr accurate matching and interval matching and being realized by configuring the addr _ mask).

Step 310, clear a _ catch _ ok (8' h 33).

And after all the configurations are completed, clearing the capture completion mark, and once the capture is successful, resetting the mark.

Step 311, read the a _ catch _ ok status (8' h 33).

The a _ catch _ ok status information is read.

Step 312, determine if a _ catch _ ok is equal to 1' b 1.

Judging whether the a _ catch _ ok is equal to 1'b1, if not equal to 1' b1, returning to execute the step 311; if equal to 1' b1, go to step 313; that is, whether the cyclic query grabbing success flag is set up is judged, if the cyclic query grabbing success flag is not set up all the time, it indicates that there is no matched addr access, and the step 311 is returned to; if the flag is set, step 313 is performed.

Step 313, reading the related data information.

And reading related grabbing information (id, len, size, burst).

Fig. 8 is a configuration flowchart of multiple triggers of sampling w-channel data and setting data as a matching entry by a monitoring unit in a monitoring slave module according to a second embodiment of the method for monitoring an AXI bus of the present invention, as shown in fig. 8 (the configuration and reading of each register in the following flow are implemented by initiating a corresponding command by a monitoring master module), where the flow includes:

step 401, configuring axi _ dbg _ en switch (8' h00) to be 1.

Open axi dbg en switch.

Step 402, configure axi _ wchn _ sta _ en switch (8' h02) to 1.

The axi _ wchn _ sta _ en switch is opened, i.e., the default mode is set to multiple toggles.

Step 403, configure id _ match _ adr _ sel (8'h20) to 2' b 01.

The id _ match _ adr _ sel is configured to select a data channel.

Step 404, turning on the data _ match _ en switch (8' h 20).

And opening a data matching enabling switch.

Step 405, configuring a sample matching value data _ value (8'h2 b-8' h 32).

And writing the data register with the value to be matched.

Step 406, clear a _ catch _ ok (8' h 33).

Step 407, read the a _ catch _ ok status (8' h 33).

The a _ catch _ ok status information is read.

Step 408, determine if a _ catch _ ok is equal to 1' b 1.

Judging whether the a _ catch _ ok is equal to 1' b1, if not, returning to execute the step 407; if equal to 1' b1, go to step 409; that is, whether the cyclic query grabbing success flag is set up is judged, if the cyclic query grabbing success flag is not set up all the time, it indicates that there is no matched addr access, and the step 407 is returned to; if the flag is set, step 409 is performed.

Step 409, reading the related data information (id, strb and the number of bursts).

And reading related data information (id, strb and the number of bursts).

Fig. 9 is a configuration flowchart of multiple triggers of a monitoring unit in a monitoring slave module sampling w-channel response and setting resp as a matching item according to a second embodiment of the method for monitoring an AXI bus of the present invention, as shown in fig. 9 (the configuration and reading of each register in the following flow needs a monitoring master module to initiate a corresponding command to implement), where the flow includes:

step 501, configuring axi _ dbg _ en switch (8' h00) to be 1.

Open axi dbg en switch.

Step 502, configure axi _ wchn _ sta _ en switch (8' h02) to 1.

The axi _ wchn _ sta _ en switch is opened, i.e., the default mode is multiple toggles.

Step 503, configure id _ match _ adr _ sel (8'h20) to 2' b 10.

The id _ match _ adr _ sel is configured to select the resp channel.

Step 504, the data _ match _ en switch (8' h20) is turned on.

The resp match enable switch is opened.

Step 505, configure the sample match value resp _ value (8' h 29).

The value to be matched is written in the resp register.

Step 506, clear a _ catch _ ok (8' h 33).

Step 507, reading the a _ catch _ ok status (8' h 33).

The a _ catch _ ok status information is read.

Step 508, determine if a _ catch _ ok is equal to 1' b 1.

Judging whether the a _ catch _ ok is equal to 1' b1, if not, returning to execute the step 507; if equal to 1' b1, go to step 509; judging whether the cyclic query grabbing success flag is set, if the cyclic query grabbing success flag is not set, indicating that no matched addr access exists, and returning to execute the step 507; if the flag is set, step 509 is performed.

Step 509, read the relevant data information (id).

The relevant data information (id) is read.

Step 206, the monitoring slave sends the state information of the AXI bus to the monitoring master.

The monitoring unit (anti) in the monitoring slave module (mon _ slave) sends the monitored and captured state information (related data information) of the AXI bus to the monitoring master module (mon _ master) through the custom serial interface.

And step 207, the monitoring master module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus.

The monitoring main module (mon _ master) analyzes and determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus, and positions the state problem, or a worker analyzes and determines the state of the AXI bus of the chip to be detected through the state information of the AXI bus received by the monitoring main module (mon _ master), and positions the state problem; for example, the data of the memory address of the chip module to be detected is accidentally rewritten, the rewriting source can be accurately analyzed by grabbing the ID for rewriting the address, and the center of gravity of the analysis is put to the rewriting source, so that the rewriting reason can be quickly found, the difficulty of problem positioning is greatly reduced, and the debugging efficiency can be increased in a technical level.

According to the method for monitoring the AXI bus, provided by the embodiment of the invention, a monitoring main module receives a serial protocol command sent by a chip to be detected; the monitoring main module converts the serial protocol command into a self-defined serial bit frame command; the monitoring master module sends the self-defined serial bit frame command to the monitoring slave module; the monitoring slave module converts the self-defined serial bit frame command into a general parallel data read-write interface command; monitoring an AXI bus of the chip to be detected by a monitoring slave module according to the general parallel data read-write interface command to obtain state information of the AXI bus; the monitoring slave module sends the state information of the AXI bus to a monitoring master module; the monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus; the problem locating method and the device have the advantages that the state of each monitoring point is determined, the monitoring point with the problem is located, the problem range can be reduced, once the monitoring point is located within a small range, the problem locating difficulty is greatly reduced, and debugging efficiency can be increased in a level-to-level mode.

Fig. 10 is a schematic structural diagram of an AXI bus monitoring apparatus according to an embodiment of the present invention, and as shown in fig. 10, an AXI bus monitoring apparatus 010 according to an embodiment of the present invention includes: a monitoring master module 101 and a monitoring slave module 102; the monitoring master module 101 is connected in series with the monitoring slave module 102 through a serial protocol interface line to form a closed loop formed by the monitoring master module 101 and the monitoring slave module 102;

the monitoring master module 101 is configured to receive a serial protocol command sent by a chip to be detected, convert the serial protocol command into a custom serial bit frame command, and send the custom serial bit frame command to the monitoring slave module 102;

the monitoring slave module 102 is configured to convert the custom serial bit frame command into a general parallel data read/write interface command, monitor an AXI bus of the chip to be detected according to the general parallel data read/write interface command to obtain state information of the AXI bus, and send the state information of the AXI bus to the monitoring master module 101;

the monitoring main module 101 is further configured to determine the state of the AXI bus of the chip to be detected according to the state information of the AXI bus.

Further, the custom serial bit frame command includes: the system comprises a starting position, the monitoring master module identification number ID, a read-write indication, the monitoring slave module identification number ID, an offset address and an ending position.

Further, the monitoring slave module 102 includes: a conversion unit 1021 and a monitoring unit 1022; wherein the content of the first and second substances,

the conversion unit 1021 is used for converting the self-defined serial bit frame command into a general parallel data read-write interface command;

the monitoring unit 1022 includes: configuration subunit 10221, multiplexing subunit 10222, collection and check subunit 10223, processing subunit 10224; wherein the content of the first and second substances,

the configuration subunit 10221 is configured to complete configuration of read-write control information according to the general parallel data read-write interface command;

the multiplexing subunit 10222 is configured to implement multiplexing of read/write channel signals of the AXI bus;

the collecting and verifying subunit 10223 is configured to complete collecting and verifying signals of the AXI bus;

the processing subunit 10224 is configured to complete the status monitoring and capturing setting, starting, recording, and clearing of the AXI bus.

Further, the read/write control information includes: the read-write control information of the aw, w, b, ar and r five data channels and the read-write control information of the addr, data and resp three types.

Further, in the above-mentioned case,

if the number of the monitoring master modules 101 is one and the number of the monitoring slave modules 102 is two or more, the monitoring slave modules 102 are connected in series through the serial protocol interface line to form a monitoring slave module 102 queue with an opening, and the monitoring master modules 101 and the monitoring slave module 102 queue with the opening form a closed loop through the serial protocol interface line;

if the number of the monitoring master modules 101 is two or more and the number of the monitoring slave modules 102 is one, the monitoring master modules 101 are connected in series through the serial protocol interface line to form a monitoring master module 101 queue with an opening, and the monitoring master module 101 queue with the opening and the monitoring slave modules 102 are connected in series through the serial protocol interface line to form a closed loop;

if the number of the monitoring master modules 101 is two or more and the number of the monitoring slave modules 102 is two or more, the monitoring master modules 101 are connected in series through the serial protocol interface line to form a monitoring master module 101 queue with an opening, the monitoring slave modules 102 are connected in series through the serial protocol interface line to form a monitoring slave module 102 queue with an opening, and the monitoring master module 101 queue with an opening and the monitoring slave module 102 queue with an opening are connected in series through the serial protocol interface line to form a closed loop.

The apparatus of this embodiment may be configured to implement the technical solutions of the above-described method embodiments, and the implementation principles and technical effects are similar, which are not described herein again.

In practical applications, the monitoring master module 101, the monitoring slave module 102, the conversion Unit 1021, the monitoring Unit 1022, the configuration subunit 10221, the multiplexing subunit 10222, the collection and verification subunit 10223, and the Processing subunit 10224 may be implemented by a Central Processing Unit (CPU), a Microprocessor (MPU), a Digital Signal Processor (DSP), a Field Programmable Gate Array (FPGA), or the like, which are located in the device 010 for monitoring the AXI bus.

As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.

The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.

Claims

1. A method of monitoring an advanced extensible interface, AXI, bus, wherein the method is applied to an apparatus for monitoring an AXI bus, in which a monitoring master is connected in series with a monitoring slave through a serial protocol interface line to form a closed loop consisting of the monitoring master and the monitoring slave, the method comprising:

the monitoring main module determines the state of the AXI bus of the chip to be detected according to the state information of the AXI bus;

2. The method of claim 1, wherein the custom serial bit frame command comprises: the system comprises a starting position, the monitoring master module identification number ID, a read-write indication, the monitoring slave module identification number ID, an offset address and an ending position.

3. The method as claimed in claim 1, wherein the state information of the AXI bus is obtained by the monitoring slave module converting the custom serial bit frame command into a general parallel data read/write interface command, and monitoring the AXI bus of the chip to be detected according to the general parallel data read/write interface command, and includes:

4. The method of claim 3, wherein the read/write control information comprises: the read-write control information of the aw, w, b, ar and r five data channels and the read-write control information of the addr, data and resp three types.

5. An apparatus for monitoring an advanced extensible interface (AXI) bus, the apparatus comprising: the monitoring master module and the monitoring slave module; the monitoring master module is connected with the monitoring slave module in series through a serial protocol interface line to form a closed loop formed by the monitoring master module and the monitoring slave module;

the monitoring main module is further configured to determine the state of the AXI bus of the chip to be detected according to the state information of the AXI bus;

6. The apparatus of claim 5, wherein the custom serial bit frame command comprises: the system comprises a starting position, the monitoring master module identification number ID, a read-write indication, the monitoring slave module identification number ID, an offset address and an ending position.

7. The apparatus of claim 5, wherein the monitoring slave module comprises:

a monitoring unit, wherein the monitoring unit comprises:

8. The apparatus of claim 7, wherein the read/write control information comprises: the read-write control information of the aw, w, b, ar and r five data channels and the read-write control information of the addr, data and resp three types.